About the Execution of LoLA for NoC3x3-PT-4A
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4807.424 | 271973.00 | 260396.00 | 872.10 | ????FTFFTT?FFF?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r262-smll-167863537100274.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is NoC3x3-PT-4A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r262-smll-167863537100274
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 6.0K Feb 26 10:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 10:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 26 10:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 26 10:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.8K Feb 26 10:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 10:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 10:21 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 26 10:21 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 144K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-00
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-01
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-02
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-03
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-04
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-05
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-06
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-07
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-08
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-09
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-10
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-11
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-12
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-13
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-14
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678807099309
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=NoC3x3-PT-4A
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT NoC3x3-PT-4A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA NoC3x3-PT-4A-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-4A-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678807371282
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 54 (type EXCL) for 28 NoC3x3-PT-4A-CTLFireability-08
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 52 (type FNDP) for 28 NoC3x3-PT-4A-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 28 NoC3x3-PT-4A-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SRCH) for 28 NoC3x3-PT-4A-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type EXCL) for NoC3x3-PT-4A-CTLFireability-08
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 55 (type SRCH) for NoC3x3-PT-4A-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for NoC3x3-PT-4A-CTLFireability-08 (obsolete)
lola: CANCELED task # 53 (type EQUN) for NoC3x3-PT-4A-CTLFireability-08 (obsolete)
lola: FINISHED task # 52 (type FNDP) for NoC3x3-PT-4A-CTLFireability-08
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
sara: try reading problem file /home/mcc/execution/CTLFireability-53.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 7 (type EXCL) for 6 NoC3x3-PT-4A-CTLFireability-02
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 53 (type EQUN) for NoC3x3-PT-4A-CTLFireability-08
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 59 (type FNDP) for 18 NoC3x3-PT-4A-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 18 NoC3x3-PT-4A-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 62 (type SRCH) for 18 NoC3x3-PT-4A-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SRCH) for NoC3x3-PT-4A-CTLFireability-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 59 (type FNDP) for NoC3x3-PT-4A-CTLFireability-06
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 60 (type EQUN) for NoC3x3-PT-4A-CTLFireability-06 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-60.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 60 (type EQUN) for NoC3x3-PT-4A-CTLFireability-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 4/239 6/32 NoC3x3-PT-4A-CTLFireability-02 1250905 m, 250181 m/sec, 2646764 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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7 CTL EXCL 9/239 11/32 NoC3x3-PT-4A-CTLFireability-02 2579523 m, 265723 m/sec, 5514939 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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7 CTL EXCL 14/239 18/32 NoC3x3-PT-4A-CTLFireability-02 4142759 m, 312647 m/sec, 8858026 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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7 CTL EXCL 19/239 24/32 NoC3x3-PT-4A-CTLFireability-02 5665506 m, 304549 m/sec, 12165918 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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7 CTL EXCL 24/239 31/32 NoC3x3-PT-4A-CTLFireability-02 7221803 m, 311259 m/sec, 15531037 t fired, .
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lola: CANCELED task # 7 (type EXCL) for NoC3x3-PT-4A-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 50 (type EXCL) for 49 NoC3x3-PT-4A-CTLFireability-15
lola: time limit : 255 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 5/255 4/32 NoC3x3-PT-4A-CTLFireability-15 788399 m, 157679 m/sec, 3238744 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
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NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/485 30/32 NoC3x3-PT-4A-CTLFireability-01 6916888 m, 196779 m/sec, 23650614 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
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lola: LAUNCH task # 1 (type EXCL) for 0 NoC3x3-PT-4A-CTLFireability-00
lola: time limit : 559 sec
lola: memory limit: 32 pages
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-4A-CTLFireability-08: EF true state space
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NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 20/559 27/32 NoC3x3-PT-4A-CTLFireability-00 6297591 m, 308006 m/sec, 13527616 t fired, .
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NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-05: SP ECTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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lola: LAUNCH task # 57 (type EXCL) for 15 NoC3x3-PT-4A-CTLFireability-05
lola: time limit : 666 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for NoC3x3-PT-4A-CTLFireability-05
lola: result : false
lola: markings : 1755
lola: fired transitions : 4893
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 NoC3x3-PT-4A-CTLFireability-07
lola: time limit : 832 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for NoC3x3-PT-4A-CTLFireability-07
lola: result : false
lola: markings : 140
lola: fired transitions : 280
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 NoC3x3-PT-4A-CTLFireability-09
lola: time limit : 1110 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for NoC3x3-PT-4A-CTLFireability-09
lola: result : true
lola: markings : 4
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 NoC3x3-PT-4A-CTLFireability-04
lola: time limit : 1665 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for NoC3x3-PT-4A-CTLFireability-04
lola: result : false
lola: markings : 167
lola: fired transitions : 1111
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 NoC3x3-PT-4A-CTLFireability-13
lola: time limit : 3330 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for NoC3x3-PT-4A-CTLFireability-13
lola: result : false
lola: markings : 190003
lola: fired transitions : 707334
lola: time used : 2.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-00: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-01: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-02: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-03: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-04: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-07: DISJ false DISJ
NoC3x3-PT-4A-CTLFireability-08: EF true state space
NoC3x3-PT-4A-CTLFireability-09: EFEG true state space /EFEG
NoC3x3-PT-4A-CTLFireability-10: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-13: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-14: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-4A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is NoC3x3-PT-4A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-smll-167863537100274"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-4A.tgz
mv NoC3x3-PT-4A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;