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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r261-smll-167863536400482
Last Updated
May 14, 2023

About the Execution of ITS-Tools for PermAdmissibility-COL-10

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5338.207 1527873.00 1552692.00 3628.40 FTTTTTFTTFTFFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r261-smll-167863536400482.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool itstools
Input is PermAdmissibility-COL-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-smll-167863536400482
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 6.2K Feb 26 01:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 26 01:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 01:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 01:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 01:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 26 01:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 01:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 101K Feb 26 01:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 37K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-00
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-01
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-02
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-03
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-04
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-05
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-06
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-07
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-08
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-09
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-10
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-11
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-12
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-13
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-14
FORMULA_NAME PermAdmissibility-COL-10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678943649224

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-COL-10
Not applying reductions.
Model is COL
CTLFireability COL
Running Version 202303021504
[2023-03-16 05:14:12] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2023-03-16 05:14:12] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 05:14:12] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-16 05:14:13] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-16 05:14:13] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1108 ms
[2023-03-16 05:14:13] [INFO ] Imported 40 HL places and 16 HL transitions for a total of 208 PT places and 1024.0 transition bindings in 36 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
[2023-03-16 05:14:13] [INFO ] Built PT skeleton of HLPN with 40 places and 16 transitions 83 arcs in 8 ms.
[2023-03-16 05:14:13] [INFO ] Skeletonized 16 HLPN properties in 22 ms.
Computed a total of 40 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 40 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 12 formulas.
FORMULA PermAdmissibility-COL-10-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 12 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 1 formulas.
FORMULA PermAdmissibility-COL-10-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 40 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 40 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 10000 steps, including 56 resets, run finished after 134 ms. (steps per millisecond=74 ) properties (out of 22) seen :20
Finished Best-First random walk after 267 steps, including 0 resets, run visited all 2 properties in 3 ms. (steps per millisecond=89 )
[2023-03-16 05:14:14] [INFO ] Flatten gal took : 27 ms
[2023-03-16 05:14:14] [INFO ] Flatten gal took : 12 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :input
Symmetric sort wr.t. initial detected :input
Symmetric sort wr.t. initial and guards detected :input
Applying symmetric unfolding of full symmetric sort :input domain size was 8
[2023-03-16 05:14:14] [INFO ] Unfolded HLPN to a Petri net with 40 places and 16 transitions 83 arcs in 14 ms.
[2023-03-16 05:14:14] [INFO ] Unfolded 14 HLPN properties in 0 ms.
Support contains 32 out of 40 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 16/16 transitions.
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 32 transition count 16
Applied a total of 8 rules in 10 ms. Remains 32 /40 variables (removed 8) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 05:14:14] [INFO ] Computed 16 place invariants in 9 ms
[2023-03-16 05:14:14] [INFO ] Implicit Places using invariants in 306 ms returned []
[2023-03-16 05:14:14] [INFO ] Invariant cache hit.
[2023-03-16 05:14:14] [INFO ] Implicit Places using invariants and state equation in 117 ms returned []
Implicit Place search using SMT with State Equation took 468 ms to find 0 implicit places.
[2023-03-16 05:14:14] [INFO ] Invariant cache hit.
[2023-03-16 05:14:14] [INFO ] Dead Transitions using invariants and state equation in 67 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 32/40 places, 16/16 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 547 ms. Remains : 32/40 places, 16/16 transitions.
Support contains 32 out of 32 places after structural reductions.
[2023-03-16 05:14:14] [INFO ] Flatten gal took : 10 ms
[2023-03-16 05:14:14] [INFO ] Flatten gal took : 10 ms
[2023-03-16 05:14:14] [INFO ] Input system was already deterministic with 16 transitions.
Incomplete random walk after 10000 steps, including 56 resets, run finished after 151 ms. (steps per millisecond=66 ) properties (out of 32) seen :28
Finished Best-First random walk after 1333 steps, including 1 resets, run visited all 4 properties in 15 ms. (steps per millisecond=88 )
[2023-03-16 05:14:14] [INFO ] Flatten gal took : 6 ms
[2023-03-16 05:14:15] [INFO ] Flatten gal took : 7 ms
[2023-03-16 05:14:15] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 32 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 32 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 3 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 30 cols
[2023-03-16 05:14:15] [INFO ] Computed 14 place invariants in 6 ms
[2023-03-16 05:14:15] [INFO ] Implicit Places using invariants in 87 ms returned [5, 7, 12, 13]
Discarding 4 places :
Implicit Place search using SMT only with invariants took 111 ms to find 4 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 26/32 places, 16/16 transitions.
Applied a total of 0 rules in 2 ms. Remains 26 /26 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 116 ms. Remains : 26/32 places, 16/16 transitions.
[2023-03-16 05:14:15] [INFO ] Flatten gal took : 4 ms
[2023-03-16 05:14:15] [INFO ] Flatten gal took : 4 ms
[2023-03-16 05:14:15] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:14:15] [INFO ] Flatten gal took : 4 ms
[2023-03-16 05:14:15] [INFO ] Flatten gal took : 4 ms
[2023-03-16 05:14:15] [INFO ] Time to serialize gal into /tmp/CTLFireability16231677563251508576.gal : 3 ms
[2023-03-16 05:14:15] [INFO ] Time to serialize properties into /tmp/CTLFireability17141336852621538513.ctl : 2 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability16231677563251508576.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability17141336852621538513.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...285
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.377607,12864,2,11442,5,65787,6,0,122,59026,0


Converting to forward existential form...Done !
original formula: (!(A((((c13_0>=1)&&(aux9_0>=1))&&(aux11_0>=1)) U (A((((((aux16_0>=1)&&(aux14_0>=1))&&((c19_0>=1)&&(aux7_0>=1)))&&((aux5_0>=1)&&(c110_0>=1...633
=> equivalent forward existential formula: [FwdG((Init * !(!((E(!((!((E(!(EX((((aux7_0>=1)&&(aux5_0>=1))&&(c9_0>=1)))) U (!((((((aux16_0>=1)&&(aux14_0>=1))...1749
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
dead was empty
(forward)formula 0,0,28.4491,564856,1,0,1958,3.17224e+06,78,1248,1140,4.19084e+06,1807
FORMULA PermAdmissibility-COL-10-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 2 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
[2023-03-16 05:14:43] [INFO ] Invariant cache hit.
[2023-03-16 05:14:43] [INFO ] Implicit Places using invariants in 90 ms returned [4, 6, 12, 13, 14, 16, 22, 23, 24, 25]
Discarding 10 places :
Implicit Place search using SMT only with invariants took 94 ms to find 10 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 20/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 97 ms. Remains : 20/32 places, 16/16 transitions.
[2023-03-16 05:14:44] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:14:44] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:14:44] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:14:44] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:14:44] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:14:44] [INFO ] Time to serialize gal into /tmp/CTLFireability10852044170789267684.gal : 1 ms
[2023-03-16 05:14:44] [INFO ] Time to serialize properties into /tmp/CTLFireability18149435821837104225.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability10852044170789267684.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability18149435821837104225.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...285
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.690961,13756,2,2246,5,58874,6,0,97,68471,0


Converting to forward existential form...Done !
original formula: (AF((((c15_0>=1)&&(aux10_0>=1))&&(aux12_0>=1))) * AX((A((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1)) U EF((((aux7_0>=1)&&(aux5_0>=1))&&(c110...258
=> equivalent forward existential formula: ([FwdG(Init,!((((c15_0>=1)&&(aux10_0>=1))&&(aux12_0>=1))))] = FALSE * ([((FwdU((EY(Init) * !(EG(((((aux7_0>=1)&&...577
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
Hit Full ! (commute/partial/dont) 11/0/5
(forward)formula 0,1,4.79964,85456,1,0,195,496801,73,30,817,532697,212
FORMULA PermAdmissibility-COL-10-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 2 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 31 cols
[2023-03-16 05:14:48] [INFO ] Computed 15 place invariants in 3 ms
[2023-03-16 05:14:48] [INFO ] Implicit Places using invariants in 93 ms returned [4, 6, 13, 15, 17]
Discarding 5 places :
Implicit Place search using SMT only with invariants took 95 ms to find 5 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 26/32 places, 16/16 transitions.
Applied a total of 0 rules in 2 ms. Remains 26 /26 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 99 ms. Remains : 26/32 places, 16/16 transitions.
[2023-03-16 05:14:48] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:14:48] [INFO ] Flatten gal took : 12 ms
[2023-03-16 05:14:48] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:14:48] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:14:49] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:14:49] [INFO ] Time to serialize gal into /tmp/CTLFireability4683538379389651485.gal : 1 ms
[2023-03-16 05:14:49] [INFO ] Time to serialize properties into /tmp/CTLFireability8057236317176592872.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability4683538379389651485.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability8057236317176592872.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,1.87767,38604,2,35332,5,193034,6,0,120,183363,0


Converting to forward existential form...Done !
original formula: (EG(AX((EF((((aux16_0<1)||(aux14_0<1))||(c19_0<1))) + (((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1))))) + ((!(E(AX(((((aux15_0>=1)&&(aux13_0>=...496
=> equivalent forward existential formula: (([(FwdU((Init * !(EG(!(EX(!((E(TRUE U (((aux16_0<1)||(aux14_0<1))||(c19_0<1))) + (((aux7_0>=1)&&(aux5_0>=1))&&(...941
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,22.7933,443892,1,0,906,2.25048e+06,70,413,1117,2.61508e+06,998
FORMULA PermAdmissibility-COL-10-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 05:15:11] [INFO ] Computed 16 place invariants in 2 ms
[2023-03-16 05:15:11] [INFO ] Implicit Places using invariants in 94 ms returned [5, 7, 16, 18, 25, 27]
Discarding 6 places :
Implicit Place search using SMT only with invariants took 97 ms to find 6 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 26/32 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 100 ms. Remains : 26/32 places, 16/16 transitions.
[2023-03-16 05:15:11] [INFO ] Flatten gal took : 4 ms
[2023-03-16 05:15:12] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:15:12] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:15:12] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:15:12] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:15:12] [INFO ] Time to serialize gal into /tmp/CTLFireability310456139246615604.gal : 2 ms
[2023-03-16 05:15:12] [INFO ] Time to serialize properties into /tmp/CTLFireability4705905333757601792.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability310456139246615604.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability4705905333757601792.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...282
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.412205,10644,2,8272,5,45602,6,0,118,42628,0


Converting to forward existential form...Done !
original formula: EF((((EX(EF((((aux7_0>=1)&&(aux5_0>=1))&&(c9_0>=1)))) * (c13_0>=1)) * ((aux9_0>=1)&&(aux11_0>=1))) * A(AG(AF((((aux16_0>=1)&&(aux14_0>=1)...264
=> equivalent forward existential formula: [(((FwdU(Init,TRUE) * ((EX(E(TRUE U (((aux7_0>=1)&&(aux5_0>=1))&&(c9_0>=1)))) * (c13_0>=1)) * ((aux9_0>=1)&&(aux...909
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,8.33012,171584,1,0,242,945640,69,66,1074,1.01174e+06,295
FORMULA PermAdmissibility-COL-10-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 31 cols
[2023-03-16 05:15:20] [INFO ] Computed 15 place invariants in 1 ms
[2023-03-16 05:15:20] [INFO ] Implicit Places using invariants in 68 ms returned [14, 15, 17, 23, 25]
Discarding 5 places :
Implicit Place search using SMT only with invariants took 71 ms to find 5 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 26/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 73 ms. Remains : 26/32 places, 16/16 transitions.
[2023-03-16 05:15:20] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:20] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:20] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:15:20] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:20] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:20] [INFO ] Time to serialize gal into /tmp/CTLFireability2927908243317106991.gal : 1 ms
[2023-03-16 05:15:20] [INFO ] Time to serialize properties into /tmp/CTLFireability16547414094706557146.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability2927908243317106991.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability16547414094706557146.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.66049,14072,2,10637,5,65354,6,0,119,61732,0


Converting to forward existential form...Done !
original formula: EG(((A((AG(!((((aux7_0>=1)&&(aux5_0>=1))&&(c9_0>=1)))) + EF((((in1_0>=1)&&(c6_0>=1))&&(in3_0>=1)))) U AX((((aux15_0>=1)&&(aux13_0>=1))&&(...350
=> equivalent forward existential formula: [FwdG(Init,((!((E(!(!(EX(!((((aux15_0>=1)&&(aux13_0>=1))&&(c17_0>=1)))))) U (!((!(E(TRUE U !(!((((aux7_0>=1)&&(a...556
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,9.10625,161332,1,0,488,857397,66,210,1122,948578,514
FORMULA PermAdmissibility-COL-10-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 2 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 30 cols
[2023-03-16 05:15:29] [INFO ] Computed 14 place invariants in 2 ms
[2023-03-16 05:15:29] [INFO ] Implicit Places using invariants in 113 ms returned [4, 5, 6, 7, 12, 13, 14, 15, 16, 17, 23, 25]
Discarding 12 places :
Implicit Place search using SMT only with invariants took 115 ms to find 12 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 18/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 118 ms. Remains : 18/32 places, 16/16 transitions.
[2023-03-16 05:15:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:29] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:15:29] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:15:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:29] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:15:29] [INFO ] Time to serialize gal into /tmp/CTLFireability9966230099952942861.gal : 1 ms
[2023-03-16 05:15:29] [INFO ] Time to serialize properties into /tmp/CTLFireability2445775152374302700.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability9966230099952942861.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability2445775152374302700.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.161311,6080,2,1564,5,15716,6,0,90,17421,0


Converting to forward existential form...Done !
original formula: AX(AF((((aux16_0>=1)&&(aux14_0>=1))&&(c19_0>=1))))
=> equivalent forward existential formula: [FwdG(EY(Init),!((((aux16_0>=1)&&(aux14_0>=1))&&(c19_0>=1))))] = FALSE
Hit Full ! (commute/partial/dont) 11/0/5
(forward)formula 0,1,2.30571,48404,1,0,169,269756,19,4,602,270936,168
FORMULA PermAdmissibility-COL-10-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 05:15:32] [INFO ] Computed 16 place invariants in 2 ms
[2023-03-16 05:15:32] [INFO ] Implicit Places using invariants in 75 ms returned [4, 6, 16, 17, 18, 19, 24, 25, 26, 27]
Discarding 10 places :
Implicit Place search using SMT only with invariants took 76 ms to find 10 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 22/32 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 78 ms. Remains : 22/32 places, 16/16 transitions.
[2023-03-16 05:15:32] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:15:32] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:15:32] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:15:32] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:32] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:15:32] [INFO ] Time to serialize gal into /tmp/CTLFireability1823614155183876643.gal : 1 ms
[2023-03-16 05:15:32] [INFO ] Time to serialize properties into /tmp/CTLFireability6751011403993859995.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability1823614155183876643.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability6751011403993859995.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.054621,5056,2,1408,5,9357,6,0,101,9577,0


Converting to forward existential form...Done !
original formula: EX((EX(((AX((((in1_0>=1)&&(c5_0>=1))&&(in3_0>=1))) * EG((((c7_0>=1)&&(in2_0>=1))&&(in4_0>=1)))) + AG((((in1_0>=1)&&(c6_0>=1))&&(in3_0>=1)...206
=> equivalent forward existential formula: (([FwdG((EY(EY(Init)) * !(EX(!((((in1_0>=1)&&(c5_0>=1))&&(in3_0>=1)))))),(((c7_0>=1)&&(in2_0>=1))&&(in4_0>=1)))]...319
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
dead was empty
(forward)formula 0,0,1.53612,38120,1,0,196,196032,58,26,847,223143,212
FORMULA PermAdmissibility-COL-10-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 9 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
[2023-03-16 05:15:33] [INFO ] Invariant cache hit.
[2023-03-16 05:15:33] [INFO ] Implicit Places using invariants in 77 ms returned [5, 7, 17, 19, 25, 27]
Discarding 6 places :
Implicit Place search using SMT only with invariants took 79 ms to find 6 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 26/32 places, 16/16 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 26 transition count 15
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 25 transition count 15
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 2 place count 25 transition count 12
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 8 place count 22 transition count 12
Applied a total of 8 rules in 10 ms. Remains 22 /26 variables (removed 4) and now considering 12/16 (removed 4) transitions.
// Phase 1: matrix 12 rows 22 cols
[2023-03-16 05:15:33] [INFO ] Computed 10 place invariants in 1 ms
[2023-03-16 05:15:33] [INFO ] Implicit Places using invariants in 41 ms returned []
[2023-03-16 05:15:33] [INFO ] Invariant cache hit.
[2023-03-16 05:15:33] [INFO ] Implicit Places using invariants and state equation in 51 ms returned []
Implicit Place search using SMT with State Equation took 94 ms to find 0 implicit places.
Starting structural reductions in SI_CTL mode, iteration 2 : 22/32 places, 12/16 transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 193 ms. Remains : 22/32 places, 12/16 transitions.
[2023-03-16 05:15:33] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:33] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:33] [INFO ] Input system was already deterministic with 12 transitions.
[2023-03-16 05:15:33] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:33] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:33] [INFO ] Time to serialize gal into /tmp/CTLFireability5839356296027308055.gal : 1 ms
[2023-03-16 05:15:33] [INFO ] Time to serialize properties into /tmp/CTLFireability12240747919836412745.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability5839356296027308055.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability12240747919836412745.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,646646,0.158488,6388,2,3443,5,20993,6,0,98,18455,0


Converting to forward existential form...Done !
original formula: EF((EG(((((((in1_0<1)||(c6_0<1))||(in3_0<1))&&(((in1_0<1)||(c5_0<1))||(in3_0<1))) + !(A((((in1_0>=1)&&(c6_0>=1))&&(in3_0>=1)) U (((aux16_...377
=> equivalent forward existential formula: (([((FwdU(Init,TRUE) * EG(((((((in1_0<1)||(c6_0<1))||(in3_0<1))&&(((in1_0<1)||(c5_0<1))||(in3_0<1))) + !(!((E(!(...1397
Reverse transition relation is NOT exact ! Due to transitions t8, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0...163
(forward)formula 0,1,6.18939,139780,1,0,1193,767921,70,706,948,1.0261e+06,1184
FORMULA PermAdmissibility-COL-10-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 24 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.1 ms
Discarding 8 places :
Also discarding 4 output transitions
Drop transitions removed 4 transitions
Ensure Unique test removed 1 places
Applied a total of 1 rules in 3 ms. Remains 23 /32 variables (removed 9) and now considering 12/16 (removed 4) transitions.
// Phase 1: matrix 12 rows 23 cols
[2023-03-16 05:15:40] [INFO ] Computed 11 place invariants in 1 ms
[2023-03-16 05:15:40] [INFO ] Implicit Places using invariants in 53 ms returned [4, 6, 13]
Discarding 3 places :
Implicit Place search using SMT only with invariants took 54 ms to find 3 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 20/32 places, 12/16 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 20 transition count 11
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 19 transition count 11
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 2 place count 19 transition count 10
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 4 place count 18 transition count 10
Applied a total of 4 rules in 3 ms. Remains 18 /20 variables (removed 2) and now considering 10/12 (removed 2) transitions.
// Phase 1: matrix 10 rows 18 cols
[2023-03-16 05:15:40] [INFO ] Computed 8 place invariants in 0 ms
[2023-03-16 05:15:40] [INFO ] Implicit Places using invariants in 31 ms returned []
[2023-03-16 05:15:40] [INFO ] Invariant cache hit.
[2023-03-16 05:15:40] [INFO ] Implicit Places using invariants and state equation in 49 ms returned []
Implicit Place search using SMT with State Equation took 83 ms to find 0 implicit places.
Starting structural reductions in SI_CTL mode, iteration 2 : 18/32 places, 10/16 transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 143 ms. Remains : 18/32 places, 10/16 transitions.
[2023-03-16 05:15:40] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:40] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:40] [INFO ] Input system was already deterministic with 10 transitions.
[2023-03-16 05:15:40] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:15:40] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:40] [INFO ] Time to serialize gal into /tmp/CTLFireability12255662020617234292.gal : 1 ms
[2023-03-16 05:15:40] [INFO ] Time to serialize properties into /tmp/CTLFireability2142699181034629340.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability12255662020617234292.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability2142699181034629340.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,184756,0.908417,18692,2,18469,5,102652,6,0,82,91880,0


Converting to forward existential form...Done !
original formula: AF(AG(A((EF((((aux8_0>=1)&&(aux6_0>=1))&&(c11_0>=1))) * (E((((aux8_0>=1)&&(aux6_0>=1))&&(c11_0>=1)) U (((c7_0>=1)&&(in2_0>=1))&&(in4_0>=1...296
=> equivalent forward existential formula: [FwdG(Init,!(!(E(TRUE U !(!((E(!(!(E((((aux7_0>=1)&&(aux5_0>=1))&&(c9_0>=1)) U (((c16_0>=1)&&(aux10_0>=1))&&(aux...568
Reverse transition relation is NOT exact ! Due to transitions t0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0...162
dead was empty
(forward)formula 0,1,11.368,235212,1,0,255,1.16162e+06,53,99,759,1.52186e+06,269
FORMULA PermAdmissibility-COL-10-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 0 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 31 cols
[2023-03-16 05:15:51] [INFO ] Computed 15 place invariants in 2 ms
[2023-03-16 05:15:51] [INFO ] Implicit Places using invariants in 49 ms returned [5, 7, 13]
Discarding 3 places :
Implicit Place search using SMT only with invariants took 50 ms to find 3 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 28/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 28 /28 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 52 ms. Remains : 28/32 places, 16/16 transitions.
[2023-03-16 05:15:51] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:51] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:51] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:15:51] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:51] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:15:51] [INFO ] Time to serialize gal into /tmp/CTLFireability15908245345776727139.gal : 1 ms
[2023-03-16 05:15:51] [INFO ] Time to serialize properties into /tmp/CTLFireability2753976983482056715.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability15908245345776727139.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability2753976983482056715.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.513607,18452,2,19965,5,101742,6,0,128,91306,0


Converting to forward existential form...Done !
original formula: AX(E(E(AX(A((((c13_0>=1)&&(aux9_0>=1))&&(aux11_0>=1)) U (((c8_0>=1)&&(in2_0>=1))&&(in4_0>=1)))) U (!((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0...548
=> equivalent forward existential formula: [(EY(Init) * !(E(E(!(EX(!(!((E(!((((c8_0>=1)&&(in2_0>=1))&&(in4_0>=1))) U (!((((c13_0>=1)&&(aux9_0>=1))&&(aux11_...931
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
Detected timeout of ITS tools.
[2023-03-16 05:16:21] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:16:21] [INFO ] Applying decomposition
[2023-03-16 05:16:21] [INFO ] Flatten gal took : 2 ms
Converted graph to binary with : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202303021504/bin/convert-linux64' '-i' '/tmp/graph955915877994923673.txt' '-o' '/tmp/graph955915877994923673.bin' '-w' '/tmp/graph955915877994923673.weights'
Built communities with : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202303021504/bin/louvain-linux64' '/tmp/graph955915877994923673.bin' '-l' '-1' '-v' '-w' '/tmp/graph955915877994923673.weights' '-q' '0' '-e' '0.001'
[2023-03-16 05:16:22] [INFO ] Decomposing Gal with order
[2023-03-16 05:16:22] [INFO ] Rewriting arrays to variables to allow decomposition.
[2023-03-16 05:16:22] [INFO ] Removed a total of 3 redundant transitions.
[2023-03-16 05:16:22] [INFO ] Flatten gal took : 23 ms
[2023-03-16 05:16:22] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 1 ms.
[2023-03-16 05:16:22] [INFO ] Time to serialize gal into /tmp/CTLFireability10148422415643670504.gal : 2 ms
[2023-03-16 05:16:22] [INFO ] Time to serialize properties into /tmp/CTLFireability8265357567846867276.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability10148422415643670504.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability8265357567846867276.ctl'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...263
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,10.2604,148232,12250,7327,95493,19398,100,1.32473e+06,39,394395,0


Converting to forward existential form...Done !
Detected timeout of ITS tools.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 24 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.1 ms
Discarding 8 places :
Also discarding 4 output transitions
Drop transitions removed 4 transitions
Ensure Unique test removed 1 places
Applied a total of 1 rules in 4 ms. Remains 23 /32 variables (removed 9) and now considering 12/16 (removed 4) transitions.
// Phase 1: matrix 12 rows 23 cols
[2023-03-16 05:16:52] [INFO ] Computed 11 place invariants in 1 ms
[2023-03-16 05:16:52] [INFO ] Implicit Places using invariants in 76 ms returned [4, 6, 13, 15, 16, 17, 18]
Discarding 7 places :
Implicit Place search using SMT only with invariants took 78 ms to find 7 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 16/32 places, 12/16 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 14 transition count 10
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 2 place count 14 transition count 8
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 6 place count 12 transition count 8
Applied a total of 6 rules in 6 ms. Remains 12 /16 variables (removed 4) and now considering 8/12 (removed 4) transitions.
// Phase 1: matrix 8 rows 12 cols
[2023-03-16 05:16:52] [INFO ] Computed 4 place invariants in 0 ms
[2023-03-16 05:16:52] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-16 05:16:52] [INFO ] Invariant cache hit.
[2023-03-16 05:16:52] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 70 ms to find 0 implicit places.
Starting structural reductions in SI_CTL mode, iteration 2 : 12/32 places, 8/16 transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 158 ms. Remains : 12/32 places, 8/16 transitions.
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:16:52] [INFO ] Input system was already deterministic with 8 transitions.
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:16:52] [INFO ] Time to serialize gal into /tmp/CTLFireability17450219284522613973.gal : 1 ms
[2023-03-16 05:16:52] [INFO ] Time to serialize properties into /tmp/CTLFireability14341481029757071417.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability17450219284522613973.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability14341481029757071417.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...285
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,43758,0.044638,4208,2,748,5,4605,6,0,56,4783,0


Converting to forward existential form...Done !
original formula: AG(EF(((((c7_0>=1)&&(in2_0>=1))&&((in4_0>=1)&&(c15_0>=1)))&&((aux10_0>=1)&&(aux12_0>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U ((((c7_0>=1)&&(in2_0>=1))&&((in4_0>=1)&&(c15_0>=1)))&&((aux10_0>=1)&&(aux12_0>=1)...169
Reverse transition relation is NOT exact ! Due to transitions t0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0...161
(forward)formula 0,0,0.150276,5528,1,0,23,11762,35,13,460,12911,26
FORMULA PermAdmissibility-COL-10-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 20 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.1 ms
Discarding 12 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Applied a total of 1 rules in 2 ms. Remains 20 /32 variables (removed 12) and now considering 10/16 (removed 6) transitions.
// Phase 1: matrix 10 rows 20 cols
[2023-03-16 05:16:52] [INFO ] Computed 10 place invariants in 1 ms
[2023-03-16 05:16:52] [INFO ] Implicit Places using invariants in 48 ms returned [12, 14]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 49 ms to find 2 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 18/32 places, 10/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 10/10 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 53 ms. Remains : 18/32 places, 10/16 transitions.
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:16:52] [INFO ] Input system was already deterministic with 10 transitions.
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:16:52] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:16:52] [INFO ] Time to serialize gal into /tmp/CTLFireability13849196077608633966.gal : 1 ms
[2023-03-16 05:16:52] [INFO ] Time to serialize properties into /tmp/CTLFireability3542784040179692985.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability13849196077608633966.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability3542784040179692985.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,184756,0.147728,6104,2,4169,5,17218,6,0,80,14991,0


Converting to forward existential form...Done !
original formula: EF((((c13_0>=1)&&(aux9_0>=1)) * ((aux11_0>=1) * A((((aux7_0>=1)&&(aux5_0>=1))&&(c9_0>=1)) U EG(!(((((c7_0>=1)&&(in2_0>=1))&&(in4_0>=1))||...199
=> equivalent forward existential formula: [((((FwdU(Init,TRUE) * ((c13_0>=1)&&(aux9_0>=1))) * (aux11_0>=1)) * !(EG(!(EG(!(((((c7_0>=1)&&(in2_0>=1))&&(in4_...453
Reverse transition relation is NOT exact ! Due to transitions t0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0...162
(forward)formula 0,1,2.57118,61324,1,0,560,324201,47,270,741,374437,606
FORMULA PermAdmissibility-COL-10-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 05:16:55] [INFO ] Computed 16 place invariants in 1 ms
[2023-03-16 05:16:55] [INFO ] Implicit Places using invariants in 65 ms returned [16, 18]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 66 ms to find 2 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 30/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 69 ms. Remains : 30/32 places, 16/16 transitions.
[2023-03-16 05:16:55] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:16:55] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:16:55] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:16:55] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:16:55] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:16:55] [INFO ] Time to serialize gal into /tmp/CTLFireability16679354204421003739.gal : 1 ms
[2023-03-16 05:16:55] [INFO ] Time to serialize properties into /tmp/CTLFireability11970606868797536078.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability16679354204421003739.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability11970606868797536078.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...285
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,1.85891,36384,2,38698,5,187962,6,0,134,174307,0


Converting to forward existential form...Done !
original formula: EF(!(A((((c15_0>=1)&&(aux10_0>=1))&&(aux12_0>=1)) U ((!(((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1))||(((aux16_0>=1)&&(aux14_0>=1))&&(c19_0...391
=> equivalent forward existential formula: (([(((FwdU(FwdU(Init,TRUE),!(((!(((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1))||(((aux16_0>=1)&&(aux14_0>=1))&&(c19...1764
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,8.355,132400,1,0,35,534189,62,26,1320,592475,49
FORMULA PermAdmissibility-COL-10-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 30 cols
[2023-03-16 05:17:03] [INFO ] Computed 14 place invariants in 1 ms
[2023-03-16 05:17:03] [INFO ] Implicit Places using invariants in 98 ms returned [4, 6, 12, 13, 14, 15, 16, 17, 22, 23, 24, 25]
Discarding 12 places :
Implicit Place search using SMT only with invariants took 100 ms to find 12 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 18/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 103 ms. Remains : 18/32 places, 16/16 transitions.
[2023-03-16 05:17:03] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:17:03] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:17:03] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 05:17:03] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:17:03] [INFO ] Flatten gal took : 1 ms
[2023-03-16 05:17:03] [INFO ] Time to serialize gal into /tmp/CTLFireability12729846407014877182.gal : 1 ms
[2023-03-16 05:17:03] [INFO ] Time to serialize properties into /tmp/CTLFireability10544684558661541158.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability12729846407014877182.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability10544684558661541158.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...285
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,0.079326,4768,2,629,5,8082,6,0,89,8796,0


Converting to forward existential form...Done !
original formula: EX(AF(AG(AF((((c15_0<1)||(aux10_0<1))||(aux12_0<1))))))
=> equivalent forward existential formula: [(EY(Init) * !(EG(!(!(E(TRUE U !(!(EG(!((((c15_0<1)||(aux10_0<1))||(aux12_0<1))))))))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,0.904116,20864,1,0,186,104345,58,20,637,116794,198
FORMULA PermAdmissibility-COL-10-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

[2023-03-16 05:17:04] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:17:04] [INFO ] Flatten gal took : 2 ms
[2023-03-16 05:17:04] [INFO ] Applying decomposition
[2023-03-16 05:17:04] [INFO ] Flatten gal took : 1 ms
Converted graph to binary with : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202303021504/bin/convert-linux64' '-i' '/tmp/graph1766801254229589297.txt' '-o' '/tmp/graph1766801254229589297.bin' '-w' '/tmp/graph1766801254229589297.weights'
Built communities with : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202303021504/bin/louvain-linux64' '/tmp/graph1766801254229589297.bin' '-l' '-1' '-v' '-w' '/tmp/graph1766801254229589297.weights' '-q' '0' '-e' '0.001'
[2023-03-16 05:17:04] [INFO ] Decomposing Gal with order
[2023-03-16 05:17:04] [INFO ] Rewriting arrays to variables to allow decomposition.
[2023-03-16 05:17:04] [INFO ] Removed a total of 4 redundant transitions.
[2023-03-16 05:17:04] [INFO ] Flatten gal took : 5 ms
[2023-03-16 05:17:04] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 1 ms.
[2023-03-16 05:17:04] [INFO ] Time to serialize gal into /tmp/CTLFireability15058284665334280836.gal : 2 ms
[2023-03-16 05:17:04] [INFO ] Time to serialize properties into /tmp/CTLFireability14617006699509557903.ctl : 5 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability15058284665334280836.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability14617006699509557903.ctl'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...264
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,17.2626,250168,25005,14683,226594,48834,94,1.32084e+06,51,1.83779e+06,0


Converting to forward existential form...Done !
original formula: AX(E(E(AX(A((((i3.u2.c13_0>=1)&&(u1.aux9_0>=1))&&(u1.aux11_0>=1)) U (((i3.u4.c8_0>=1)&&(i3.u4.in2_0>=1))&&(i3.u4.in4_0>=1)))) U (!((((i3....701
=> equivalent forward existential formula: [(EY(Init) * !(E(E(!(EX(!(!((E(!((((i3.u4.c8_0>=1)&&(i3.u4.in2_0>=1))&&(i3.u4.in4_0>=1))) U (!((((i3.u2.c13_0>=1...1168
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
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Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Detected timeout of ITS tools.
[2023-03-16 05:38:01] [INFO ] Applying decomposition
[2023-03-16 05:38:01] [INFO ] Flatten gal took : 3 ms
[2023-03-16 05:38:01] [INFO ] Decomposing Gal with order
[2023-03-16 05:38:01] [INFO ] Rewriting arrays to variables to allow decomposition.
[2023-03-16 05:38:01] [INFO ] Removed a total of 16 redundant transitions.
[2023-03-16 05:38:01] [INFO ] Flatten gal took : 10 ms
[2023-03-16 05:38:02] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 1 ms.
[2023-03-16 05:38:02] [INFO ] Time to serialize gal into /tmp/CTLFireability13503947654366009451.gal : 1 ms
[2023-03-16 05:38:02] [INFO ] Time to serialize properties into /tmp/CTLFireability12105677791918480065.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability13503947654366009451.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability12105677791918480065.ctl'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...264
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.31174e+06,5.32201,164096,37786,22,457312,92,83,288767,6,234,0


Converting to forward existential form...Done !
original formula: AX(E(E(AX(A((((c13.c13_0>=1)&&(aux9.aux9_0>=1))&&(aux11.aux11_0>=1)) U (((c8.c8_0>=1)&&(in2.in2_0>=1))&&(in4.in4_0>=1)))) U (!((((aux7.au...705
=> equivalent forward existential formula: [(EY(Init) * !(E(E(!(EX(!(!((E(!((((c8.c8_0>=1)&&(in2.in2_0>=1))&&(in4.in4_0>=1))) U (!((((c13.c13_0>=1)&&(aux9....1172
Reverse transition relation is NOT exact ! Due to transitions t15, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,93.8148,2449324,1,0,6.42136e+06,2520,316,5.58073e+06,41,14205,351927
FORMULA PermAdmissibility-COL-10-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Total runtime 1523700 ms.

BK_STOP 1678945177097

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-smll-167863536400482"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-10.tgz
mv PermAdmissibility-COL-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;