Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r261-smll-167863536400474.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool itstools
Input is PermAdmissibility-COL-05, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-smll-167863536400474
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 8.1K Feb 26 01:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 01:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 01:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 01:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.8K Feb 26 01:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Feb 26 01:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 26 01:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 01:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 54K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-00
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-01
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-02
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-03
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-04
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-05
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-06
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-07
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-08
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-09
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-10
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-11
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-12
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-13
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-14
FORMULA_NAME PermAdmissibility-COL-05-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678940179352

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-COL-05
Not applying reductions.
Model is COL
CTLFireability COL
Running Version 202303021504
[2023-03-16 04:16:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2023-03-16 04:16:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 04:16:23] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-16 04:16:23] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-16 04:16:24] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1085 ms
[2023-03-16 04:16:24] [INFO ] Imported 40 HL places and 16 HL transitions for a total of 208 PT places and 1024.0 transition bindings in 35 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 28 ms.
[2023-03-16 04:16:24] [INFO ] Built PT skeleton of HLPN with 40 places and 16 transitions 83 arcs in 8 ms.
[2023-03-16 04:16:24] [INFO ] Skeletonized 16 HLPN properties in 5 ms.
Computed a total of 40 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 40 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 9 formulas.
Remains 15 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 1 formulas.
FORMULA PermAdmissibility-COL-05-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 40 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 40 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Finished random walk after 450 steps, including 4 resets, run visited all 22 properties in 44 ms. (steps per millisecond=10 )
[2023-03-16 04:16:24] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-16 04:16:24] [INFO ] Flatten gal took : 56 ms
FORMULA PermAdmissibility-COL-05-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PermAdmissibility-COL-05-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 04:16:24] [INFO ] Flatten gal took : 19 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :input
Symmetric sort wr.t. initial detected :input
Symmetric sort wr.t. initial and guards detected :input
Applying symmetric unfolding of full symmetric sort :input domain size was 8
[2023-03-16 04:16:24] [INFO ] Unfolded HLPN to a Petri net with 40 places and 16 transitions 83 arcs in 30 ms.
[2023-03-16 04:16:24] [INFO ] Unfolded 13 HLPN properties in 1 ms.
Support contains 32 out of 40 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 16/16 transitions.
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 32 transition count 16
Applied a total of 8 rules in 12 ms. Remains 32 /40 variables (removed 8) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 04:16:24] [INFO ] Computed 16 place invariants in 9 ms
[2023-03-16 04:16:25] [INFO ] Implicit Places using invariants in 347 ms returned []
[2023-03-16 04:16:25] [INFO ] Invariant cache hit.
[2023-03-16 04:16:25] [INFO ] Implicit Places using invariants and state equation in 166 ms returned []
Implicit Place search using SMT with State Equation took 587 ms to find 0 implicit places.
[2023-03-16 04:16:25] [INFO ] Invariant cache hit.
[2023-03-16 04:16:25] [INFO ] Dead Transitions using invariants and state equation in 56 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 32/40 places, 16/16 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 657 ms. Remains : 32/40 places, 16/16 transitions.
Support contains 32 out of 32 places after structural reductions.
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 5 ms
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 10 ms
[2023-03-16 04:16:25] [INFO ] Input system was already deterministic with 16 transitions.
Incomplete random walk after 10003 steps, including 103 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 27) seen :26
Finished Best-First random walk after 73 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=36 )
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:25] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 32 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 32 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 2 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 30 cols
[2023-03-16 04:16:25] [INFO ] Computed 14 place invariants in 5 ms
[2023-03-16 04:16:25] [INFO ] Implicit Places using invariants in 90 ms returned [4, 6, 12, 13, 22, 23, 25, 26]
Discarding 8 places :
Implicit Place search using SMT only with invariants took 94 ms to find 8 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 22/32 places, 16/16 transitions.
Applied a total of 0 rules in 2 ms. Remains 22 /22 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 98 ms. Remains : 22/32 places, 16/16 transitions.
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:25] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:25] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:25] [INFO ] Time to serialize gal into /tmp/CTLFireability17217605193087687873.gal : 3 ms
[2023-03-16 04:16:25] [INFO ] Time to serialize properties into /tmp/CTLFireability2565671789889452591.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability17217605193087687873.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability2565671789889452591.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.126107,5516,2,1405,5,12224,6,0,105,14185,0


Converting to forward existential form...Done !
original formula: E(EF(((EF(EG((((c16_0>=1)&&(aux10_0>=1))&&(aux12_0>=1)))) * (aux7_0>=1)) * ((c9_0>=1)&&(aux5_0>=1)))) U EX((((aux8_0>=1)&&(aux6_0>=1))&&(...167
=> equivalent forward existential formula: [(EY(FwdU(Init,E(TRUE U ((E(TRUE U EG((((c16_0>=1)&&(aux10_0>=1))&&(aux12_0>=1)))) * (aux7_0>=1)) * ((c9_0>=1)&&...225
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,0,0.626867,16416,1,0,108,70792,61,20,710,76833,124
FORMULA PermAdmissibility-COL-05-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
[2023-03-16 04:16:26] [INFO ] Invariant cache hit.
[2023-03-16 04:16:26] [INFO ] Implicit Places using invariants in 71 ms returned [12, 13]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 73 ms to find 2 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 28/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 28 /28 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 75 ms. Remains : 28/32 places, 16/16 transitions.
[2023-03-16 04:16:26] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:26] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:26] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:26] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:26] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:26] [INFO ] Time to serialize gal into /tmp/CTLFireability8327603175174787084.gal : 1 ms
[2023-03-16 04:16:26] [INFO ] Time to serialize properties into /tmp/CTLFireability1094456288263987896.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability8327603175174787084.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability1094456288263987896.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.347034,11188,2,11607,5,38337,6,0,130,34166,0


Converting to forward existential form...Done !
original formula: (AG((((c15_0>=1)&&(aux10_0>=1))&&(aux12_0>=1))) + AG(((((EX((AG((((aux8_0>=1)&&(aux6_0>=1))&&(c12_0>=1))) + E((((aux13_0>=1)&&(c17_0>=1))...693
=> equivalent forward existential formula: ([(((FwdU((Init * !(!(E(TRUE U !((((c15_0>=1)&&(aux10_0>=1))&&(aux12_0>=1))))))),TRUE) * !((((EX((!(E(TRUE U !((...1686
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,1,2.33768,60440,1,0,174,242279,67,65,1035,265092,211
FORMULA PermAdmissibility-COL-05-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
[2023-03-16 04:16:28] [INFO ] Invariant cache hit.
[2023-03-16 04:16:29] [INFO ] Implicit Places using invariants in 58 ms returned [5, 7, 12, 13, 14, 15]
Discarding 6 places :
Implicit Place search using SMT only with invariants took 59 ms to find 6 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 24/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 61 ms. Remains : 24/32 places, 16/16 transitions.
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Time to serialize gal into /tmp/CTLFireability17670159882705883715.gal : 1 ms
[2023-03-16 04:16:29] [INFO ] Time to serialize properties into /tmp/CTLFireability1091850701736107705.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability17670159882705883715.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability1091850701736107705.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.064895,5604,2,2624,5,11669,6,0,114,11054,0


Converting to forward existential form...Done !
original formula: (EG((EF(EX((((aux7_0<1)||(c9_0<1))||(aux5_0<1)))) * (((c14_0<1)||(aux9_0<1))||(aux11_0<1)))) * (EG((((aux16_0<1)||(aux14_0<1))||(c20_0<1)...208
=> equivalent forward existential formula: ([(Init * !(EG((E(TRUE U EX((((aux7_0<1)||(c9_0<1))||(aux5_0<1)))) * (((c14_0<1)||(aux9_0<1))||(aux11_0<1))))))]...293
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,0,0.760136,21208,1,0,110,89092,54,24,838,98101,127
FORMULA PermAdmissibility-COL-05-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 04:16:29] [INFO ] Computed 16 place invariants in 5 ms
[2023-03-16 04:16:29] [INFO ] Implicit Places using invariants in 47 ms returned [4, 6, 16, 17]
Discarding 4 places :
Implicit Place search using SMT only with invariants took 48 ms to find 4 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 28/32 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 28 /28 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 50 ms. Remains : 28/32 places, 16/16 transitions.
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:29] [INFO ] Time to serialize gal into /tmp/CTLFireability5102141675339491560.gal : 1 ms
[2023-03-16 04:16:29] [INFO ] Time to serialize properties into /tmp/CTLFireability15860069377652460943.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability5102141675339491560.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability15860069377652460943.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.074652,5908,2,3104,5,13072,6,0,126,11910,0


Converting to forward existential form...Done !
original formula: (EX(EG((((((c16_0>=1)&&(aux10_0>=1))&&((aux12_0>=1)&&(aux16_0>=1)))&&((aux14_0>=1)&&(c20_0>=1))) + EX((((aux7_0<1)||(c9_0<1))||(aux5_0<1)...440
=> equivalent forward existential formula: ((([(EY((Init * EX(EG((((((c16_0>=1)&&(aux10_0>=1))&&((aux12_0>=1)&&(aux16_0>=1)))&&((aux14_0>=1)&&(c20_0>=1))) ...1005
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,0,0.591861,21064,1,0,116,86593,67,24,973,91818,127
FORMULA PermAdmissibility-COL-05-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Applied a total of 0 rules in 5 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 30 cols
[2023-03-16 04:16:30] [INFO ] Computed 14 place invariants in 2 ms
[2023-03-16 04:16:30] [INFO ] Implicit Places using invariants in 96 ms returned [4, 5, 6, 7, 12, 13, 14, 15, 16, 18, 23, 25]
Discarding 12 places :
Implicit Place search using SMT only with invariants took 100 ms to find 12 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 18/32 places, 16/16 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 17 transition count 7
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 16 place count 9 transition count 7
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 16 place count 9 transition count 4
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 22 place count 6 transition count 4
Applied a total of 22 rules in 6 ms. Remains 6 /18 variables (removed 12) and now considering 4/16 (removed 12) transitions.
// Phase 1: matrix 4 rows 6 cols
[2023-03-16 04:16:30] [INFO ] Computed 2 place invariants in 0 ms
[2023-03-16 04:16:30] [INFO ] Implicit Places using invariants in 22 ms returned []
[2023-03-16 04:16:30] [INFO ] Invariant cache hit.
[2023-03-16 04:16:30] [INFO ] Implicit Places using invariants and state equation in 29 ms returned []
Implicit Place search using SMT with State Equation took 55 ms to find 0 implicit places.
Starting structural reductions in SI_CTL mode, iteration 2 : 6/32 places, 4/16 transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 167 ms. Remains : 6/32 places, 4/16 transitions.
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:30] [INFO ] Input system was already deterministic with 4 transitions.
Finished random walk after 13 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=6 )
FORMULA PermAdmissibility-COL-05-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:30] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality12597374569157746107.gal : 1 ms
[2023-03-16 04:16:30] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality9123603945909163528.prop : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-reach-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/ReachabilityCardinality12597374569157746107.gal' '-t' 'CGAL' '-reachable-file' '/tmp/ReachabilityCardinality9123603945909163528.prop' '--nowitness' '--gen-order' 'FOLLOW'

ITS runner failed with exception null
java.lang.InterruptedException
at java.base/java.lang.Object.wait(Native Method)
at java.base/java.lang.Thread.join(Thread.java:1304)
at java.base/java.lang.Thread.join(Thread.java:1372)
at fr.lip6.move.gal.application.runner.AbstractRunner.join(AbstractRunner.java:27)
at fr.lip6.move.gal.application.runner.its.ITSRunner.join(ITSRunner.java:177)
at fr.lip6.move.gal.application.solver.global.GlobalPropertySolver.verifyWithSDD(GlobalPropertySolver.java:675)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.lambda$2(ReachabilitySolver.java:63)
at java.base/java.lang.Thread.run(Thread.java:833)
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 31 cols
[2023-03-16 04:16:30] [INFO ] Computed 15 place invariants in 1 ms
its-reach command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-reach-linux64 --gc-threshold 2000000 --quiet ...329
Loading property file /tmp/ReachabilityCardinality9123603945909163528.prop.
Found states matching all0 target predicate
Will report total states built up to this point. Computation was interrupted after 3 fixpoint passes
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri\_inst\_inst,5,0.015951,3312,2,16,6,49,6,0,30,21,0
Total reachable state count : 5

[2023-03-16 04:16:30] [INFO ] Implicit Places using invariants in 111 ms returned [12, 15, 16, 17, 19, 23, 27]
Discarding 7 places :
Implicit Place search using SMT only with invariants took 114 ms to find 7 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 24/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 117 ms. Remains : 24/32 places, 16/16 transitions.
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 5 ms
[2023-03-16 04:16:30] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:30] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:30] [INFO ] Time to serialize gal into /tmp/CTLFireability944390986300292071.gal : 1 ms
[2023-03-16 04:16:30] [INFO ] Time to serialize properties into /tmp/CTLFireability15546329510048206299.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability944390986300292071.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability15546329510048206299.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.031433,4288,2,1105,5,5174,6,0,111,4577,0


Converting to forward existential form...Done !
original formula: (AG((AG((((c16_0<1)||(aux10_0<1))||(aux12_0<1))) + AG((((c13_0>=1)&&(aux9_0>=1)) * ((aux11_0>=1) * EG((((aux13_0<1)||(aux15_0<1))||(c18_0...256
=> equivalent forward existential formula: ([(FwdU((FwdU((Init * !(EX(((((aux13_0>=1)&&(c17_0>=1))&&(aux15_0>=1))||(((c8_0>=1)&&(in2_0>=1))&&(in4_0>=1)))))...739
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,0,0.289539,11416,1,0,167,40010,60,60,847,46044,201
FORMULA PermAdmissibility-COL-05-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 16 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.1 ms
Discarding 16 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Ensure Unique test removed 1 places
Applied a total of 1 rules in 4 ms. Remains 15 /32 variables (removed 17) and now considering 8/16 (removed 8) transitions.
// Phase 1: matrix 8 rows 15 cols
[2023-03-16 04:16:31] [INFO ] Computed 7 place invariants in 0 ms
[2023-03-16 04:16:31] [INFO ] Implicit Places using invariants in 38 ms returned [4]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 40 ms to find 1 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 14/32 places, 8/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 46 ms. Remains : 14/32 places, 8/16 transitions.
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:31] [INFO ] Input system was already deterministic with 8 transitions.
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:31] [INFO ] Time to serialize gal into /tmp/CTLFireability5694831232690268441.gal : 1 ms
[2023-03-16 04:16:31] [INFO ] Time to serialize properties into /tmp/CTLFireability5571502476284498623.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability5694831232690268441.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability5571502476284498623.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1287,0.038828,4220,2,1584,5,5704,6,0,64,4700,0


Converting to forward existential form...Done !
original formula: (EG(((((aux8_0<1)||(aux6_0<1))||(c11_0<1)) * E((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1)) U (((c8_0>=1)&&(in2_0>=1))&&(in4_0>=1))))) + EG(...195
=> equivalent forward existential formula: ([FwdG(Init,((((aux8_0<1)||(aux6_0<1))||(c11_0<1)) * E((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1)) U (((c8_0>=1)&&...256
Reverse transition relation is NOT exact ! Due to transitions t5, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0...161
dead was empty
Hit Full ! (commute/partial/dont) 4/0/4
(forward)formula 0,0,0.261679,8708,1,0,83,25292,44,27,496,25146,91
FORMULA PermAdmissibility-COL-05-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 31 cols
[2023-03-16 04:16:31] [INFO ] Computed 15 place invariants in 1 ms
[2023-03-16 04:16:31] [INFO ] Implicit Places using invariants in 94 ms returned [5, 7, 14, 15, 16, 23, 27]
Discarding 7 places :
Implicit Place search using SMT only with invariants took 96 ms to find 7 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 24/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 98 ms. Remains : 24/32 places, 16/16 transitions.
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:31] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:31] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:31] [INFO ] Time to serialize gal into /tmp/CTLFireability6492099030644318029.gal : 0 ms
[2023-03-16 04:16:31] [INFO ] Time to serialize properties into /tmp/CTLFireability18161646445700386548.ctl : 4 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability6492099030644318029.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability18161646445700386548.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.046173,4288,2,890,5,4647,6,0,111,4559,0


Converting to forward existential form...Done !
original formula: AG((E(EF(EG((((c14_0>=1)&&(aux9_0>=1))&&(aux11_0>=1)))) U (EF(((((aux7_0>=1)&&(c9_0>=1))&&(aux5_0>=1))||(((in1_0>=1)&&(c6_0>=1))&&(in3_0>...308
=> equivalent forward existential formula: ([(FwdU(Init,TRUE) * !(E(E(TRUE U EG((((c14_0>=1)&&(aux9_0>=1))&&(aux11_0>=1)))) U (E(TRUE U ((((aux7_0>=1)&&(c9...425
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,0,0.554143,14056,1,0,164,57707,59,60,814,64977,195
FORMULA PermAdmissibility-COL-05-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 32 cols
[2023-03-16 04:16:32] [INFO ] Computed 16 place invariants in 1 ms
[2023-03-16 04:16:32] [INFO ] Implicit Places using invariants in 64 ms returned []
[2023-03-16 04:16:32] [INFO ] Invariant cache hit.
[2023-03-16 04:16:32] [INFO ] Implicit Places using invariants and state equation in 75 ms returned []
Implicit Place search using SMT with State Equation took 142 ms to find 0 implicit places.
[2023-03-16 04:16:32] [INFO ] Invariant cache hit.
[2023-03-16 04:16:32] [INFO ] Dead Transitions using invariants and state equation in 73 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 217 ms. Remains : 32/32 places, 16/16 transitions.
[2023-03-16 04:16:32] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:32] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:32] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:32] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:32] [INFO ] Flatten gal took : 4 ms
[2023-03-16 04:16:32] [INFO ] Time to serialize gal into /tmp/CTLFireability16136360224941159259.gal : 1 ms
[2023-03-16 04:16:32] [INFO ] Time to serialize properties into /tmp/CTLFireability200867368619453360.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability16136360224941159259.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability200867368619453360.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...283
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.079551,5940,2,4076,5,15553,6,0,142,12261,0


Converting to forward existential form...Done !
original formula: !(E((((((((((c14_0>=1)&&(aux9_0>=1))&&((aux11_0>=1)&&(c16_0>=1)))&&(((aux10_0>=1)&&(aux12_0>=1))&&((((aux13_0>=1)&&(aux15_0>=1))&&(c18_0>...861
=> equivalent forward existential formula: [(FwdU(Init,(((((((((c14_0>=1)&&(aux9_0>=1))&&((aux11_0>=1)&&(c16_0>=1)))&&(((aux10_0>=1)&&(aux12_0>=1))&&((((au...921
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
(forward)formula 0,0,2.17094,53904,1,0,519,275606,76,268,1164,288885,559
FORMULA PermAdmissibility-COL-05-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 31 transition count 16
Applied a total of 1 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 31 cols
[2023-03-16 04:16:34] [INFO ] Computed 15 place invariants in 1 ms
[2023-03-16 04:16:34] [INFO ] Implicit Places using invariants in 74 ms returned [4, 5, 6, 7, 12, 15, 16, 17, 19, 23, 24, 26, 27]
Discarding 13 places :
Implicit Place search using SMT only with invariants took 84 ms to find 13 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 18/32 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 85 ms. Remains : 18/32 places, 16/16 transitions.
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:34] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:34] [INFO ] Time to serialize gal into /tmp/CTLFireability17405418922824303266.gal : 1 ms
[2023-03-16 04:16:34] [INFO ] Time to serialize properties into /tmp/CTLFireability6089313770627772250.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability17405418922824303266.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability6089313770627772250.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.009754,3708,2,159,5,1174,6,0,87,1220,0


Converting to forward existential form...Done !
original formula: EX(EG(AF(EX(AX((((c7_0>=1)&&(in2_0>=1))&&(in4_0>=1)))))))
=> equivalent forward existential formula: [FwdG(EY(Init),!(EG(!(EX(!(EX(!((((c7_0>=1)&&(in2_0>=1))&&(in4_0>=1))))))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
dead was empty
(forward)formula 0,0,0.098697,6348,1,0,119,17788,52,29,524,21015,132
FORMULA PermAdmissibility-COL-05-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 30 cols
[2023-03-16 04:16:34] [INFO ] Computed 14 place invariants in 1 ms
[2023-03-16 04:16:34] [INFO ] Implicit Places using invariants in 113 ms returned [4, 5, 6, 7, 12, 13, 22, 23, 25, 26]
Discarding 10 places :
Implicit Place search using SMT only with invariants took 120 ms to find 10 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 20/32 places, 16/16 transitions.
Applied a total of 0 rules in 5 ms. Remains 20 /20 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 127 ms. Remains : 20/32 places, 16/16 transitions.
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:34] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:34] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:34] [INFO ] Time to serialize gal into /tmp/CTLFireability14757147143587415439.gal : 1 ms
[2023-03-16 04:16:34] [INFO ] Time to serialize properties into /tmp/CTLFireability9849245245395871888.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability14757147143587415439.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability9849245245395871888.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.083197,5572,2,1459,5,11938,6,0,97,13980,0


Converting to forward existential form...Done !
original formula: AG((EG(E((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1)) U (((aux8_0>=1)&&(aux6_0>=1))&&(c11_0>=1)))) + AF(((EX((((aux7_0>=1)&&(c9_0>=1))&&(aux...209
=> equivalent forward existential formula: [FwdG((FwdU(Init,TRUE) * !(EG(E((((aux7_0>=1)&&(aux5_0>=1))&&(c110_0>=1)) U (((aux8_0>=1)&&(aux6_0>=1))&&(c11_0>...264
Reverse transition relation is NOT exact ! Due to transitions t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :...164
dead was empty
(forward)formula 0,1,0.4291,14812,1,0,123,60155,58,31,628,67265,138
FORMULA PermAdmissibility-COL-05-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 16
Applied a total of 2 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 16/16 (removed 0) transitions.
[2023-03-16 04:16:35] [INFO ] Invariant cache hit.
[2023-03-16 04:16:35] [INFO ] Implicit Places using invariants in 45 ms returned [12, 13, 14, 15]
Discarding 4 places :
Implicit Place search using SMT only with invariants took 51 ms to find 4 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 26/32 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 53 ms. Remains : 26/32 places, 16/16 transitions.
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:35] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:35] [INFO ] Time to serialize gal into /tmp/CTLFireability17679580863276166848.gal : 1 ms
[2023-03-16 04:16:35] [INFO ] Time to serialize properties into /tmp/CTLFireability5186930674088179798.ctl : 0 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability17679580863276166848.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability5186930674088179798.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20349,0.080971,5632,2,3158,5,12918,6,0,122,11457,0


Converting to forward existential form...Done !
original formula: EX((EF((((aux13_0>=1)&&(c17_0>=1))&&((aux15_0>=1)&&(((aux16_0<1)||(aux14_0<1))||(c19_0<1))))) + A((E(AF((((c13_0>=1)&&(aux9_0>=1))&&(aux1...395
=> equivalent forward existential formula: ([(FwdU(EY(Init),TRUE) * (((aux13_0>=1)&&(c17_0>=1))&&((aux15_0>=1)&&(((aux16_0<1)||(aux14_0<1))||(c19_0<1)))))]...617
(forward)formula 0,1,0.136522,6424,1,0,9,13230,9,1,404,11872,4
FORMULA PermAdmissibility-COL-05-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 16/16 transitions.
Graph (complete) has 81 edges and 32 vertex of which 28 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Ensure Unique test removed 2 places
Applied a total of 1 rules in 3 ms. Remains 26 /32 variables (removed 6) and now considering 14/16 (removed 2) transitions.
// Phase 1: matrix 14 rows 26 cols
[2023-03-16 04:16:35] [INFO ] Computed 12 place invariants in 1 ms
[2023-03-16 04:16:35] [INFO ] Implicit Places using invariants in 53 ms returned [4, 5, 6, 7, 12, 13, 14, 15, 16, 18]
Discarding 10 places :
Implicit Place search using SMT only with invariants took 66 ms to find 10 implicit places.
Starting structural reductions in SI_CTL mode, iteration 1 : 16/32 places, 14/16 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 15 transition count 7
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 12 place count 9 transition count 7
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 12 place count 9 transition count 4
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 18 place count 6 transition count 4
Applied a total of 18 rules in 5 ms. Remains 6 /16 variables (removed 10) and now considering 4/14 (removed 10) transitions.
// Phase 1: matrix 4 rows 6 cols
[2023-03-16 04:16:35] [INFO ] Computed 2 place invariants in 0 ms
[2023-03-16 04:16:35] [INFO ] Implicit Places using invariants in 19 ms returned []
[2023-03-16 04:16:35] [INFO ] Invariant cache hit.
[2023-03-16 04:16:35] [INFO ] Implicit Places using invariants and state equation in 31 ms returned []
Implicit Place search using SMT with State Equation took 58 ms to find 0 implicit places.
Starting structural reductions in SI_CTL mode, iteration 2 : 6/32 places, 4/16 transitions.
Finished structural reductions in SI_CTL mode , in 2 iterations and 133 ms. Remains : 6/32 places, 4/16 transitions.
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 0 ms
[2023-03-16 04:16:35] [INFO ] Input system was already deterministic with 4 transitions.
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 2 ms
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 1 ms
[2023-03-16 04:16:35] [INFO ] Time to serialize gal into /tmp/CTLFireability14086755212917815905.gal : 0 ms
[2023-03-16 04:16:35] [INFO ] Time to serialize properties into /tmp/CTLFireability7615744470244486398.ctl : 1 ms
Invoking ITS tools like this :cd /home/mcc/execution;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64' '--gc-threshold' '2000000' '--quiet' '-i' '/tmp/CTLFireability14086755212917815905.gal' '-t' 'CGAL' '-ctl' '/tmp/CTLFireability7615744470244486398.ctl' '--gen-order' 'FOLLOW'

its-ctl command run as :

/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202303021504/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -...284
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,126,0.005186,3316,2,112,5,505,6,0,30,415,0


Converting to forward existential form...Done !
original formula: AG((AF((((aux13_0>=1)&&(aux15_0>=1))&&(c18_0>=1))) + (((aux13_0>=1)&&(aux15_0>=1))&&(c18_0>=1))))
=> equivalent forward existential formula: [FwdG((FwdU(Init,TRUE) * !((((aux13_0>=1)&&(aux15_0>=1))&&(c18_0>=1)))),!((((aux13_0>=1)&&(aux15_0>=1))&&(c18_0>...170
Hit Full ! (commute/partial/dont) 0/0/4
(forward)formula 0,0,0.013677,3632,1,0,28,1451,19,4,185,1544,28
FORMULA PermAdmissibility-COL-05-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

[2023-03-16 04:16:35] [INFO ] Flatten gal took : 3 ms
[2023-03-16 04:16:35] [INFO ] Flatten gal took : 2 ms
Total runtime 12842 ms.

BK_STOP 1678940196728

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-smll-167863536400474"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-05.tgz
mv PermAdmissibility-COL-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;