Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r254-tall-167856439400116.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool gold2022
Input is JoinFreeModules-PT-0005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r254-tall-167856439400116
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 7.4K Feb 25 11:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 25 11:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 11:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 11:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:18 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:18 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:18 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:18 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Mar 5 18:22 model.pnml
-rw-r--r-- 1 mcc users 6.8K Feb 25 11:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 64K Feb 25 11:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 11:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 25 11:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:18 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-00
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-01
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-02
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-03
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-04
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-05
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-06
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-07
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-08
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-09
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-10
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-11
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-12
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-13
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-14
FORMULA_NAME JoinFreeModules-PT-0005-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678673147283

gold2022
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> gold2022 --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt
MF=/home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
FORMULA JoinFreeModules-PT-0005-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 4 was solved

Query is NOT satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 5 was solved

Query is NOT satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 6 was solved

Query is satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 8 was solved

Query is NOT satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 10 was solved

Query is NOT satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 11 was solved

Query is satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 14 was solved

Query is satisfied.

FORMULA JoinFreeModules-PT-0005-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 15 was solved

Query is satisfied.
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Time left: 3590

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (8 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)
Search strategy option was ignored as the TAR engine is called.
Query index 0 was solved

Query is NOT satisfied.


Solved using Trace Abstraction Refinement

Spent 0.000251 on verification
@@@0.00,5536@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 1 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT TRACE_ABSTRACTION_REFINEMENT
Time left: 3590
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.047482 on verification
@@@0.05,59152@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 2 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3589
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@188.71,7589040@@@


Time left: 3287
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.048255 on verification
@@@0.06,59280@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 4 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3287
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.046342 on verification
@@@0.05,59280@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 5 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3286
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.047863 on verification
@@@0.05,59176@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 6 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3286
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.045989 on verification
@@@0.04,59180@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 7 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3286
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.049064 on verification
@@@0.05,59596@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.tP9jmwjJsY /home/mcc/BenchKit/bin/tmp/tmp.LuV2q4GjDt --binary-query-io 1 -x 8 -n

FORMULA JoinFreeModules-PT-0005-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3286
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 1 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 3286
------------------- QUERY 3 ----------------------
Running query 3 for 3286 seconds. Remaining: 1 queries and 3286 seconds
No solution found
Command terminated by signal 9
@@@226.01,9400036@@@
Command terminated by signal 9
@@@621.55,16147956@@@


Time left: 2664
Time left: 2664
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (1 in total)
Each query is verified by 4 parallel strategies for 2664 seconds
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@180.43,4087852@@@
Command terminated by signal 9
@@@250.82,5769464@@@
Command terminated by signal 9
@@@374.91,8279496@@@
Command terminated by signal 9
@@@767.14,16147872@@@


Time left: 1896
Time left: 1896
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (1 in total)
Each query is verified by 4 parallel strategies for 1896 seconds
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@159.19,4239388@@@
Command terminated by signal 9
@@@222.05,5626704@@@
Command terminated by signal 9
@@@359.05,8190628@@@
Command terminated by signal 9
@@@690.06,16146564@@@


Time left: 1206
Time left: 1206
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (1 in total)
Each query is verified by 4 parallel strategies for 1206 seconds
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@169.60,4180884@@@
Command terminated by signal 9
@@@242.63,5537612@@@
Command terminated by signal 9
@@@369.74,8129796@@@
Command terminated by signal 9
@@@696.22,16148200@@@


Time left: 509
Time left: 509
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (1 in total)
Each query is verified by 4 parallel strategies for 509 seconds
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@153.35,4287352@@@
Command terminated by signal 9
@@@214.04,5754952@@@
Command terminated by signal 9
@@@326.36,8377616@@@


Time left: -2
Out of time, terminating!
terminated-with-cleanup

BK_STOP 1678676739814

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="JoinFreeModules-PT-0005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gold2022"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool gold2022"
echo " Input is JoinFreeModules-PT-0005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r254-tall-167856439400116"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/JoinFreeModules-PT-0005.tgz
mv JoinFreeModules-PT-0005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;