Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r244-tall-167856431300029.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is HypertorusGrid-PT-d2k3p2b04, examination is Liveness
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r244-tall-167856431300029
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 552K
-rw-r--r-- 1 mcc users 7.9K Feb 26 11:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 26 11:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 10:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 26 10:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 11:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 11:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Feb 26 11:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 132K Feb 26 11:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rwxr-xr-x 1 mcc users 79K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME Liveness

=== Now, execution of the tool begins

BK_START 1678688628964

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=Liveness
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=HypertorusGrid-PT-d2k3p2b04
Not applying reductions.
Model is PT
Liveness PT
starting LoLA
BK_INPUT HypertorusGrid-PT-d2k3p2b04
BK_EXAMINATION: Liveness
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
GlobalProperty: Liveness

FORMULA Liveness FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678688629053

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: LAUNCH SYMM
lola: INDIVIDUAL RESULTS
lola: ti_d1_n1_d2_n1_1_1: false (by universal search)
lola: ti_d1_n1_d2_n1_1_2: false (by universal search)
lola: ti_d1_n1_d2_n1_1_3: false (by universal search)
lola: ti_d2_n2_d2_n1_2_1: false (by universal search)
lola: ti_d2_n2_d2_n1_2_2: false (by universal search)
lola: ti_d2_n2_d2_n1_2_3: false (by universal search)
lola: to_d1_n1_3_1: false (by universal search)
lola: to_d1_n1_3_2: false (by universal search)
lola: to_d1_n1_3_3: false (by universal search)
lola: to_d2_n2_2_1: false (by universal search)
lola: to_d2_n2_2_2: false (by universal search)
lola: to_d2_n2_2_3: false (by universal search)
lola: ti_d1_n1_d2_n1_2_1: false (by universal search)
lola: ti_d1_n1_d2_n1_2_2: false (by universal search)
lola: ti_d1_n1_d2_n1_2_3: false (by universal search)
lola: ti_d2_n2_d2_n1_3_1: false (by universal search)
lola: ti_d2_n2_d2_n1_3_2: false (by universal search)
lola: ti_d2_n2_d2_n1_3_3: false (by universal search)
lola: to_d2_n2_3_1: false (by universal search)
lola: to_d2_n2_3_2: false (by universal search)
lola: to_d2_n2_3_3: false (by universal search)
lola: ti_d1_n2_d1_n1_1_1: false (by universal search)
lola: ti_d1_n2_d1_n1_1_2: false (by universal search)
lola: ti_d1_n2_d1_n1_1_3: false (by universal search)
lola: ti_d1_n1_d2_n1_3_1: false (by universal search)
lola: ti_d1_n1_d2_n1_3_2: false (by universal search)
lola: ti_d1_n1_d2_n1_3_3: false (by universal search)
lola: ti_d1_n2_d1_n1_2_1: false (by universal search)
lola: ti_d1_n2_d1_n1_2_2: false (by universal search)
lola: ti_d1_n2_d1_n1_2_3: false (by universal search)
lola: ti_d1_n2_d2_n2_1_1: false (by universal search)
lola: ti_d1_n2_d2_n2_1_2: false (by universal search)
lola: ti_d1_n2_d2_n2_1_3: false (by universal search)
lola: ti_d1_n2_d1_n1_3_1: false (by universal search)
lola: ti_d1_n2_d1_n1_3_2: false (by universal search)
lola: ti_d1_n2_d1_n1_3_3: false (by universal search)
lola: ti_d1_n2_d2_n2_2_1: false (by universal search)
lola: ti_d1_n2_d2_n2_2_2: false (by universal search)
lola: ti_d1_n2_d2_n2_2_3: false (by universal search)
lola: ti_d2_n2_d1_n1_1_1: false (by universal search)
lola: ti_d2_n2_d1_n1_1_2: false (by universal search)
lola: ti_d2_n2_d1_n1_1_3: false (by universal search)
lola: to_d1_n2_1_1: false (by universal search)
lola: to_d1_n2_1_2: false (by universal search)
lola: to_d1_n2_1_3: false (by universal search)
lola: ti_d1_n2_d2_n2_3_1: false (by universal search)
lola: ti_d1_n2_d2_n2_3_2: false (by universal search)
lola: ti_d1_n2_d2_n2_3_3: false (by universal search)
lola: ti_d2_n2_d1_n1_2_1: false (by universal search)
lola: ti_d2_n2_d1_n1_2_2: false (by universal search)
lola: ti_d2_n2_d1_n1_2_3: false (by universal search)
lola: to_d1_n2_2_1: false (by universal search)
lola: to_d1_n2_2_2: false (by universal search)
lola: to_d1_n2_2_3: false (by universal search)
lola: ti_d2_n2_d1_n1_3_1: false (by universal search)
lola: ti_d2_n2_d1_n1_3_2: false (by universal search)
lola: ti_d2_n2_d1_n1_3_3: false (by universal search)
lola: ti_d1_n1_d2_n2_1_1: false (by universal search)
lola: ti_d1_n1_d2_n2_1_2: false (by universal search)
lola: ti_d1_n1_d2_n2_1_3: false (by universal search)
lola: to_d1_n2_3_1: false (by universal search)
lola: to_d1_n2_3_2: false (by universal search)
lola: to_d1_n2_3_3: false (by universal search)
lola: ti_d1_n1_d2_n2_2_1: false (by universal search)
lola: ti_d1_n1_d2_n2_2_2: false (by universal search)
lola: ti_d1_n1_d2_n2_2_3: false (by universal search)
lola: ti_d2_n1_d1_n1_1_1: false (by universal search)
lola: ti_d2_n1_d1_n1_1_2: false (by universal search)
lola: ti_d2_n1_d1_n1_1_3: false (by universal search)
lola: ti_d1_n1_d2_n2_3_1: false (by universal search)
lola: ti_d1_n1_d2_n2_3_2: false (by universal search)
lola: ti_d1_n1_d2_n2_3_3: false (by universal search)
lola: ti_d2_n1_d1_n1_2_1: false (by universal search)
lola: ti_d2_n1_d1_n1_2_2: false (by universal search)
lola: ti_d2_n1_d1_n1_2_3: false (by universal search)
lola: ti_d2_n1_d2_n2_1_1: false (by universal search)
lola: ti_d2_n1_d2_n2_1_2: false (by universal search)
lola: ti_d2_n1_d2_n2_1_3: false (by universal search)
lola: ti_d2_n1_d1_n1_3_1: false (by universal search)
lola: ti_d2_n1_d1_n1_3_2: false (by universal search)
lola: ti_d2_n1_d1_n1_3_3: false (by universal search)
lola: ti_d2_n1_d2_n2_2_1: false (by universal search)
lola: ti_d2_n1_d2_n2_2_2: false (by universal search)
lola: ti_d2_n1_d2_n2_2_3: false (by universal search)
lola: to_d2_n1_1_1: false (by universal search)
lola: to_d2_n1_1_2: false (by universal search)
lola: to_d2_n1_1_3: false (by universal search)
lola: ti_d2_n2_d1_n2_1_1: false (by universal search)
lola: ti_d2_n2_d1_n2_1_2: false (by universal search)
lola: ti_d2_n2_d1_n2_1_3: false (by universal search)
lola: ti_d2_n1_d2_n2_3_1: false (by universal search)
lola: ti_d2_n1_d2_n2_3_2: false (by universal search)
lola: ti_d2_n1_d2_n2_3_3: false (by universal search)
lola: to_d2_n1_2_1: false (by universal search)
lola: to_d2_n1_2_2: false (by universal search)
lola: to_d2_n1_2_3: false (by universal search)
lola: ti_d1_n1_d1_n2_1_1: false (by universal search)
lola: ti_d1_n1_d1_n2_1_2: false (by universal search)
lola: ti_d1_n1_d1_n2_1_3: false (by universal search)
lola: ti_d2_n2_d1_n2_2_1: false (by universal search)
lola: ti_d2_n2_d1_n2_2_2: false (by universal search)
lola: ti_d2_n2_d1_n2_2_3: false (by universal search)
lola: to_d2_n1_3_1: false (by universal search)
lola: to_d2_n1_3_2: false (by universal search)
lola: to_d2_n1_3_3: false (by universal search)
lola: ti_d1_n1_d1_n2_2_1: false (by universal search)
lola: ti_d1_n1_d1_n2_2_2: false (by universal search)
lola: ti_d1_n1_d1_n2_2_3: false (by universal search)
lola: ti_d2_n2_d1_n2_3_1: false (by universal search)
lola: ti_d2_n2_d1_n2_3_2: false (by universal search)
lola: ti_d2_n2_d1_n2_3_3: false (by universal search)
lola: ti_d1_n1_d1_n2_3_1: false (by universal search)
lola: ti_d1_n1_d1_n2_3_2: false (by universal search)
lola: ti_d1_n1_d1_n2_3_3: false (by universal search)
lola: ti_d1_n2_d2_n1_1_1: false (by universal search)
lola: ti_d1_n2_d2_n1_1_2: false (by universal search)
lola: ti_d1_n2_d2_n1_1_3: false (by universal search)
lola: ti_d2_n1_d1_n2_1_1: false (by universal search)
lola: ti_d2_n1_d1_n2_1_2: false (by universal search)
lola: ti_d2_n1_d1_n2_1_3: false (by universal search)
lola: ti_d1_n2_d2_n1_2_1: false (by universal search)
lola: ti_d1_n2_d2_n1_2_2: false (by universal search)
lola: ti_d1_n2_d2_n1_2_3: false (by universal search)
lola: ti_d2_n1_d1_n2_2_1: false (by universal search)
lola: ..... ti_d1_n1_d2_n1_1_1: false
lola: ti_d2_n1_d1_n2_2_2: false (by universal search)
lola: ti_d2_n1_d1_n2_2_3: false (by universal search)
lola: to_d1_n1_1_1: false (by universal search)
lola: to_d1_n1_1_2: false (by universal search)
lola: to_d1_n1_1_3: false (by universal search)
lola: ti_d1_n2_d2_n1_3_1: false (by universal search)
lola: ti_d1_n2_d2_n1_3_2: false (by universal search)
lola: ti_d1_n2_d2_n1_3_3: false (by universal search)
lola: ti_d2_n1_d1_n2_3_1: false (by universal search)
lola: ti_d2_n1_d1_n2_3_2: false (by universal search)
lola: ti_d2_n1_d1_n2_3_3: false (by universal search)
lola: ti_d2_n2_d2_n1_1_1: false (by universal search)
lola: ti_d2_n2_d2_n1_1_2: false (by universal search)
lola: ti_d2_n2_d2_n1_1_3: false (by universal search)
lola: to_d1_n1_2_1: false (by universal search)
lola: to_d1_n1_2_2: false (by universal search)
lola: to_d1_n1_2_3: false (by universal search)
lola: to_d2_n2_1_1: false (by universal search)
lola: to_d2_n2_1_2: false (by universal search)
lola: to_d2_n2_1_3: false (by universal search)
lola: The net is not live
lola: Example for violating transition: ti_d1_n1_d2_n1_1_1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HypertorusGrid-PT-d2k3p2b04"
export BK_EXAMINATION="Liveness"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is HypertorusGrid-PT-d2k3p2b04, examination is Liveness"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r244-tall-167856431300029"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HypertorusGrid-PT-d2k3p2b04.tgz
mv HypertorusGrid-PT-d2k3p2b04 execution
cd execution
if [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "UpperBounds" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] || [ "Liveness" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "Liveness" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "Liveness" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "Liveness.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property Liveness.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "Liveness.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' Liveness.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] ; then
echo "FORMULA_NAME Liveness"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;