Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r239-tall-167856427500441.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is Medical-PT-16, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r239-tall-167856427500441
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.6M
-rw-r--r-- 1 mcc users 8.7K Feb 25 14:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K Feb 25 14:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 14:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 25 14:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:23 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:23 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Feb 25 14:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 14:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 122K Feb 25 14:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:23 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:23 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 3.1M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1679431394061

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=Medical-PT-16
Not applying reductions.
Model is PT
ReachabilityDeadlock PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=/home/mcc/BenchKit/bin//../marcie/bin//ReachabilityDeadlock.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: Medical_PT_16
(NrP: 312 NrTr: 5431 NrArc: 28790)

parse formulas
formulas created successfully
place and transition orderings generation:0m 0.158sec

net check time: 0m 0.004sec

init dd package: 0m 2.804sec


before gc: list nodes free: 1928365

after gc: idd nodes used:2519, unused:63997481; list nodes free:398445686

before gc: list nodes free: 1821458

after gc: idd nodes used:2519, unused:63997481; list nodes free:398445614

before gc: list nodes free: 1821458

after gc: idd nodes used:2519, unused:63997481; list nodes free:398445614
TIME LIMIT: Killed by timeout after 1800 seconds
MemTotal: 16393932 kB
MemFree: 4588264 kB
After kill :
MemTotal: 16393932 kB
MemFree: 16231340 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
x1_AR_q4
x1_AR_q3
x0_AR_q0
x0_AR_q2
x0_AR_q1
x0_AA_q3
x0_AA_q4
x0_AA_q2
x0_AA_q1
x1_AR_q2
p14
x1_AR_q1
l8
l9
x0_AR_q4
x0_AR_q5
x0_HA_q0
x0_HA_q1
x0_HA_q2
x0_HQ_q1
x0_HQ_q2
x0_HQ_q3
x0_HQ_q4
x0_HQ_q5
x1_AA_q2
x1_AA_q3
x1_AA_q4
x1_AR_q0
x1_AR_q5
x1_HA_q0
x1_HA_q1
ch3_AR_q2
x0_AR_q3
x1_HA_q2
x2_AA_q2
x2_HA_q1
x3_AR_q5
x3_HQ_q4
x4_AR_q3
x4_HQ_q2
x5_AR_q1
x5_HQ_q0
x6_AA_q5
x6_HA_q4
ch0_AA_q3
ch0_HA_q2
ch1_AA_q1
ch1_HA_q0
ch1_HQ_q5
ch2_AR_q4
ch2_HQ_q0
ch3_AA_q1
ch3_AR_q3
ch3_HA_q4
ch4_AR_q1
ch4_HA_q2
x1_HA_q3
x1_HA_q4
x1_HQ_q0
x1_HQ_q2
x1_HQ_q3
x1_HQ_q4
x1_HQ_q5
x2_AA_q1
x2_AA_q3
x2_AA_q4
x2_AA_q5
x2_AR_q0
x2_AR_q1
x2_AR_q2
x2_AR_q3
x2_AR_q4
x2_AR_q5
x2_HA_q0
x2_HA_q2
x2_HA_q3
x2_HA_q4
x2_HA_q5
x2_HQ_q0
x2_HQ_q1
x2_HQ_q2
x2_HQ_q3
x2_HQ_q4
x2_HQ_q5
x3_AA_q3
x3_AA_q4
x3_AR_q0
x3_AR_q1
x3_AR_q2
x3_AR_q3
x3_AR_q4
x3_HA_q0
x3_HA_q1
x3_HA_q2
x3_HA_q3
x3_HA_q4
x3_HQ_q0
x3_HQ_q3
x3_HQ_q5
x4_AA_q1
x4_AA_q2
x4_AA_q3
x4_AA_q4
x4_AA_q5
x4_AR_q0
x4_AR_q1
x4_AR_q2
x4_AR_q4
x4_AR_q5
x4_HA_q3
x4_HA_q4
x4_HQ_q0
x4_HQ_q1
x4_HQ_q3
x4_HQ_q4
x4_HQ_q5
x5_AA_q1
x5_AA_q2
x5_AA_q4
x5_AR_q0
x5_AR_q2
x5_AR_q3
x5_AR_q4
x5_AR_q5
x5_HA_q0
x5_HA_q1
x5_HA_q2
x5_HA_q3
x5_HA_q4
x5_HQ_q1
x5_HQ_q2
x5_HQ_q4
x5_HQ_q5
x6_AA_q1
x6_AA_q2
x6_AA_q3
x6_AA_q4
x6_AR_q0
x6_AR_q1
x6_AR_q2
x6_AR_q3
x6_AR_q4
x6_AR_q5
x6_HA_q1
x6_HA_q2
x6_HQ_q0
x6_HQ_q1
x6_HQ_q2
x6_HQ_q3
x6_HQ_q4
x6_HQ_q5
ch0_AA_q0
ch0_AA_q2
ch0_AA_q4
ch0_AR_q0
ch0_AR_q1
ch0_AR_q2
ch0_AR_q3
ch0_AR_q4
ch0_AR_q5
ch0_HA_q0
ch0_HA_q1
ch0_HA_q3
ch0_HA_q4
ch0_HQ_q0
ch0_HQ_q2
ch0_HQ_q3
ch0_HQ_q4
ch0_HQ_q5
ch1_AA_q0
ch1_AA_q2
ch1_AA_q3
ch1_AA_q4
ch1_AR_q0
ch1_AR_q1
ch1_AR_q2
ch1_AR_q3
ch1_AR_q4
ch1_AR_q5
ch1_HA_q1
ch1_HA_q2
ch1_HQ_q0
ch1_HQ_q1
ch1_HQ_q2
ch1_HQ_q3
ch1_HQ_q4
ch2_AA_q0
ch2_AA_q1
ch2_AA_q3
ch2_AA_q4
ch2_AR_q0
ch2_AR_q1
ch2_AR_q2
ch2_AR_q3
ch2_AR_q5
ch2_HA_q0
ch2_HA_q1
ch2_HA_q2
ch2_HA_q3
ch2_HA_q4
ch2_HQ_q1
ch2_HQ_q3
ch2_HQ_q4
ch2_HQ_q5
ch3_AA_q0
ch3_AA_q2
ch3_AA_q3
ch3_AA_q4
ch3_AA_q5
ch3_AR_q0
ch3_AR_q1
ch3_AR_q4
ch3_AR_q5
ch3_HA_q0
ch3_HA_q1
ch3_HA_q2
ch3_HA_q3
ch3_HA_q5
ch3_HQ_q0
ch3_HQ_q1
ch3_HQ_q2
ch3_HQ_q3
ch3_HQ_q4
ch3_HQ_q5
ch4_AA_q0
ch4_AA_q1
ch4_AA_q2
ch4_AA_q4
ch4_AR_q0
ch4_AR_q2
ch4_AR_q3
ch4_AR_q4
ch4_AR_q5
ch4_HA_q0
ch4_HA_q1
ch4_HA_q3
ch4_HA_q4
ch4_HQ_q0
ch4_HQ_q1
ch4_HQ_q2
ch4_HQ_q4
ch4_HQ_q5

The net has transition(s) that can never fire:
t553
t554
t1025
t1026
t1027
t547
t2049
t2050
t2051
t2052
t2053
t550
t551
t552
t549
t588
t608
t609
t610
t611
t612
t613
t614
t615
t616
t617
t618
t619
t620
t621
t622
t623
t624
t625
t627
t629
t630
t631
t633
t635
t636
t637
t639
t640
t641
t642
t643
t644
t645
t646
t647
t648
t649
t650
t651
t652
t653
t654
t655
t656
t657
t659
t660
t661
t663
t664
t665
t666
t667
t668
t669
t670
t671
t672
t673
t674
t675
t676
t677
t678
t679
t680
t681
t682
t683
t684
t685
t686
t687
t688
t689
t690
t691
t692
t757
t758
t693
t694
t695
t696
t697
t698
t699
t700
t701
t1385
t1386
t2170
t1387
t1388
t1389
t1390
t1391
t1392
t2171
t1393
t1394
t1395
t1396
t1397
t1398
t2180
t2172
t1399
t1401
t1403
t1404
t713
t714
t715
t716
t717
t718
t719
t720
t721
t722
t723
t724
t725
t726
t727
t728
t729
t730
t731
t732
t733
t735
t737
t738
t739
t740
t741
t743
t744
t745
t746
t747
t748
t749
t750
t751
t752
t753
t754
t755
t756
t885
t886
t887
t759
t760
t761
t762
t763
t764
t765
t767
t768
t769
t770
t771
t772
t773
t774
t775
t776
t777
t778
t779
t780
t781
t782
t783
t784
t785
t786
t787
t788
t789
t790
t791
t792
t793
t794
t795
t796
t797
t798
t799
t800
t801
t802
t803
t804
t805
t806
t807
t808
t809
t810
t811
t812
t813
t814
t815
t816
t817
t818
t819
t820
t821
t822
t823
t824
t825
t826
t827
t828
t829
t830
t831
t832
t833
t834
t835
t836
t837
t838
t839
t840
t841
t842
t843
t844
t845
t846
t847
t848
t849
t850
t851
t852
t853
t854
t855
t856
t857
t858
t859
t860
t861
t862
t863
t864
t865
t866
t867
t868
t869
t870
t871
t872
t1411
t873
t874
t875
t876
t877
t878
t879
t880
t881
t882
t883
t884
t1141
t1681
t1143
t1144
t1145
t888
t889
t890
t891
t892
t893
t894
t895
t896
t897
t898
t899
t900
t901
t902
t903
t904
t905
t906
t907
t908
t909
t910
t911
t912
t913
t914
t915
t916
t917
t918
t919
t920
t921
t922
t923
t924
t925
t926
t927
t928
t929
t930
t931
t932
t933
t934
t935
t936
t937
t938
t939
t940
t941
t942
t943
t944
t945
t947
t948
t949
t951
t952
t953
t954
t955
t956
t957
t958
t959
t960
t961
t962
t963
t964
t965
t966
t967
t968
t969
t970
t971
t972
t973
t974
t975
t976
t977
t978
t979
t1400
t980
t981
t1402
t982
t983
t984
t985
t986
t987
t988
t989
t990
t991
t992
t993
t994
t995
t996
t997
t998
t1537
t999
t1000
t1001
t1002
t1003
t1004
t1005
t1006
t1007
t1008
t1009
t1010
t1549
t1011
t1012
t1433
t1013
t1961
t1962
t1963
t1964
t1965
t1966
t1967
t1968
t1969
t1970
t1971
t1972
t1973
t1974
t1975
t1976
t1977
t1978
t1979
t4097
t4098
t4099
t4100
t4101
t4102
t4103
t4104
t4105
t4106
t2054
t2055
t2056
t2057
t2058
t2059
t2060
t2061
t2062
t2063
t2064
t2065
t2066
t2067
t2068
t2069
t2070
t2071
t2072
t2073
t2074
t2075
t2076
t2077
t2078
t2079
t2080
t2081
t2082
t2083
t2084
t2341
t2342
t2343
t2344
t2087
t2088
t2089
t2090
t2091
t2092
t2093
t2094
t2095
t2096
t2097
t2098
t2099
t2100
t2101
t2102
t2103
t2104
t2105
t2106
t2107
t2108
t2109
t2110
t2111
t2112
t1064
t1065
t1067
t1068
t1069
t1071
t1072
t1073
t1074
t1075
t1076
t1077
t1078
t1079
t1080
t1081
t1082
t1083
t1084
t1085
t1086
t1087
t1088
t1089
t1090
t1091
t1092
t1093
t1094
t1095
t1096
t1097
t1098
t1099
t1100
t1101
t1102
t1103
t1104
t1105
t1106
t1107
t1108
t1109
t1110
t1111
t1112
t1113
t1114
t1115
t1116
t1117
t1118
t1119
t1120
t1121
t1122
t1123
t1124
t1125
t1126
t1127
t1128
t1129
t1130
t1131
t1132
t1133
t1134
t1135
t1136
t1137
t1138
t1139
t1140
t1653
t1654
t1655
t1656
t1657
t1658
t1659
t1660
t1661
t1662
t1663
t1146
t1147
t1148
t1149
t1150
t1151
t1152
t1153
t1154
t1155
t1156
t1157
t1158
t1159
t1160
t1699
t1161
t1162
t1163
t1164
t1165
t1166
t1167
t1168
t1169
t1170
t1171
t1172
t1173
t1175
t1176
t1177
t1178
t1179
t1180
t1181
t1182
t1183
t1184
t1185
t1186
t1187
t1188
t1189
t1190
t1191
t1192
t1193
t1194
t1195
t1196
t1197
t1198
t1199
t1200
t1201
t1202
t1203
t1204
t1205
t1206
t1207
t1208
t1209
t1210
t1211
t1212
t1213
t1214
t1215
t1216
t1217
t1218
t1219
t1220
t1221
t1222
t1223
t1224
t1225
t1226
t1227
t1228
t1229
t1230
t1231
t1232
t1233
t1234
t1235
t1236
t1237
t1238
t1239
t1240
t1241
t1242
t1243
t1244
t1245
t1246
t1247
t1248
t2165
t1249
t1250
t1251
t1252
t1253
t1254
t2166
t1255
t1256
t1257
t1258
t1259
t1260
t2167
t1261
t1262
t1263
t1264
t1265
t1266
t2168
t1267
t1268
t1269
t1270
t1271
t1272
t2169
t1273
t1274
t1275
t1276
t1277
t1278
t1279
t1280
t1281
t1282
t1283
t1284
t1285
t1286
t1287
t1288
t1289
t1290
t1291
t1292
t1293
t1294
t1295
t1296
t1297
t1298
t1299
t1300
t1301
t1302
t1303
t1304
t1305
t1306
t1307
t1308
t1309
t1310
t1311
t1312
t1313
t1314
t1315
t1316
t1317
t1318
t1319
t1320
t1321
t1322
t1323
t1324
t1325
t1326
t1327
t1328
t1329
t1330
t1331
t1332
t1333
t1334
t1335
t1336
t1337
t1338
t1339
t1340
t1341
t1342
t1343
t1344
t1345
t1346
t1347
t1348
t1349
t1350
t1351
t1352
t1353
t1354
t1355
t1356
t1357
t1358
t1359
t1360
t1361
t1362
t1363
t1364
t1365
t1366
t1367
t1368
t1369
t1370
t1371
t1372
t1373
t1374
t1375
t1376
t1377
t1378
t1379
t1380
t1381
t1382
t1383
t1384
t2775
t2776
t2777
t2778
t2779
t2780
t3201
t2781
t2782
t3203
t2783
t2784
t2785
t2786
t2787
t2788
t2789
t2790
t2791
t2792
t2793
t2794
t2795
t2796
t2797
t2798
t2799
t3338
t2800
t2801
t2802
t2803
t2804
t2805
t2806
t2807
t2808
t2809
t2810
t2811
t3350
t2812
t2813
t3234
t2814
t2815
t3236
t2816
t2817
t3238
t2818
t2173
t1405
t1406
t1407
t1408
t1409
t1410
t2174
t1412
t1413
t1414
t1415
t1416
t2175
t1417
t1418
t1419
t1420
t1421
t1422
t1423
t1424
t1425
t1426
t1427
t1428
t1429
t1430
t1431
t1432
t1434
t1436
t1438
t1439
t1440
t1441
t1442
t1443
t1444
t1445
t1446
t1447
t1448
t1449
t1450
t1451
t1452
t1453
t1454
t1455
t1456
t1457
t1458
t1459
t1460
t1461
t1462
t1463
t1464
t1465
t1466
t1467
t1468
t1470
t1472
t1474
t1475
t1476
t1477
t1478
t1479
t1480
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check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.013sec

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Medical-PT-16"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is Medical-PT-16, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r239-tall-167856427500441"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Medical-PT-16.tgz
mv Medical-PT-16 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;