About the Execution of Smart+red for LamportFastMutEx-PT-3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1175.359 | 41163.00 | 48193.00 | 504.10 | TTFTTTTFTFTFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r235-tall-167856421700406.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is LamportFastMutEx-PT-3, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r235-tall-167856421700406
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 928K
-rw-r--r-- 1 mcc users 13K Feb 25 13:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 13:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 78K Feb 25 13:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.3K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 25K Feb 25 13:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 197K Feb 25 13:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 39K Feb 25 13:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 233K Feb 25 13:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.1K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 77K Mar 5 18:22 model.pnml
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content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678652644922
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-PT-3
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-12 20:24:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-12 20:24:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-12 20:24:06] [INFO ] Load time of PNML (sax parser for PT used): 50 ms
[2023-03-12 20:24:06] [INFO ] Transformed 100 places.
[2023-03-12 20:24:06] [INFO ] Transformed 156 transitions.
[2023-03-12 20:24:06] [INFO ] Found NUPN structural information;
[2023-03-12 20:24:06] [INFO ] Completing missing partition info from NUPN : creating a component with [P_start_1_0, P_start_1_1, P_start_1_2, P_start_1_3, P_b_0_false, P_b_0_true, P_b_1_false, P_b_1_true, P_b_2_false, P_b_2_true, P_b_3_false, P_b_3_true, P_setx_3_0, P_setx_3_1, P_setx_3_2, P_setx_3_3, P_setbi_5_0, P_setbi_5_1, P_setbi_5_2, P_setbi_5_3, P_ify0_4_0, P_ify0_4_1, P_ify0_4_2, P_ify0_4_3, P_sety_9_0, P_sety_9_1, P_sety_9_2, P_sety_9_3, P_ifxi_10_0, P_ifxi_10_1, P_ifxi_10_2, P_ifxi_10_3, P_setbi_11_0, P_setbi_11_1, P_setbi_11_2, P_setbi_11_3, P_fordo_12_0, P_fordo_12_1, P_fordo_12_2, P_fordo_12_3, P_wait_0_0, P_wait_0_1, P_wait_0_2, P_wait_0_3, P_wait_1_0, P_wait_1_1, P_wait_1_2, P_wait_1_3, P_wait_2_0, P_wait_2_1, P_wait_2_2, P_wait_2_3, P_wait_3_0, P_wait_3_1, P_wait_3_2, P_wait_3_3, P_await_13_0, P_await_13_1, P_await_13_2, P_await_13_3, P_done_0_0, P_done_0_1, P_done_0_2, P_done_0_3, P_done_1_0, P_done_1_1, P_done_1_2, P_done_1_3, P_done_2_0, P_done_2_1, P_done_2_2, P_done_2_3, P_done_3_0, P_done_3_1, P_done_3_2, P_done_3_3, P_ifyi_15_0, P_ifyi_15_1, P_ifyi_15_2, P_ifyi_15_3, P_awaity_0, P_awaity_1, P_awaity_2, P_awaity_3, P_CS_21_0, P_CS_21_1, P_CS_21_2, P_CS_21_3, P_setbi_24_0, P_setbi_24_1, P_setbi_24_2, P_setbi_24_3]
[2023-03-12 20:24:06] [INFO ] Parsed PT model containing 100 places and 156 transitions and 664 arcs in 115 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 21 ms.
Working with output stream class java.io.PrintStream
Deduced a syphon composed of 29 places in 2 ms
Reduce places removed 29 places and 42 transitions.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 371 ms. (steps per millisecond=26 ) properties (out of 7) seen :1
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-12 20:24:07] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
// Phase 1: matrix 96 rows 71 cols
[2023-03-12 20:24:07] [INFO ] Computed 17 place invariants in 10 ms
[2023-03-12 20:24:07] [INFO ] After 157ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:1
[2023-03-12 20:24:07] [INFO ] [Nat]Absence check using 17 positive place invariants in 8 ms returned sat
[2023-03-12 20:24:07] [INFO ] After 76ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :1
[2023-03-12 20:24:07] [INFO ] State equation strengthened by 27 read => feed constraints.
[2023-03-12 20:24:07] [INFO ] After 34ms SMT Verify possible using 27 Read/Feed constraints in natural domain returned unsat :5 sat :1
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 9 places in 44 ms of which 6 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 15 places in 31 ms of which 1 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 12 places in 31 ms of which 2 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 17 places in 33 ms of which 2 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 15 places in 30 ms of which 0 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 5 places in 24 ms of which 0 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Deduced a trap composed of 14 places in 28 ms of which 0 ms to minimize.
[2023-03-12 20:24:07] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 7 trap constraints in 286 ms
[2023-03-12 20:24:07] [INFO ] After 351ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :0
[2023-03-12 20:24:07] [INFO ] After 495ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 1610 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running LamportFastMutEx (PT), instance 3
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart
GOT IT HERE. BS
Petri model created: 100 places, 156 transitions, 664 arcs.
Final Score: 1475.072
Took : 6 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-00 (reachable &!potential( ( (! ( ( ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) & ( (! ( (tk(P9) + tk(P10) + tk(P11) + tk(P12)) <= ( 79 ) )) | ( (tk(P97) + tk(P98) + tk(P99) + tk(P100)) <= (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) ) ) ) & ( (! ( ( ( ( 70 ) <= (tk(P65) + tk(P66) + tk(P67) + tk(P68)) ) & ( ( (tk(P97) + tk(P98) + tk(P99) + tk(P100)) <= ( 56 ) ) | ( (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) ) ) ) | (! ( ( 12 ) <= (tk(P69) + tk(P70) + tk(P71) + tk(P72) + tk(P73) + tk(P74) + tk(P75) + tk(P76) + tk(P77) + tk(P78) + tk(P79) + tk(P80) + tk(P81) + tk(P82) + tk(P83) + tk(P84)) )) )) & ( (tk(P29) + tk(P30) + tk(P31) + tk(P32)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) ) ) )) & ( ( ( ( ( ( (! ( (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) <= (tk(P1) + tk(P2) + tk(P3) + tk(P4)) )) | ( ( ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= ( 96 ) ) | ( (tk(P93) + tk(P94) + tk(P95) + tk(P96)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) ) ) | ( ( (tk(P33) + tk(P34) + tk(P35) + tk(P36)) <= (tk(P65) + tk(P66) + tk(P67) + tk(P68)) ) | ( ( 93 ) <= (tk(P25) + tk(P26) + tk(P27) + tk(P28)) ) ) ) ) | ( ( ( 99 ) <= (tk(P29) + tk(P30) + tk(P31) + tk(P32)) ) & (! ( ( 42 ) <= (tk(P97) + tk(P98) + tk(P99) + tk(P100)) )) ) ) & ( ( ( (! ( (tk(P25) + tk(P26) + tk(P27) + tk(P28)) <= (tk(P69) + tk(P70) + tk(P71) + tk(P72) + tk(P73) + tk(P74) + tk(P75) + tk(P76) + tk(P77) + tk(P78) + tk(P79) + tk(P80) + tk(P81) + tk(P82) + tk(P83) + tk(P84)) )) & ( ( ( 19 ) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) & ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= ( 21 ) ) ) ) | ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= ( 88 ) ) ) & ( ( ( ( 65 ) <= (tk(P9) + tk(P10) + tk(P11) + tk(P12)) ) | ( ( ( 93 ) <= (tk(P25) + tk(P26) + tk(P27) + tk(P28)) ) | ( (tk(P69) + tk(P70) + tk(P71) + tk(P72) + tk(P73) + tk(P74) + tk(P75) + tk(P76) + tk(P77) + tk(P78) + tk(P79) + tk(P80) + tk(P81) + tk(P82) + tk(P83) + tk(P84)) <= (tk(P65) + tk(P66) + tk(P67) + tk(P68)) ) ) ) & (! ( (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) <= (tk(P97) + tk(P98) + tk(P99) + tk(P100)) )) ) ) ) & (! ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) <= ( 52 ) )) ) | ( (tk(P85) + tk(P86) + tk(P87) + tk(P88)) <= ( 38 ) ) ) | ( (tk(P65) + tk(P66) + tk(P67) + tk(P68)) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) ) ) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-01 (reachable &!potential( ( (! ( ( ( (! ( (tk(P45) + tk(P46) + tk(P47) + tk(P48)) <= ( 22 ) )) & ( ( ( ( ( (tk(P5) + tk(P6) + tk(P7) + tk(P8)) <= ( 14 ) ) | ( ( 49 ) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40)) ) ) | (! ( (tk(P41) + tk(P42) + tk(P43) + tk(P44)) <= ( 28 ) )) ) | ( ( ( (tk(P93) + tk(P94) + tk(P95) + tk(P96)) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) & ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= (tk(P69) + tk(P70) + tk(P71) + tk(P72) + tk(P73) + tk(P74) + tk(P75) + tk(P76) + tk(P77) + tk(P78) + tk(P79) + tk(P80) + tk(P81) + tk(P82) + tk(P83) + tk(P84)) ) ) & (! ( (tk(P45) + tk(P46) + tk(P47) + tk(P48)) <= ( 2 ) )) ) ) & (! ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= (tk(P69) + tk(P70) + tk(P71) + tk(P72) + tk(P73) + tk(P74) + tk(P75) + tk(P76) + tk(P77) + tk(P78) + tk(P79) + tk(P80) + tk(P81) + tk(P82) + tk(P83) + tk(P84)) )) ) ) | ( (tk(P65) + tk(P66) + tk(P67) + tk(P68)) <= (tk(P21) + tk(P22) + tk(P23) + tk(P24)) ) ) | ( ( 73 ) <= (tk(P97) + tk(P98) + tk(P99) + tk(P100)) ) )) | ( (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) <= ( 51 ) ) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-02 (reachable & potential((! ( (tk(P45) + tk(P46) + tk(P47) + tk(P48)) <= ( 29 ) ))))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-03 (reachable & potential(( (! ( ( (tk(P25) + tk(P26) + tk(P27) + tk(P28)) <= ( 36 ) ) | ( ( ( (tk(P65) + tk(P66) + tk(P67) + tk(P68)) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40)) ) | (! ( ( (! ( (tk(P29) + tk(P30) + tk(P31) + tk(P32)) <= ( 77 ) )) & ( ( ( 3 ) <= (tk(P5) + tk(P6) + tk(P7) + tk(P8)) ) & ( ( 26 ) <= (tk(P25) + tk(P26) + tk(P27) + tk(P28)) ) ) ) & ( ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) ) | ( ( ( 75 ) <= (tk(P5) + tk(P6) + tk(P7) + tk(P8)) ) | ( ( 44 ) <= (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) ) ) ) )) ) | (! ( (! ( ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= ( 11 ) ) & ( (tk(P1) + tk(P2) + tk(P3) + tk(P4)) <= ( 83 ) ) )) | ( ( (tk(P93) + tk(P94) + tk(P95) + tk(P96)) <= ( 0 ) ) & ( ( 1 ) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40)) ) ) )) ) )) | ( ( (tk(P9) + tk(P10) + tk(P11) + tk(P12)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) ) & (! ( ( (tk(P33) + tk(P34) + tk(P35) + tk(P36)) <= (tk(P29) + tk(P30) + tk(P31) + tk(P32)) ) & (! ( ( ( (tk(P1) + tk(P2) + tk(P3) + tk(P4)) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) ) & (! ( (tk(P85) + tk(P86) + tk(P87) + tk(P88)) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) )) ) | (! ( ( 12 ) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) )) )) )) ) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-04 (reachable &!potential( ( (! ( ( ( ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= (tk(P9) + tk(P10) + tk(P11) + tk(P12)) ) | ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= ( 9 ) ) ) & ( ( ( 76 ) <= (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) ) & ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= (tk(P1) + tk(P2) + tk(P3) + tk(P4)) ) ) ) & ( ( 79 ) <= (tk(P89) + tk(P90) + tk(P91) + tk(P92)) ) )) & ( ( (tk(P85) + tk(P86) + tk(P87) + tk(P88)) <= ( 69 ) ) | ( (tk(P33) + tk(P34) + tk(P35) + tk(P36)) <= ( 4 ) ) ) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-05 (reachable &!potential( (! ( ( ( (! ( ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= (tk(P21) + tk(P22) + tk(P23) + tk(P24)) ) & ( (tk(P29) + tk(P30) + tk(P31) + tk(P32)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) ) )) | ( ( (tk(P5) + tk(P6) + tk(P7) + tk(P8)) <= ( 13 ) ) & ( ( (tk(P45) + tk(P46) + tk(P47) + tk(P48)) <= ( 84 ) ) & ( (tk(P65) + tk(P66) + tk(P67) + tk(P68)) <= ( 3 ) ) ) ) ) | ( ( ( ( ( (! ( (tk(P41) + tk(P42) + tk(P43) + tk(P44)) <= (tk(P21) + tk(P22) + tk(P23) + tk(P24)) )) | ( (tk(P29) + tk(P30) + tk(P31) + tk(P32)) <= ( 25 ) ) ) & (! ( (tk(P25) + tk(P26) + tk(P27) + tk(P28)) <= ( 31 ) )) ) | (! ( ( ( 42 ) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) & ( ( (tk(P1) + tk(P2) + tk(P3) + tk(P4)) <= ( 30 ) ) & ( ( 47 ) <= (tk(P29) + tk(P30) + tk(P31) + tk(P32)) ) ) )) ) & ( (! ( ( ( (tk(P33) + tk(P34) + tk(P35) + tk(P36)) <= (tk(P93) + tk(P94) + tk(P95) + tk(P96)) ) & ( (tk(P45) + tk(P46) + tk(P47) + tk(P48)) <= ( 37 ) ) ) & ( ( ( 37 ) <= (tk(P5) + tk(P6) + tk(P7) + tk(P8)) ) | ( (tk(P9) + tk(P10) + tk(P11) + tk(P12)) <= ( 18 ) ) ) )) | ( ( ( ( ( 41 ) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) & ( (tk(P25) + tk(P26) + tk(P27) + tk(P28)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) ) ) | (! ( (tk(P93) + tk(P94) + tk(P95) + tk(P96)) <= ( 4 ) )) ) & ( ( ( (tk(P29) + tk(P30) + tk(P31) + tk(P32)) <= ( 6 ) ) & ( (tk(P25) + tk(P26) + tk(P27) + tk(P28)) <= ( 82 ) ) ) & ( ( (tk(P65) + tk(P66) + tk(P67) + tk(P68)) <= ( 70 ) ) & ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) ) ) ) ) ) & ( (tk(P97) + tk(P98) + tk(P99) + tk(P100)) <= (tk(P21) + tk(P22) + tk(P23) + tk(P24)) ) ) ) & (! ( ( (! ( (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) )) | (! ( ( (tk(P93) + tk(P94) + tk(P95) + tk(P96)) <= ( 30 ) ) & ( ( ( 56 ) <= (tk(P13) + tk(P14) + tk(P15) + tk(P16) + tk(P17) + tk(P18) + tk(P19) + tk(P20)) ) | ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) <= ( 60 ) ) ) )) ) | (! ( (! ( ( 7 ) <= (tk(P65) + tk(P66) + tk(P67) + tk(P68)) )) | ( (tk(P33) + tk(P34) + tk(P35) + tk(P36)) <= ( 54 ) ) )) )) ))))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-06 (reachable &!potential( (! ( (! ( ( ( ( ( ( (tk(P9) + tk(P10) + tk(P11) + tk(P12)) <= ( 77 ) ) | ( (tk(P9) + tk(P10) + tk(P11) + tk(P12)) <= ( 15 ) ) ) & ( ( (tk(P93) + tk(P94) + tk(P95) + tk(P96)) <= (tk(P29) + tk(P30) + tk(P31) + tk(P32)) ) | ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57) + tk(P58) + tk(P59) + tk(P60) + tk(P61) + tk(P62) + tk(P63) + tk(P64)) <= ( 25 ) ) ) ) & ( (tk(P1) + tk(P2) + tk(P3) + tk(P4)) <= ( 56 ) ) ) | ( ( (tk(P5) + tk(P6) + tk(P7) + tk(P8)) <= (tk(P65) + tk(P66) + tk(P67) + tk(P68)) ) & ( ( ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= (tk(P93) + tk(P94) + tk(P95) + tk(P96)) ) & ( ( 7 ) <= (tk(P29) + tk(P30) + tk(P31) + tk(P32)) ) ) | ( ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= ( 61 ) ) | ( (tk(P89) + tk(P90) + tk(P91) + tk(P92)) <= ( 97 ) ) ) ) ) ) & ( (! ( ( ( 41 ) <= (tk(P25) + tk(P26) + tk(P27) + tk(P28)) ) & ( ( 83 ) <= (tk(P5) + tk(P6) + tk(P7) + tk(P8)) ) )) & ( (tk(P97) + tk(P98) + tk(P99) + tk(P100)) <= ( 6 ) ) ) )) & ( (! ( ( ( ( (tk(P29) + tk(P30) + tk(P31) + tk(P32)) <= ( 66 ) ) | ( ( (tk(P97) + tk(P98) + tk(P99) + tk(P100)) <= ( 71 ) ) | ( (tk(P37) + tk(P38) + tk(P39) + tk(P40)) <= ( 59 ) ) ) ) | ( (tk(P21) + tk(P22) + tk(P23) + tk(P24)) <= ( 86 ) ) ) | (! ( (tk(P41) + tk(P42) + tk(P43) + tk(P44)) <= (tk(P5) + tk(P6) + tk(P7) + tk(P8)) )) )) & ( ( (tk(P5) + tk(P6) + tk(P7) + tk(P8)) <= (tk(P41) + tk(P42) + tk(P43) + tk(P44)) ) & (! ( ( 82 ) <= (tk(P93) + tk(P94) + tk(P95) + tk(P96)) )) ) ) ))))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-07 (reachable & potential(( ( 14 ) <= (tk(P85) + tk(P86) + tk(P87) + tk(P88)) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-08 (reachable &!potential( ( ( ( ( ( ( ( (tk(P81)) <= (tk(P48)) ) | ( ( ( ( 1 ) <= (tk(P49)) ) | ( (tk(P24)) <= (tk(P82)) ) ) & ( (! ( ( 1 ) <= (tk(P97)) )) & ( (tk(P90)) <= (tk(P3)) ) ) ) ) | (! ( (! ( (tk(P78)) <= (tk(P1)) )) & ( (tk(P14)) <= (tk(P47)) ) )) ) & ( ( 1 ) <= (tk(P9)) ) ) | ( ( (! ( ( ( 1 ) <= (tk(P53)) ) & (! ( (tk(P46)) <= ( 1 ) )) )) & (! ( ( (tk(P28)) <= ( 0 ) ) | ( ( (tk(P83)) <= ( 1 ) ) | ( ( ( 1 ) <= (tk(P64)) ) | ( (tk(P63)) <= (tk(P26)) ) ) ) )) ) | (! ( ( 1 ) <= (tk(P71)) )) ) ) | ( ( ( (! ( (tk(P3)) <= ( 0 ) )) | ( (tk(P60)) <= (tk(P71)) ) ) & ( ( ( ( ( ( 1 ) <= (tk(P5)) ) & (! ( ( 1 ) <= (tk(P44)) )) ) | ( ( ( (tk(P25)) <= ( 1 ) ) & ( (tk(P19)) <= (tk(P51)) ) ) & (! ( (tk(P62)) <= (tk(P16)) )) ) ) & ( (! ( ( ( 1 ) <= (tk(P56)) ) | ( (tk(P74)) <= ( 0 ) ) )) | ( ( ( (tk(P25)) <= (tk(P54)) ) & ( (tk(P43)) <= ( 0 ) ) ) | ( ( ( 1 ) <= (tk(P96)) ) & ( (tk(P33)) <= (tk(P87)) ) ) ) ) ) | ( ( ( (tk(P42)) <= (tk(P67)) ) | ( ( ( ( 1 ) <= (tk(P12)) ) | ( (tk(P83)) <= (tk(P68)) ) ) | ( (tk(P12)) <= (tk(P9)) ) ) ) | ( ( ( ( 1 ) <= (tk(P21)) ) & (! ( ( 1 ) <= (tk(P85)) )) ) & ( ( ( (tk(P18)) <= (tk(P66)) ) & ( ( 1 ) <= (tk(P74)) ) ) & (! ( ( 1 ) <= (tk(P10)) )) ) ) ) ) ) & ( (! ( ( ( ( ( 1 ) <= (tk(P41)) ) | ( (tk(P74)) <= (tk(P93)) ) ) & ( ( (tk(P75)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P2)) ) ) ) & ( ( (tk(P35)) <= ( 0 ) ) & ( ( 1 ) <= (tk(P23)) ) ) )) | (! ( (! ( (tk(P31)) <= ( 1 ) )) & (! ( (tk(P100)) <= ( 1 ) )) )) ) ) ) | (! ( ( ( 1 ) <= (tk(P21)) ) & ( ( (tk(P64)) <= (tk(P13)) ) & ( (! ( (! ( ( (tk(P98)) <= (tk(P86)) ) | ( (tk(P95)) <= (tk(P98)) ) )) & ( ( ( ( 1 ) <= (tk(P6)) ) & ( (tk(P27)) <= (tk(P67)) ) ) | (! ( (tk(P42)) <= (tk(P46)) )) ) )) & ( (! ( ( ( 1 ) <= (tk(P99)) ) | ( ( ( 1 ) <= (tk(P82)) ) & ( (tk(P23)) <= ( 1 ) ) ) )) & (! ( ( (tk(P60)) <= (tk(P80)) ) | ( ( (tk(P32)) <= ( 0 ) ) & ( (tk(P34)) <= ( 1 ) ) ) )) ) ) ) )) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-09 (reachable & potential(( ( 1 ) <= (tk(P57)) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-10 (reachable &!potential( ( ( ( (! ( ( (! ( (! ( (tk(P69)) <= (tk(P94)) )) | (! ( (tk(P74)) <= (tk(P57)) )) )) | ( (tk(P94)) <= ( 1 ) ) ) | (! ( ( (tk(P2)) <= (tk(P33)) ) & (! ( (tk(P64)) <= (tk(P48)) )) )) )) & ( ( ( ( 1 ) <= (tk(P6)) ) & ( (! ( (tk(P19)) <= ( 0 ) )) | ( ( (! ( ( 1 ) <= (tk(P100)) )) & ( ( ( 1 ) <= (tk(P80)) ) & ( ( 1 ) <= (tk(P76)) ) ) ) & ( (tk(P40)) <= (tk(P6)) ) ) ) ) | ( ( ( ( ( ( 1 ) <= (tk(P54)) ) & ( ( (tk(P40)) <= ( 0 ) ) & ( ( 1 ) <= (tk(P17)) ) ) ) | ( ( (tk(P55)) <= ( 0 ) ) & ( (tk(P14)) <= ( 0 ) ) ) ) & (! ( ( ( 1 ) <= (tk(P8)) ) & ( (tk(P31)) <= ( 1 ) ) )) ) & ( ( ( ( ( ( 1 ) <= (tk(P25)) ) & ( (tk(P27)) <= (tk(P94)) ) ) & ( ( 1 ) <= (tk(P29)) ) ) & ( ( ( ( 1 ) <= (tk(P40)) ) & ( (tk(P58)) <= (tk(P4)) ) ) & ( (tk(P81)) <= ( 0 ) ) ) ) & ( ( ( (tk(P59)) <= (tk(P63)) ) & (! ( (tk(P60)) <= ( 1 ) )) ) | ( ( ( (tk(P12)) <= (tk(P41)) ) | ( ( 1 ) <= (tk(P31)) ) ) & ( ( (tk(P36)) <= (tk(P71)) ) & ( ( 1 ) <= (tk(P73)) ) ) ) ) ) ) ) ) | ( ( (! ( ( ( (tk(P27)) <= ( 0 ) ) | ( (! ( ( 1 ) <= (tk(P43)) )) & ( ( ( 1 ) <= (tk(P24)) ) & ( (tk(P28)) <= ( 1 ) ) ) ) ) | ( (tk(P28)) <= ( 1 ) ) )) | ( (tk(P43)) <= (tk(P85)) ) ) | ( (! ( ( ( 1 ) <= (tk(P21)) ) | ( ( (! ( (tk(P81)) <= (tk(P55)) )) & ( (tk(P29)) <= ( 1 ) ) ) | (! ( (tk(P85)) <= ( 0 ) )) ) )) | ( ( ( ( ( ( (tk(P47)) <= ( 0 ) ) | ( (tk(P22)) <= ( 0 ) ) ) & ( ( ( 1 ) <= (tk(P16)) ) | ( (tk(P3)) <= (tk(P31)) ) ) ) & ( (! ( (tk(P10)) <= (tk(P55)) )) & ( ( ( 1 ) <= (tk(P61)) ) | ( ( 1 ) <= (tk(P8)) ) ) ) ) | (! ( (tk(P38)) <= ( 0 ) )) ) & ( ( ( ( ( ( 1 ) <= (tk(P69)) ) | ( ( 1 ) <= (tk(P32)) ) ) | ( (tk(P69)) <= (tk(P94)) ) ) & (! ( (tk(P77)) <= (tk(P82)) )) ) | (! ( ( ( ( 1 ) <= (tk(P83)) ) & ( (tk(P50)) <= (tk(P91)) ) ) & ( (tk(P69)) <= ( 1 ) ) )) ) ) ) ) ) | (! ( (! ( ( ( 1 ) <= (tk(P56)) ) | ( ( 1 ) <= (tk(P42)) ) )) & ( (tk(P9)) <= (tk(P41)) ) )) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-11 (reachable & potential((! ( ( ( (tk(P26)) <= ( 0 ) ) | ( ( (tk(P1)) <= (tk(P23)) ) & ( (tk(P22)) <= (tk(P81)) ) ) ) | ( ( (tk(P87)) <= ( 1 ) ) | (! ( (tk(P88)) <= ( 1 ) )) ) ))))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-12 (reachable & potential((! ( (tk(P69)) <= ( 0 ) ))))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-13 (reachable & potential(( ( ( (! ( (! ( (! ( ( (tk(P68)) <= (tk(P62)) ) & ( (tk(P40)) <= (tk(P52)) ) )) & (! ( (tk(P29)) <= (tk(P52)) )) )) & ( ( ( ( ( (tk(P43)) <= ( 1 ) ) | ( (tk(P63)) <= ( 1 ) ) ) & ( ( ( 1 ) <= (tk(P55)) ) | ( ( 1 ) <= (tk(P57)) ) ) ) & (! ( ( (tk(P91)) <= ( 1 ) ) | ( (tk(P61)) <= (tk(P11)) ) )) ) | ( (tk(P95)) <= ( 0 ) ) ) )) | ( ( ( ( 1 ) <= (tk(P73)) ) & ( ( ( ( ( ( 1 ) <= (tk(P30)) ) | ( ( 1 ) <= (tk(P99)) ) ) | ( ( ( 1 ) <= (tk(P70)) ) & ( ( 1 ) <= (tk(P78)) ) ) ) | ( ( ( (tk(P65)) <= (tk(P35)) ) | ( (tk(P38)) <= (tk(P75)) ) ) & (! ( (tk(P47)) <= ( 1 ) )) ) ) & ( ( ( ( (tk(P85)) <= ( 0 ) ) | ( ( 1 ) <= (tk(P95)) ) ) & ( ( (tk(P98)) <= (tk(P67)) ) & ( (tk(P11)) <= (tk(P6)) ) ) ) | ( ( ( (tk(P28)) <= ( 1 ) ) | ( (tk(P69)) <= ( 1 ) ) ) & ( ( ( 1 ) <= (tk(P81)) ) | ( ( 1 ) <= (tk(P85)) ) ) ) ) ) ) | ( (! ( ( ( ( 1 ) <= (tk(P39)) ) | (! ( (tk(P14)) <= ( 0 ) )) ) & ( ( ( (tk(P78)) <= (tk(P52)) ) & ( (tk(P70)) <= ( 0 ) ) ) & (! ( ( 1 ) <= (tk(P40)) )) ) )) & ( ( ( (! ( (tk(P58)) <= ( 1 ) )) & (! ( (tk(P59)) <= (tk(P13)) )) ) & (! ( ( (tk(P18)) <= (tk(P32)) ) | ( (tk(P48)) <= (tk(P96)) ) )) ) | ( ( (tk(P31)) <= (tk(P36)) ) | ( ( ( ( 1 ) <= (tk(P36)) ) & ( (tk(P2)) <= (tk(P28)) ) ) | ( ( 1 ) <= (tk(P59)) ) ) ) ) ) ) ) | ( (! ( (! ( ( 1 ) <= (tk(P80)) )) | ( (tk(P93)) <= ( 1 ) ) )) & ( ( (tk(P43)) <= ( 0 ) ) | ( ( ( (! ( ( (tk(P91)) <= (tk(P39)) ) & ( (tk(P89)) <= ( 0 ) ) )) | ( (! ( (tk(P68)) <= (tk(P59)) )) & (! ( (tk(P75)) <= (tk(P4)) )) ) ) & (! ( ( (tk(P14)) <= (tk(P61)) ) | ( ( (tk(P39)) <= ( 1 ) ) | ( (tk(P68)) <= ( 0 ) ) ) )) ) | (! ( ( ( (tk(P67)) <= (tk(P13)) ) & ( ( 1 ) <= (tk(P46)) ) ) & ( (tk(P23)) <= (tk(P49)) ) )) ) ) ) ) & ( ( 1 ) <= (tk(P41)) ) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-14 (reachable & potential(( (! ( ( 1 ) <= (tk(P58)) )) & (! ( ( ( ( ( 1 ) <= (tk(P78)) ) | ( (tk(P51)) <= ( 1 ) ) ) & ( ( ( (tk(P66)) <= ( 0 ) ) & ( ( ( (tk(P31)) <= ( 0 ) ) | ( ( ( 1 ) <= (tk(P24)) ) | ( (tk(P80)) <= ( 0 ) ) ) ) & ( ( 1 ) <= (tk(P2)) ) ) ) | ( (tk(P97)) <= ( 0 ) ) ) ) & ( ( (tk(P63)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P15)) ) ) )) )))
PROPERTY: LamportFastMutEx-PT-3-ReachabilityCardinality-15 (reachable & potential((! ( (tk(P37)) <= (tk(P90)) ))))
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
BK_STOP 1678652686085
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-3"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is LamportFastMutEx-PT-3, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r235-tall-167856421700406"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-3.tgz
mv LamportFastMutEx-PT-3 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;