Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r235-tall-167856421700398.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is LamportFastMutEx-PT-2, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r235-tall-167856421700398
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 708K
-rw-r--r-- 1 mcc users 13K Feb 25 13:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 103K Feb 25 13:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 13:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 25 13:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 31K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 20K Feb 25 13:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 154K Feb 25 13:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 21K Feb 25 13:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 133K Feb 25 13:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 48K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678652584899

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-PT-2
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-12 20:23:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-12 20:23:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-12 20:23:06] [INFO ] Load time of PNML (sax parser for PT used): 38 ms
[2023-03-12 20:23:06] [INFO ] Transformed 69 places.
[2023-03-12 20:23:06] [INFO ] Transformed 96 transitions.
[2023-03-12 20:23:06] [INFO ] Found NUPN structural information;
[2023-03-12 20:23:06] [INFO ] Completing missing partition info from NUPN : creating a component with [P_start_1_0, P_start_1_1, P_start_1_2, P_b_0_false, P_b_0_true, P_b_1_false, P_b_1_true, P_b_2_false, P_b_2_true, P_setx_3_0, P_setx_3_1, P_setx_3_2, P_setbi_5_0, P_setbi_5_1, P_setbi_5_2, P_ify0_4_0, P_ify0_4_1, P_ify0_4_2, P_sety_9_0, P_sety_9_1, P_sety_9_2, P_ifxi_10_0, P_ifxi_10_1, P_ifxi_10_2, P_setbi_11_0, P_setbi_11_1, P_setbi_11_2, P_fordo_12_0, P_fordo_12_1, P_fordo_12_2, P_wait_0_0, P_wait_0_1, P_wait_0_2, P_wait_1_0, P_wait_1_1, P_wait_1_2, P_wait_2_0, P_wait_2_1, P_wait_2_2, P_await_13_0, P_await_13_1, P_await_13_2, P_done_0_0, P_done_0_1, P_done_0_2, P_done_1_0, P_done_1_1, P_done_1_2, P_done_2_0, P_done_2_1, P_done_2_2, P_ifyi_15_0, P_ifyi_15_1, P_ifyi_15_2, P_awaity_0, P_awaity_1, P_awaity_2, P_CS_21_0, P_CS_21_1, P_CS_21_2, P_setbi_24_0, P_setbi_24_1, P_setbi_24_2]
[2023-03-12 20:23:06] [INFO ] Parsed PT model containing 69 places and 96 transitions and 402 arcs in 102 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 17 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 8 formulas.
Deduced a syphon composed of 25 places in 0 ms
Reduce places removed 25 places and 34 transitions.
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 209 ms. (steps per millisecond=47 ) properties (out of 4) seen :2
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-12 20:23:07] [INFO ] Flow matrix only has 56 transitions (discarded 6 similar events)
// Phase 1: matrix 56 rows 44 cols
[2023-03-12 20:23:07] [INFO ] Computed 10 place invariants in 9 ms
[2023-03-12 20:23:07] [INFO ] After 129ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:1
[2023-03-12 20:23:07] [INFO ] [Nat]Absence check using 10 positive place invariants in 8 ms returned sat
[2023-03-12 20:23:07] [INFO ] After 59ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :0
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 987 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running LamportFastMutEx (PT), instance 2
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart

GOT IT HERE. BS
Petri model created: 69 places, 96 transitions, 402 arcs.
Final Score: 700.837
Took : 3 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-00 (reachable & potential(( ( (tk(P58) + tk(P59) + tk(P60)) <= ( 70 ) ) & ( (! ( ( ( ( (! ( (tk(P1) + tk(P2) + tk(P3)) <= ( 68 ) )) & ( (tk(P1) + tk(P2) + tk(P3)) <= ( 78 ) ) ) | ( ( ( (tk(P7) + tk(P8) + tk(P9)) <= (tk(P22) + tk(P23) + tk(P24)) ) | ( ( 14 ) <= (tk(P19) + tk(P20) + tk(P21)) ) ) | (! ( ( ( 70 ) <= (tk(P7) + tk(P8) + tk(P9)) ) & ( ( 15 ) <= (tk(P31) + tk(P32) + tk(P33)) ) )) ) ) & ( ( ( 76 ) <= (tk(P22) + tk(P23) + tk(P24)) ) & ( ( (! ( (tk(P58) + tk(P59) + tk(P60)) <= (tk(P7) + tk(P8) + tk(P9)) )) | ( ( ( 51 ) <= (tk(P58) + tk(P59) + tk(P60)) ) & ( (tk(P34) + tk(P35) + tk(P36)) <= ( 0 ) ) ) ) & ( ( (tk(P34) + tk(P35) + tk(P36)) <= (tk(P34) + tk(P35) + tk(P36)) ) & ( ( ( 7 ) <= (tk(P22) + tk(P23) + tk(P24)) ) | ( ( 83 ) <= (tk(P7) + tk(P8) + tk(P9)) ) ) ) ) ) ) | ( (! ( (tk(P28) + tk(P29) + tk(P30)) <= (tk(P1) + tk(P2) + tk(P3)) )) | ( (tk(P64) + tk(P65) + tk(P66)) <= (tk(P61) + tk(P62) + tk(P63)) ) ) )) & ( (! ( (tk(P1) + tk(P2) + tk(P3)) <= (tk(P58) + tk(P59) + tk(P60)) )) & ( (! ( ( 34 ) <= (tk(P46) + tk(P47) + tk(P48)) )) & (! ( ( ( 63 ) <= (tk(P64) + tk(P65) + tk(P66)) ) & ( ( ( (tk(P22) + tk(P23) + tk(P24)) <= (tk(P46) + tk(P47) + tk(P48)) ) | ( ( 48 ) <= (tk(P22) + tk(P23) + tk(P24)) ) ) | ( ( (tk(P28) + tk(P29) + tk(P30)) <= ( 28 ) ) | ( (tk(P61) + tk(P62) + tk(P63)) <= ( 36 ) ) ) ) )) ) ) ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-01 (reachable & potential(( (tk(P28) + tk(P29) + tk(P30)) <= (tk(P67) + tk(P68) + tk(P69)) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-02 (reachable & potential((! ( ( ( (tk(P46) + tk(P47) + tk(P48)) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) ) | ( (tk(P61) + tk(P62) + tk(P63)) <= ( 27 ) ) ) & ( ( (! ( ( (tk(P19) + tk(P20) + tk(P21)) <= ( 7 ) ) | (! ( (tk(P64) + tk(P65) + tk(P66)) <= (tk(P7) + tk(P8) + tk(P9)) )) )) & ( ( 20 ) <= (tk(P28) + tk(P29) + tk(P30)) ) ) & ( ( 47 ) <= (tk(P25) + tk(P26) + tk(P27)) ) ) ))))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-03 (reachable & potential(( ( ( (! ( ( ( (! ( ( 89 ) <= (tk(P28) + tk(P29) + tk(P30)) )) | ( (tk(P7) + tk(P8) + tk(P9)) <= (tk(P4) + tk(P5) + tk(P6)) ) ) & ( ( ( (tk(P7) + tk(P8) + tk(P9)) <= (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) ) & ( ( 91 ) <= (tk(P67) + tk(P68) + tk(P69)) ) ) | ( ( (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) <= (tk(P46) + tk(P47) + tk(P48)) ) & ( (tk(P67) + tk(P68) + tk(P69)) <= ( 9 ) ) ) ) ) & ( ( ( 29 ) <= (tk(P61) + tk(P62) + tk(P63)) ) | ( (tk(P28) + tk(P29) + tk(P30)) <= (tk(P16) + tk(P17) + tk(P18)) ) ) )) | ( (! ( ( (tk(P19) + tk(P20) + tk(P21)) <= (tk(P1) + tk(P2) + tk(P3)) ) | (! ( (! ( (tk(P34) + tk(P35) + tk(P36)) <= (tk(P22) + tk(P23) + tk(P24)) )) & (! ( ( 50 ) <= (tk(P34) + tk(P35) + tk(P36)) )) )) )) | ( ( ( ( ( ( 6 ) <= (tk(P28) + tk(P29) + tk(P30)) ) | ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= ( 48 ) ) ) & ( ( ( (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) <= ( 36 ) ) & ( (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) <= ( 63 ) ) ) | ( (tk(P1) + tk(P2) + tk(P3)) <= (tk(P1) + tk(P2) + tk(P3)) ) ) ) & ( ( 47 ) <= (tk(P1) + tk(P2) + tk(P3)) ) ) | (! ( (! ( (tk(P31) + tk(P32) + tk(P33)) <= (tk(P34) + tk(P35) + tk(P36)) )) | ( (tk(P25) + tk(P26) + tk(P27)) <= ( 51 ) ) )) ) ) ) & ( ( ( ( ( (tk(P7) + tk(P8) + tk(P9)) <= (tk(P1) + tk(P2) + tk(P3)) ) & (! ( ( (tk(P22) + tk(P23) + tk(P24)) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) ) & ( ( (tk(P4) + tk(P5) + tk(P6)) <= ( 24 ) ) & ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= (tk(P46) + tk(P47) + tk(P48)) ) ) )) ) & ( (! ( ( 56 ) <= (tk(P64) + tk(P65) + tk(P66)) )) & (! ( ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) ) & ( ( (tk(P46) + tk(P47) + tk(P48)) <= ( 32 ) ) | ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= (tk(P46) + tk(P47) + tk(P48)) ) ) )) ) ) & ( (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) <= (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) ) ) & ( ( ( (! ( ( 42 ) <= (tk(P1) + tk(P2) + tk(P3)) )) & (! ( ( ( ( 36 ) <= (tk(P64) + tk(P65) + tk(P66)) ) | ( (tk(P61) + tk(P62) + tk(P63)) <= ( 28 ) ) ) | ( ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) ) | ( (tk(P34) + tk(P35) + tk(P36)) <= (tk(P19) + tk(P20) + tk(P21)) ) ) )) ) & (! ( (! ( (tk(P4) + tk(P5) + tk(P6)) <= ( 38 ) )) & ( ( ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= ( 95 ) ) | ( ( 51 ) <= (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) ) ) & ( (tk(P64) + tk(P65) + tk(P66)) <= (tk(P46) + tk(P47) + tk(P48)) ) ) )) ) | ( (! ( ( ( ( 95 ) <= (tk(P19) + tk(P20) + tk(P21)) ) & ( ( (tk(P7) + tk(P8) + tk(P9)) <= ( 34 ) ) & ( (tk(P46) + tk(P47) + tk(P48)) <= (tk(P58) + tk(P59) + tk(P60)) ) ) ) & ( (! ( (tk(P34) + tk(P35) + tk(P36)) <= ( 12 ) )) & ( ( (tk(P4) + tk(P5) + tk(P6)) <= ( 93 ) ) & ( ( 74 ) <= (tk(P25) + tk(P26) + tk(P27)) ) ) ) )) | ( ( ( (tk(P1) + tk(P2) + tk(P3)) <= ( 79 ) ) & ( ( (tk(P1) + tk(P2) + tk(P3)) <= ( 98 ) ) & (! ( ( 97 ) <= (tk(P28) + tk(P29) + tk(P30)) )) ) ) | (! ( (tk(P22) + tk(P23) + tk(P24)) <= (tk(P1) + tk(P2) + tk(P3)) )) ) ) ) ) ) & ( (! ( (! ( ( ( ( ( ( 96 ) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) ) | ( ( 64 ) <= (tk(P25) + tk(P26) + tk(P27)) ) ) | (! ( (tk(P25) + tk(P26) + tk(P27)) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) )) ) | (! ( ( (tk(P46) + tk(P47) + tk(P48)) <= (tk(P7) + tk(P8) + tk(P9)) ) & ( ( 91 ) <= (tk(P25) + tk(P26) + tk(P27)) ) )) ) & ( (! ( (tk(P25) + tk(P26) + tk(P27)) <= ( 67 ) )) | ( ( ( 58 ) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) ) & ( ( (tk(P31) + tk(P32) + tk(P33)) <= ( 65 ) ) & ( (tk(P61) + tk(P62) + tk(P63)) <= (tk(P4) + tk(P5) + tk(P6)) ) ) ) ) )) & (! ( ( (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) <= ( 98 ) ) & ( (! ( (tk(P61) + tk(P62) + tk(P63)) <= (tk(P58) + tk(P59) + tk(P60)) )) | ( (tk(P34) + tk(P35) + tk(P36)) <= ( 53 ) ) ) )) )) | ( ( ( (tk(P67) + tk(P68) + tk(P69)) <= (tk(P25) + tk(P26) + tk(P27)) ) | (! ( (tk(P16) + tk(P17) + tk(P18)) <= (tk(P31) + tk(P32) + tk(P33)) )) ) | ( ( ( ( (! ( (tk(P64) + tk(P65) + tk(P66)) <= (tk(P7) + tk(P8) + tk(P9)) )) | ( (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) <= ( 34 ) ) ) & ( ( 55 ) <= (tk(P64) + tk(P65) + tk(P66)) ) ) | ( (! ( ( (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) <= (tk(P16) + tk(P17) + tk(P18)) ) | ( ( 21 ) <= (tk(P37) + tk(P38) + tk(P39) + tk(P40) + tk(P41) + tk(P42) + tk(P43) + tk(P44) + tk(P45)) ) )) & ( (tk(P25) + tk(P26) + tk(P27)) <= ( 7 ) ) ) ) & ( (tk(P1) + tk(P2) + tk(P3)) <= ( 89 ) ) ) ) ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-04 (reachable & potential(( (tk(P34) + tk(P35) + tk(P36)) <= ( 97 ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-05 (reachable & potential((! ( ( (tk(P22) + tk(P23) + tk(P24)) <= ( 65 ) ) | (! ( ( ( ( ( 15 ) <= (tk(P58) + tk(P59) + tk(P60)) ) & ( ( ( ( (tk(P25) + tk(P26) + tk(P27)) <= ( 46 ) ) | ( (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) <= ( 79 ) ) ) & ( ( ( 70 ) <= (tk(P49) + tk(P50) + tk(P51) + tk(P52) + tk(P53) + tk(P54) + tk(P55) + tk(P56) + tk(P57)) ) & ( (tk(P7) + tk(P8) + tk(P9)) <= (tk(P31) + tk(P32) + tk(P33)) ) ) ) & (! ( ( 14 ) <= (tk(P19) + tk(P20) + tk(P21)) )) ) ) & (! ( ( ( ( 16 ) <= (tk(P61) + tk(P62) + tk(P63)) ) | ( ( (tk(P31) + tk(P32) + tk(P33)) <= ( 76 ) ) & ( (tk(P4) + tk(P5) + tk(P6)) <= (tk(P64) + tk(P65) + tk(P66)) ) ) ) & ( (! ( ( 88 ) <= (tk(P1) + tk(P2) + tk(P3)) )) & (! ( ( 45 ) <= (tk(P1) + tk(P2) + tk(P3)) )) ) )) ) & ( ( ( (! ( ( (tk(P58) + tk(P59) + tk(P60)) <= (tk(P67) + tk(P68) + tk(P69)) ) & ( ( 66 ) <= (tk(P46) + tk(P47) + tk(P48)) ) )) | ( ( (tk(P1) + tk(P2) + tk(P3)) <= ( 45 ) ) & ( ( 20 ) <= (tk(P34) + tk(P35) + tk(P36)) ) ) ) | ( (tk(P64) + tk(P65) + tk(P66)) <= (tk(P64) + tk(P65) + tk(P66)) ) ) | ( ( (! ( ( 70 ) <= (tk(P25) + tk(P26) + tk(P27)) )) & ( (tk(P10) + tk(P11) + tk(P12) + tk(P13) + tk(P14) + tk(P15)) <= (tk(P1) + tk(P2) + tk(P3)) ) ) & ( ( 29 ) <= (tk(P1) + tk(P2) + tk(P3)) ) ) ) )) ))))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-06 (reachable & potential(( ( 49 ) <= (tk(P7) + tk(P8) + tk(P9)) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-07 (reachable &!potential( ( ( (tk(P25) + tk(P26) + tk(P27)) <= ( 1 ) ) | ( ( 4 ) <= (tk(P61) + tk(P62) + tk(P63)) ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-08 (reachable & potential(( ( ( (tk(P6)) <= (tk(P39)) ) | ( ( (! ( ( ( (! ( ( 1 ) <= (tk(P30)) )) & ( ( (tk(P57)) <= ( 1 ) ) & ( (tk(P59)) <= (tk(P22)) ) ) ) | ( (tk(P46)) <= (tk(P40)) ) ) | ( ( (tk(P61)) <= (tk(P61)) ) | ( (! ( (tk(P46)) <= (tk(P27)) )) | ( ( 1 ) <= (tk(P24)) ) ) ) )) | ( ( (! ( ( ( ( 1 ) <= (tk(P51)) ) | ( ( 1 ) <= (tk(P39)) ) ) | ( ( (tk(P69)) <= ( 0 ) ) | ( ( 1 ) <= (tk(P25)) ) ) )) | (! ( (tk(P3)) <= ( 0 ) )) ) | (! ( ( ( 1 ) <= (tk(P27)) ) | ( (! ( (tk(P58)) <= ( 1 ) )) & ( ( (tk(P39)) <= ( 0 ) ) | ( ( 1 ) <= (tk(P14)) ) ) ) )) ) ) | ( (tk(P49)) <= (tk(P7)) ) ) ) | ( (tk(P18)) <= ( 0 ) ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-09 (reachable &!potential( ( ( ( (! ( (! ( ( ( ( ( 1 ) <= (tk(P44)) ) | ( ( 1 ) <= (tk(P31)) ) ) & ( ( ( 1 ) <= (tk(P62)) ) & ( (tk(P50)) <= (tk(P19)) ) ) ) | ( (tk(P59)) <= ( 0 ) ) )) & ( ( 1 ) <= (tk(P56)) ) )) | ( ( 1 ) <= (tk(P33)) ) ) & ( (! ( (! ( (! ( ( 1 ) <= (tk(P24)) )) | ( ( 1 ) <= (tk(P25)) ) )) | ( (tk(P50)) <= (tk(P55)) ) )) | ( ( ( 1 ) <= (tk(P45)) ) & (! ( ( (tk(P20)) <= (tk(P59)) ) & ( (tk(P2)) <= (tk(P50)) ) )) ) ) ) & ( ( (! ( ( (tk(P26)) <= ( 0 ) ) | ( (! ( (tk(P39)) <= ( 1 ) )) & ( ( (tk(P19)) <= (tk(P29)) ) & ( ( ( 1 ) <= (tk(P29)) ) & ( (tk(P48)) <= ( 1 ) ) ) ) ) )) | ( ( 1 ) <= (tk(P31)) ) ) & ( ( ( 1 ) <= (tk(P19)) ) & ( (! ( (! ( (tk(P66)) <= (tk(P68)) )) | (! ( (tk(P52)) <= (tk(P10)) )) )) & ( ( (tk(P37)) <= (tk(P39)) ) & ( (! ( (tk(P69)) <= (tk(P32)) )) & ( (! ( ( (tk(P63)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P42)) ) )) | ( ( ( ( 1 ) <= (tk(P52)) ) & ( (tk(P42)) <= (tk(P1)) ) ) | (! ( ( 1 ) <= (tk(P23)) )) ) ) ) ) ) ) ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-10 (reachable &!potential( ( ( 1 ) <= (tk(P39)) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-11 (reachable & potential(( ( 1 ) <= (tk(P49)) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-12 (reachable & potential(( ( (! ( (tk(P44)) <= ( 1 ) )) & ( ( ( ( ( ( ( (tk(P14)) <= (tk(P41)) ) | ( (tk(P11)) <= ( 0 ) ) ) | ( ( ( (tk(P15)) <= (tk(P10)) ) | ( (tk(P61)) <= (tk(P17)) ) ) | (! ( ( 1 ) <= (tk(P46)) )) ) ) & ( ( 1 ) <= (tk(P43)) ) ) & ( ( (tk(P40)) <= (tk(P53)) ) & ( (tk(P37)) <= (tk(P32)) ) ) ) & ( (! ( ( 1 ) <= (tk(P4)) )) & (! ( (tk(P10)) <= ( 0 ) )) ) ) & ( (tk(P66)) <= ( 1 ) ) ) ) & (! ( (tk(P28)) <= ( 0 ) )) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-13 (reachable & potential(( ( (! ( (! ( ( (! ( ( ( 1 ) <= (tk(P19)) ) | ( ( 1 ) <= (tk(P45)) ) )) & (! ( ( 1 ) <= (tk(P21)) )) ) & ( (tk(P44)) <= (tk(P32)) ) )) & ( (tk(P37)) <= ( 0 ) ) )) & ( (! ( (tk(P53)) <= (tk(P36)) )) | ( ( (tk(P27)) <= (tk(P40)) ) & ( ( (tk(P4)) <= ( 1 ) ) & ( ( (tk(P59)) <= ( 0 ) ) | (! ( (tk(P48)) <= (tk(P5)) )) ) ) ) ) ) | ( (! ( (! ( ( (tk(P18)) <= (tk(P3)) ) & ( ( (tk(P41)) <= (tk(P62)) ) | ( (tk(P11)) <= (tk(P30)) ) ) )) | ( (! ( ( ( (tk(P36)) <= (tk(P8)) ) | ( (tk(P65)) <= ( 1 ) ) ) & (! ( (tk(P29)) <= (tk(P32)) )) )) | ( ( (! ( ( ( 1 ) <= (tk(P48)) ) | ( (tk(P62)) <= (tk(P2)) ) )) & ( (! ( (tk(P30)) <= (tk(P69)) )) & ( ( ( 1 ) <= (tk(P37)) ) | ( ( 1 ) <= (tk(P55)) ) ) ) ) & ( (tk(P30)) <= ( 1 ) ) ) ) )) | ( ( (! ( ( ( (! ( (tk(P17)) <= ( 1 ) )) | ( (tk(P39)) <= ( 0 ) ) ) | ( ( (tk(P7)) <= (tk(P41)) ) & ( ( 1 ) <= (tk(P29)) ) ) ) | ( ( ( 1 ) <= (tk(P66)) ) & ( ( ( 1 ) <= (tk(P18)) ) & ( (tk(P64)) <= ( 0 ) ) ) ) )) & (! ( (! ( ( 1 ) <= (tk(P32)) )) | ( ( ( ( (tk(P5)) <= ( 0 ) ) | ( (tk(P13)) <= ( 0 ) ) ) & (! ( ( 1 ) <= (tk(P24)) )) ) | ( (tk(P49)) <= ( 1 ) ) ) )) ) | (! ( ( (tk(P50)) <= ( 0 ) ) & ( (! ( ( ( (tk(P33)) <= ( 1 ) ) & ( (tk(P9)) <= (tk(P58)) ) ) & ( ( 1 ) <= (tk(P44)) ) )) & ( ( (! ( (tk(P20)) <= ( 0 ) )) & (! ( (tk(P19)) <= (tk(P27)) )) ) | ( ( (tk(P2)) <= (tk(P46)) ) & ( (tk(P32)) <= (tk(P36)) ) ) ) ) )) ) ) )))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-14 (reachable & potential((! ( ( ( 1 ) <= (tk(P11)) ) & ( ( ( ( ( ( 1 ) <= (tk(P65)) ) & ( ( 1 ) <= (tk(P54)) ) ) & (! ( (tk(P3)) <= ( 0 ) )) ) | ( ( (tk(P4)) <= ( 1 ) ) & ( ( (tk(P27)) <= (tk(P34)) ) | ( (tk(P64)) <= (tk(P39)) ) ) ) ) & ( (tk(P27)) <= (tk(P5)) ) ) ))))
PROPERTY: LamportFastMutEx-PT-2-ReachabilityCardinality-15 (reachable & potential((! ( (tk(P68)) <= ( 1 ) ))))
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-PT-2-ReachabilityCardinality-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1678652592299

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-2"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is LamportFastMutEx-PT-2, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r235-tall-167856421700398"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-2.tgz
mv LamportFastMutEx-PT-2 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;