About the Execution of LTSMin+red for LamportFastMutEx-PT-3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
521.592 | 3577133.00 | 14281102.00 | 415.70 | FFTF????FTTFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r233-tall-167856418800402.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is LamportFastMutEx-PT-3, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r233-tall-167856418800402
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 928K
-rw-r--r-- 1 mcc users 13K Feb 25 13:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 13:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 78K Feb 25 13:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.3K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 25K Feb 25 13:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 197K Feb 25 13:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 39K Feb 25 13:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 233K Feb 25 13:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.1K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 77K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-3-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679515685022
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-PT-3
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-22 20:08:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 20:08:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 20:08:06] [INFO ] Load time of PNML (sax parser for PT used): 45 ms
[2023-03-22 20:08:06] [INFO ] Transformed 100 places.
[2023-03-22 20:08:06] [INFO ] Transformed 156 transitions.
[2023-03-22 20:08:06] [INFO ] Found NUPN structural information;
[2023-03-22 20:08:06] [INFO ] Completing missing partition info from NUPN : creating a component with [P_start_1_0, P_start_1_1, P_start_1_2, P_start_1_3, P_b_0_false, P_b_0_true, P_b_1_false, P_b_1_true, P_b_2_false, P_b_2_true, P_b_3_false, P_b_3_true, P_setx_3_0, P_setx_3_1, P_setx_3_2, P_setx_3_3, P_setbi_5_0, P_setbi_5_1, P_setbi_5_2, P_setbi_5_3, P_ify0_4_0, P_ify0_4_1, P_ify0_4_2, P_ify0_4_3, P_sety_9_0, P_sety_9_1, P_sety_9_2, P_sety_9_3, P_ifxi_10_0, P_ifxi_10_1, P_ifxi_10_2, P_ifxi_10_3, P_setbi_11_0, P_setbi_11_1, P_setbi_11_2, P_setbi_11_3, P_fordo_12_0, P_fordo_12_1, P_fordo_12_2, P_fordo_12_3, P_wait_0_0, P_wait_0_1, P_wait_0_2, P_wait_0_3, P_wait_1_0, P_wait_1_1, P_wait_1_2, P_wait_1_3, P_wait_2_0, P_wait_2_1, P_wait_2_2, P_wait_2_3, P_wait_3_0, P_wait_3_1, P_wait_3_2, P_wait_3_3, P_await_13_0, P_await_13_1, P_await_13_2, P_await_13_3, P_done_0_0, P_done_0_1, P_done_0_2, P_done_0_3, P_done_1_0, P_done_1_1, P_done_1_2, P_done_1_3, P_done_2_0, P_done_2_1, P_done_2_2, P_done_2_3, P_done_3_0, P_done_3_1, P_done_3_2, P_done_3_3, P_ifyi_15_0, P_ifyi_15_1, P_ifyi_15_2, P_ifyi_15_3, P_awaity_0, P_awaity_1, P_awaity_2, P_awaity_3, P_CS_21_0, P_CS_21_1, P_CS_21_2, P_CS_21_3, P_setbi_24_0, P_setbi_24_1, P_setbi_24_2, P_setbi_24_3]
[2023-03-22 20:08:06] [INFO ] Parsed PT model containing 100 places and 156 transitions and 664 arcs in 111 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Deduced a syphon composed of 29 places in 1 ms
Reduce places removed 29 places and 42 transitions.
FORMULA LamportFastMutEx-PT-3-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 70 out of 71 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 11 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
[2023-03-22 20:08:06] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
// Phase 1: matrix 96 rows 71 cols
[2023-03-22 20:08:06] [INFO ] Computed 17 place invariants in 10 ms
[2023-03-22 20:08:07] [INFO ] Implicit Places using invariants in 379 ms returned []
[2023-03-22 20:08:07] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2023-03-22 20:08:07] [INFO ] Invariant cache hit.
[2023-03-22 20:08:07] [INFO ] State equation strengthened by 27 read => feed constraints.
[2023-03-22 20:08:07] [INFO ] Implicit Places using invariants and state equation in 78 ms returned []
Implicit Place search using SMT with State Equation took 488 ms to find 0 implicit places.
[2023-03-22 20:08:07] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2023-03-22 20:08:07] [INFO ] Invariant cache hit.
[2023-03-22 20:08:07] [INFO ] Dead Transitions using invariants and state equation in 83 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 584 ms. Remains : 71/71 places, 114/114 transitions.
Support contains 70 out of 71 places after structural reductions.
[2023-03-22 20:08:07] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-22 20:08:07] [INFO ] Flatten gal took : 36 ms
[2023-03-22 20:08:07] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA LamportFastMutEx-PT-3-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-22 20:08:07] [INFO ] Flatten gal took : 22 ms
[2023-03-22 20:08:07] [INFO ] Input system was already deterministic with 114 transitions.
Support contains 69 out of 71 places (down from 70) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 346 ms. (steps per millisecond=28 ) properties (out of 44) seen :39
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-22 20:08:08] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
[2023-03-22 20:08:08] [INFO ] Invariant cache hit.
[2023-03-22 20:08:08] [INFO ] [Real]Absence check using 17 positive place invariants in 3 ms returned sat
[2023-03-22 20:08:08] [INFO ] After 42ms SMT Verify possible using state equation in real domain returned unsat :1 sat :1 real:3
[2023-03-22 20:08:08] [INFO ] State equation strengthened by 27 read => feed constraints.
[2023-03-22 20:08:08] [INFO ] After 8ms SMT Verify possible using 27 Read/Feed constraints in real domain returned unsat :1 sat :0 real:4
[2023-03-22 20:08:08] [INFO ] After 126ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:4
[2023-03-22 20:08:08] [INFO ] [Nat]Absence check using 17 positive place invariants in 4 ms returned sat
[2023-03-22 20:08:08] [INFO ] After 38ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :4
[2023-03-22 20:08:08] [INFO ] After 24ms SMT Verify possible using 27 Read/Feed constraints in natural domain returned unsat :1 sat :4
[2023-03-22 20:08:08] [INFO ] Deduced a trap composed of 15 places in 154 ms of which 3 ms to minimize.
[2023-03-22 20:08:08] [INFO ] Deduced a trap composed of 8 places in 37 ms of which 1 ms to minimize.
[2023-03-22 20:08:08] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 2 trap constraints in 201 ms
[2023-03-22 20:08:08] [INFO ] Deduced a trap composed of 5 places in 36 ms of which 1 ms to minimize.
[2023-03-22 20:08:08] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 54 ms
[2023-03-22 20:08:08] [INFO ] Deduced a trap composed of 9 places in 25 ms of which 2 ms to minimize.
[2023-03-22 20:08:08] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 30 ms
[2023-03-22 20:08:08] [INFO ] After 332ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :2
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-22 20:08:08] [INFO ] After 440ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :2
Fused 5 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 9 ms.
Support contains 3 out of 71 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 71/71 places, 114/114 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 68 transition count 111
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 0 with 3 rules applied. Total rules applied 9 place count 68 transition count 108
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 12 place count 65 transition count 108
Applied a total of 12 rules in 30 ms. Remains 65 /71 variables (removed 6) and now considering 108/114 (removed 6) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 31 ms. Remains : 65/71 places, 108/114 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 2) seen :0
Probably explored full state space saw : 15512 states, properties seen :0
Probabilistic random walk after 61100 steps, saw 15512 distinct states, run finished after 213 ms. (steps per millisecond=286 ) properties seen :0
Explored full state space saw : 15512 states, properties seen :0
Exhaustive walk after 61100 steps, saw 15512 distinct states, run finished after 165 ms. (steps per millisecond=370 ) properties seen :0
Successfully simplified 5 atomic propositions for a total of 12 simplifications.
[2023-03-22 20:08:09] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 16 ms
FORMULA LamportFastMutEx-PT-3-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 12 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Support contains 68 out of 71 places (down from 69) after GAL structural reductions.
Computed a total of 1 stabilizing places and 3 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 7 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 8 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 68 transition count 111
Applied a total of 6 rules in 8 ms. Remains 68 /71 variables (removed 3) and now considering 111/114 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 68/71 places, 111/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 111 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 7 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 4 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 2 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 6 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 4 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 1 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 68 transition count 111
Applied a total of 6 rules in 6 ms. Remains 68 /71 variables (removed 3) and now considering 111/114 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 68/71 places, 111/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 4 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 4 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 111 transitions.
Finished random walk after 20 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=20 )
FORMULA LamportFastMutEx-PT-3-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 70 transition count 113
Applied a total of 2 rules in 7 ms. Remains 70 /71 variables (removed 1) and now considering 113/114 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 70/71 places, 113/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 5 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 113 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 114/114 transitions.
Applied a total of 0 rules in 2 ms. Remains 71 /71 variables (removed 0) and now considering 114/114 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 71/71 places, 114/114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 4 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 4 ms
[2023-03-22 20:08:09] [INFO ] Input system was already deterministic with 114 transitions.
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 8 ms
[2023-03-22 20:08:09] [INFO ] Flatten gal took : 8 ms
[2023-03-22 20:08:09] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 8 ms.
[2023-03-22 20:08:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 71 places, 114 transitions and 480 arcs took 1 ms.
Total runtime 3400 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/470/ctl_0_ --ctl=/tmp/470/ctl_1_ --ctl=/tmp/470/ctl_2_ --ctl=/tmp/470/ctl_3_ --ctl=/tmp/470/ctl_4_ --ctl=/tmp/470/ctl_5_ --ctl=/tmp/470/ctl_6_ --ctl=/tmp/470/ctl_7_ --ctl=/tmp/470/ctl_8_ --ctl=/tmp/470/ctl_9_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3570 seconds
MemTotal: 16393232 kB
MemFree: 15634632 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16097256 kB
FORMULA LamportFastMutEx-PT-3-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA LamportFastMutEx-PT-3-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA LamportFastMutEx-PT-3-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA LamportFastMutEx-PT-3-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-04
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-05
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-06
Could not compute solution for formula : LamportFastMutEx-PT-3-CTLFireability-07
FORMULA LamportFastMutEx-PT-3-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA LamportFastMutEx-PT-3-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
BK_STOP 1679519262155
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name LamportFastMutEx-PT-3-CTLFireability-00
ctl formula formula --ctl=/tmp/470/ctl_0_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-01
ctl formula formula --ctl=/tmp/470/ctl_1_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-02
ctl formula formula --ctl=/tmp/470/ctl_2_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-03
ctl formula formula --ctl=/tmp/470/ctl_3_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-04
ctl formula formula --ctl=/tmp/470/ctl_4_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-05
ctl formula formula --ctl=/tmp/470/ctl_5_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-06
ctl formula formula --ctl=/tmp/470/ctl_6_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-07
ctl formula formula --ctl=/tmp/470/ctl_7_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-12
ctl formula formula --ctl=/tmp/470/ctl_8_
ctl formula name LamportFastMutEx-PT-3-CTLFireability-15
ctl formula formula --ctl=/tmp/470/ctl_9_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 71 places, 114 transitions and 480 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 114->93 groups
pnml2lts-sym: Regrouping took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: state vector length is 71; there are 93 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 34848 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.180 real 0.710 user 0.030 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state space has 19742 states, 5204 nodes
pnml2lts-sym: Formula /tmp/470/ctl_0_ does not hold for the initial state
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: Formula /tmp/470/ctl_9_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_1_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_2_ holds for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_8_ does not hold for the initial state
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: Formula /tmp/470/ctl_3_ does not hold for the initial state
Killing (15) : 476
Killing (9) : 476
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-3"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is LamportFastMutEx-PT-3, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r233-tall-167856418800402"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-3.tgz
mv LamportFastMutEx-PT-3 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;