About the Execution of LoLa+red for MultiCrashLeafsetExtension-PT-S32C03
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
0.000 | 654740.00 | 0.00 | 0.00 | F?T???F?T????TT? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r231-tall-167856416700898.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is MultiCrashLeafsetExtension-PT-S32C03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856416700898
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 18M
-rw-r--r-- 1 mcc users 14K Feb 26 03:28 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 26 03:28 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 03:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 26 03:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 7.0K Feb 25 16:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 26 03:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 26 03:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 26 03:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 93K Feb 26 03:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 18M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-02
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-06
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-08
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-13
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-14
FORMULA_NAME MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679510746940
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MultiCrashLeafsetExtension-PT-S32C03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 18:45:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 18:45:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 18:45:48] [INFO ] Load time of PNML (sax parser for PT used): 518 ms
[2023-03-22 18:45:49] [INFO ] Transformed 15862 places.
[2023-03-22 18:45:49] [INFO ] Transformed 25109 transitions.
[2023-03-22 18:45:49] [INFO ] Parsed PT model containing 15862 places and 25109 transitions and 104566 arcs in 695 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
Support contains 204 out of 15862 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 15862/15862 places, 25109/25109 transitions.
Reduce places removed 42 places and 0 transitions.
Iterating post reduction 0 with 42 rules applied. Total rules applied 42 place count 15820 transition count 25109
Discarding 3150 places :
Symmetric choice reduction at 1 with 3150 rule applications. Total rules 3192 place count 12670 transition count 21959
Iterating global reduction 1 with 3150 rules applied. Total rules applied 6342 place count 12670 transition count 21959
Discarding 2941 places :
Symmetric choice reduction at 1 with 2941 rule applications. Total rules 9283 place count 9729 transition count 19018
Iterating global reduction 1 with 2941 rules applied. Total rules applied 12224 place count 9729 transition count 19018
Discarding 944 places :
Symmetric choice reduction at 1 with 944 rule applications. Total rules 13168 place count 8785 transition count 16186
Iterating global reduction 1 with 944 rules applied. Total rules applied 14112 place count 8785 transition count 16186
Applied a total of 14112 rules in 8983 ms. Remains 8785 /15862 variables (removed 7077) and now considering 16186/25109 (removed 8923) transitions.
[2023-03-22 18:45:58] [INFO ] Flow matrix only has 15130 transitions (discarded 1056 similar events)
// Phase 1: matrix 15130 rows 8785 cols
[2023-03-22 18:45:59] [INFO ] Computed 1361 place invariants in 1095 ms
[2023-03-22 18:46:00] [INFO ] Implicit Places using invariants in 2147 ms returned []
Implicit Place search using SMT only with invariants took 2192 ms to find 0 implicit places.
[2023-03-22 18:46:00] [INFO ] Flow matrix only has 15130 transitions (discarded 1056 similar events)
[2023-03-22 18:46:00] [INFO ] Invariant cache hit.
[2023-03-22 18:46:01] [INFO ] Dead Transitions using invariants and state equation in 779 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8785/15862 places, 16186/25109 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11960 ms. Remains : 8785/15862 places, 16186/25109 transitions.
Support contains 204 out of 8785 places after structural reductions.
[2023-03-22 18:46:02] [INFO ] Flatten gal took : 823 ms
[2023-03-22 18:46:02] [INFO ] Flatten gal took : 472 ms
[2023-03-22 18:46:03] [INFO ] Input system was already deterministic with 16186 transitions.
Incomplete random walk after 10000 steps, including 320 resets, run finished after 778 ms. (steps per millisecond=12 ) properties (out of 78) seen :14
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 64) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 63) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 62) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 61) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 60) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 60) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 59) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 58) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 57) seen :0
Running SMT prover for 57 properties.
[2023-03-22 18:46:05] [INFO ] Flow matrix only has 15130 transitions (discarded 1056 similar events)
[2023-03-22 18:46:05] [INFO ] Invariant cache hit.
[2023-03-22 18:46:12] [INFO ] [Real]Absence check using 63 positive place invariants in 141 ms returned sat
[2023-03-22 18:46:13] [INFO ] [Real]Absence check using 63 positive and 1298 generalized place invariants in 545 ms returned sat
[2023-03-22 18:46:30] [INFO ] After 14318ms SMT Verify possible using state equation in real domain returned unsat :5 sat :4 real:48
[2023-03-22 18:46:30] [INFO ] State equation strengthened by 6210 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 18:46:30] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 18:46:30] [INFO ] After 25133ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 57 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 128 out of 8785 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8785 transition count 16184
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 8783 transition count 16184
Performed 191 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 191 Pre rules applied. Total rules applied 4 place count 8783 transition count 15993
Deduced a syphon composed of 191 places in 13 ms
Reduce places removed 191 places and 0 transitions.
Iterating global reduction 2 with 382 rules applied. Total rules applied 386 place count 8592 transition count 15993
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 406 place count 8572 transition count 15951
Iterating global reduction 2 with 20 rules applied. Total rules applied 426 place count 8572 transition count 15951
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 435 place count 8563 transition count 15924
Iterating global reduction 2 with 9 rules applied. Total rules applied 444 place count 8563 transition count 15924
Performed 31 Post agglomeration using F-continuation condition.Transition count delta: 31
Deduced a syphon composed of 31 places in 13 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 2 with 62 rules applied. Total rules applied 506 place count 8532 transition count 15893
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 508 place count 8530 transition count 15891
Iterating global reduction 2 with 2 rules applied. Total rules applied 510 place count 8530 transition count 15891
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 512 place count 8528 transition count 15885
Iterating global reduction 2 with 2 rules applied. Total rules applied 514 place count 8528 transition count 15885
Free-agglomeration rule (complex) applied 415 times.
Iterating global reduction 2 with 415 rules applied. Total rules applied 929 place count 8528 transition count 15470
Reduce places removed 415 places and 0 transitions.
Iterating post reduction 2 with 415 rules applied. Total rules applied 1344 place count 8113 transition count 15470
Partial Free-agglomeration rule applied 190 times.
Drop transitions removed 190 transitions
Iterating global reduction 3 with 190 rules applied. Total rules applied 1534 place count 8113 transition count 15470
Applied a total of 1534 rules in 15611 ms. Remains 8113 /8785 variables (removed 672) and now considering 15470/16186 (removed 716) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 15615 ms. Remains : 8113/8785 places, 15470/16186 transitions.
Incomplete random walk after 10000 steps, including 447 resets, run finished after 619 ms. (steps per millisecond=16 ) properties (out of 52) seen :5
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 47) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 46) seen :0
Running SMT prover for 46 properties.
[2023-03-22 18:46:47] [INFO ] Flow matrix only has 13999 transitions (discarded 1471 similar events)
// Phase 1: matrix 13999 rows 8113 cols
[2023-03-22 18:46:48] [INFO ] Computed 1361 place invariants in 663 ms
[2023-03-22 18:46:53] [INFO ] [Real]Absence check using 65 positive place invariants in 145 ms returned sat
[2023-03-22 18:46:54] [INFO ] [Real]Absence check using 65 positive and 1296 generalized place invariants in 406 ms returned sat
[2023-03-22 18:46:59] [INFO ] After 10989ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0 real:42
[2023-03-22 18:47:04] [INFO ] [Nat]Absence check using 65 positive place invariants in 158 ms returned sat
[2023-03-22 18:47:04] [INFO ] [Nat]Absence check using 65 positive and 1296 generalized place invariants in 480 ms returned sat
[2023-03-22 18:47:24] [INFO ] After 15217ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :42
[2023-03-22 18:47:24] [INFO ] State equation strengthened by 6166 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 18:47:24] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 18:47:24] [INFO ] After 25151ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :0 real:42
Fused 46 Parikh solutions to 11 different solutions.
Parikh walk visited 0 properties in 72 ms.
Support contains 91 out of 8113 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8113/8113 places, 15470/15470 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 8113 transition count 15465
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 8108 transition count 15465
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 10 place count 8108 transition count 15461
Deduced a syphon composed of 4 places in 9 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 18 place count 8104 transition count 15461
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 25 place count 8097 transition count 15448
Iterating global reduction 2 with 7 rules applied. Total rules applied 32 place count 8097 transition count 15448
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 36 place count 8093 transition count 15436
Iterating global reduction 2 with 4 rules applied. Total rules applied 40 place count 8093 transition count 15436
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 8 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 42 place count 8092 transition count 15435
Free-agglomeration rule (complex) applied 79 times.
Iterating global reduction 2 with 79 rules applied. Total rules applied 121 place count 8092 transition count 17216
Reduce places removed 79 places and 0 transitions.
Iterating post reduction 2 with 79 rules applied. Total rules applied 200 place count 8013 transition count 17216
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 202 place count 8011 transition count 17214
Iterating global reduction 3 with 2 rules applied. Total rules applied 204 place count 8011 transition count 17214
Partial Free-agglomeration rule applied 6 times.
Drop transitions removed 6 transitions
Iterating global reduction 3 with 6 rules applied. Total rules applied 210 place count 8011 transition count 17214
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 213 place count 8008 transition count 17211
Iterating global reduction 3 with 3 rules applied. Total rules applied 216 place count 8008 transition count 17211
Applied a total of 216 rules in 13192 ms. Remains 8008 /8113 variables (removed 105) and now considering 17211/15470 (removed -1741) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13192 ms. Remains : 8008/8113 places, 17211/15470 transitions.
Incomplete random walk after 10000 steps, including 516 resets, run finished after 755 ms. (steps per millisecond=13 ) properties (out of 42) seen :3
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 39) seen :0
Interrupted probabilistic random walk after 12289 steps, run timeout after 3001 ms. (steps per millisecond=4 ) properties seen :{7=1, 18=1, 20=1, 29=1}
Probabilistic random walk after 12289 steps, saw 5665 distinct states, run finished after 3001 ms. (steps per millisecond=4 ) properties seen :4
Running SMT prover for 35 properties.
[2023-03-22 18:47:41] [INFO ] Flow matrix only has 15740 transitions (discarded 1471 similar events)
// Phase 1: matrix 15740 rows 8008 cols
[2023-03-22 18:47:42] [INFO ] Computed 1361 place invariants in 867 ms
[2023-03-22 18:47:46] [INFO ] [Real]Absence check using 65 positive place invariants in 122 ms returned sat
[2023-03-22 18:47:47] [INFO ] [Real]Absence check using 65 positive and 1296 generalized place invariants in 498 ms returned sat
[2023-03-22 18:48:06] [INFO ] After 23684ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:35
[2023-03-22 18:48:10] [INFO ] [Nat]Absence check using 65 positive place invariants in 126 ms returned sat
[2023-03-22 18:48:10] [INFO ] [Nat]Absence check using 65 positive and 1296 generalized place invariants in 503 ms returned sat
[2023-03-22 18:48:31] [INFO ] After 16566ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :35
[2023-03-22 18:48:31] [INFO ] State equation strengthened by 8012 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 18:48:31] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 18:48:31] [INFO ] After 25143ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:35
Fused 35 Parikh solutions to 9 different solutions.
Parikh walk visited 0 properties in 101 ms.
Support contains 79 out of 8008 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8008/8008 places, 17211/17211 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 8008 transition count 17208
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 8005 transition count 17208
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 6 place count 8005 transition count 17205
Deduced a syphon composed of 3 places in 10 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 12 place count 8002 transition count 17205
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 15 place count 7999 transition count 17202
Iterating global reduction 2 with 3 rules applied. Total rules applied 18 place count 7999 transition count 17202
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 20 place count 7999 transition count 17200
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 22 place count 7997 transition count 17200
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 23 place count 7996 transition count 17199
Iterating global reduction 3 with 1 rules applied. Total rules applied 24 place count 7996 transition count 17199
Partial Free-agglomeration rule applied 5 times.
Drop transitions removed 5 transitions
Iterating global reduction 3 with 5 rules applied. Total rules applied 29 place count 7996 transition count 17199
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 31 place count 7994 transition count 17197
Iterating global reduction 3 with 2 rules applied. Total rules applied 33 place count 7994 transition count 17197
Applied a total of 33 rules in 11588 ms. Remains 7994 /8008 variables (removed 14) and now considering 17197/17211 (removed 14) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11588 ms. Remains : 7994/8008 places, 17197/17211 transitions.
Successfully simplified 9 atomic propositions for a total of 16 simplifications.
[2023-03-22 18:48:43] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-22 18:48:43] [INFO ] Flatten gal took : 428 ms
[2023-03-22 18:48:43] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-22 18:48:44] [INFO ] Flatten gal took : 445 ms
[2023-03-22 18:48:45] [INFO ] Input system was already deterministic with 16186 transitions.
Support contains 115 out of 8785 places (down from 159) after GAL structural reductions.
Computed a total of 2769 stabilizing places and 4217 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 46 places :
Symmetric choice reduction at 0 with 46 rule applications. Total rules 46 place count 8739 transition count 16106
Iterating global reduction 0 with 46 rules applied. Total rules applied 92 place count 8739 transition count 16106
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 121 place count 8710 transition count 16043
Iterating global reduction 0 with 29 rules applied. Total rules applied 150 place count 8710 transition count 16043
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 162 place count 8698 transition count 16007
Iterating global reduction 0 with 12 rules applied. Total rules applied 174 place count 8698 transition count 16007
Applied a total of 174 rules in 8600 ms. Remains 8698 /8785 variables (removed 87) and now considering 16007/16186 (removed 179) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8602 ms. Remains : 8698/8785 places, 16007/16186 transitions.
[2023-03-22 18:48:54] [INFO ] Flatten gal took : 383 ms
[2023-03-22 18:48:54] [INFO ] Flatten gal took : 413 ms
[2023-03-22 18:48:55] [INFO ] Input system was already deterministic with 16007 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 42 places :
Symmetric choice reduction at 0 with 42 rule applications. Total rules 42 place count 8743 transition count 16114
Iterating global reduction 0 with 42 rules applied. Total rules applied 84 place count 8743 transition count 16114
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 111 place count 8716 transition count 16055
Iterating global reduction 0 with 27 rules applied. Total rules applied 138 place count 8716 transition count 16055
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 149 place count 8705 transition count 16022
Iterating global reduction 0 with 11 rules applied. Total rules applied 160 place count 8705 transition count 16022
Applied a total of 160 rules in 8579 ms. Remains 8705 /8785 variables (removed 80) and now considering 16022/16186 (removed 164) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8580 ms. Remains : 8705/8785 places, 16022/16186 transitions.
[2023-03-22 18:49:04] [INFO ] Flatten gal took : 371 ms
[2023-03-22 18:49:04] [INFO ] Flatten gal took : 417 ms
[2023-03-22 18:49:05] [INFO ] Input system was already deterministic with 16022 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 8785 transition count 16175
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 22 place count 8774 transition count 16175
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 199 Pre rules applied. Total rules applied 22 place count 8774 transition count 15976
Deduced a syphon composed of 199 places in 12 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 2 with 398 rules applied. Total rules applied 420 place count 8575 transition count 15976
Discarding 35 places :
Symmetric choice reduction at 2 with 35 rule applications. Total rules 455 place count 8540 transition count 15907
Iterating global reduction 2 with 35 rules applied. Total rules applied 490 place count 8540 transition count 15907
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 490 place count 8540 transition count 15906
Deduced a syphon composed of 1 places in 12 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 492 place count 8539 transition count 15906
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 510 place count 8521 transition count 15852
Iterating global reduction 2 with 18 rules applied. Total rules applied 528 place count 8521 transition count 15852
Performed 38 Post agglomeration using F-continuation condition.Transition count delta: 38
Deduced a syphon composed of 38 places in 13 ms
Reduce places removed 38 places and 0 transitions.
Iterating global reduction 2 with 76 rules applied. Total rules applied 604 place count 8483 transition count 15814
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 614 place count 8473 transition count 15804
Iterating global reduction 2 with 10 rules applied. Total rules applied 624 place count 8473 transition count 15804
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 624 place count 8473 transition count 15800
Deduced a syphon composed of 4 places in 12 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 632 place count 8469 transition count 15800
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 642 place count 8459 transition count 15770
Iterating global reduction 2 with 10 rules applied. Total rules applied 652 place count 8459 transition count 15770
Applied a total of 652 rules in 15041 ms. Remains 8459 /8785 variables (removed 326) and now considering 15770/16186 (removed 416) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15044 ms. Remains : 8459/8785 places, 15770/16186 transitions.
[2023-03-22 18:49:20] [INFO ] Flatten gal took : 368 ms
[2023-03-22 18:49:21] [INFO ] Flatten gal took : 416 ms
[2023-03-22 18:49:22] [INFO ] Input system was already deterministic with 15770 transitions.
Incomplete random walk after 10000 steps, including 440 resets, run finished after 241 ms. (steps per millisecond=41 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 47 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 1) seen :0
Finished probabilistic random walk after 10587 steps, run visited all 1 properties in 2481 ms. (steps per millisecond=4 )
Probabilistic random walk after 10587 steps, saw 5005 distinct states, run finished after 2486 ms. (steps per millisecond=4 ) properties seen :1
FORMULA MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 45 place count 8740 transition count 16107
Iterating global reduction 0 with 45 rules applied. Total rules applied 90 place count 8740 transition count 16107
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 118 place count 8712 transition count 16045
Iterating global reduction 0 with 28 rules applied. Total rules applied 146 place count 8712 transition count 16045
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 157 place count 8701 transition count 16012
Iterating global reduction 0 with 11 rules applied. Total rules applied 168 place count 8701 transition count 16012
Applied a total of 168 rules in 8691 ms. Remains 8701 /8785 variables (removed 84) and now considering 16012/16186 (removed 174) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8703 ms. Remains : 8701/8785 places, 16012/16186 transitions.
[2023-03-22 18:49:34] [INFO ] Flatten gal took : 360 ms
[2023-03-22 18:49:34] [INFO ] Flatten gal took : 410 ms
[2023-03-22 18:49:35] [INFO ] Input system was already deterministic with 16012 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 45 place count 8740 transition count 16107
Iterating global reduction 0 with 45 rules applied. Total rules applied 90 place count 8740 transition count 16107
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 118 place count 8712 transition count 16047
Iterating global reduction 0 with 28 rules applied. Total rules applied 146 place count 8712 transition count 16047
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 158 place count 8700 transition count 16011
Iterating global reduction 0 with 12 rules applied. Total rules applied 170 place count 8700 transition count 16011
Applied a total of 170 rules in 8521 ms. Remains 8700 /8785 variables (removed 85) and now considering 16011/16186 (removed 175) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8522 ms. Remains : 8700/8785 places, 16011/16186 transitions.
[2023-03-22 18:49:44] [INFO ] Flatten gal took : 369 ms
[2023-03-22 18:49:44] [INFO ] Flatten gal took : 414 ms
[2023-03-22 18:49:45] [INFO ] Input system was already deterministic with 16011 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 8785 transition count 16174
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 24 place count 8773 transition count 16174
Performed 198 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 198 Pre rules applied. Total rules applied 24 place count 8773 transition count 15976
Deduced a syphon composed of 198 places in 13 ms
Reduce places removed 198 places and 0 transitions.
Iterating global reduction 2 with 396 rules applied. Total rules applied 420 place count 8575 transition count 15976
Discarding 32 places :
Symmetric choice reduction at 2 with 32 rule applications. Total rules 452 place count 8543 transition count 15914
Iterating global reduction 2 with 32 rules applied. Total rules applied 484 place count 8543 transition count 15914
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 484 place count 8543 transition count 15913
Deduced a syphon composed of 1 places in 11 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 486 place count 8542 transition count 15913
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 503 place count 8525 transition count 15862
Iterating global reduction 2 with 17 rules applied. Total rules applied 520 place count 8525 transition count 15862
Performed 38 Post agglomeration using F-continuation condition.Transition count delta: 38
Deduced a syphon composed of 38 places in 14 ms
Reduce places removed 38 places and 0 transitions.
Iterating global reduction 2 with 76 rules applied. Total rules applied 596 place count 8487 transition count 15824
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 607 place count 8476 transition count 15813
Iterating global reduction 2 with 11 rules applied. Total rules applied 618 place count 8476 transition count 15813
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 618 place count 8476 transition count 15809
Deduced a syphon composed of 4 places in 12 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 626 place count 8472 transition count 15809
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 637 place count 8461 transition count 15776
Iterating global reduction 2 with 11 rules applied. Total rules applied 648 place count 8461 transition count 15776
Applied a total of 648 rules in 15037 ms. Remains 8461 /8785 variables (removed 324) and now considering 15776/16186 (removed 410) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15038 ms. Remains : 8461/8785 places, 15776/16186 transitions.
[2023-03-22 18:50:00] [INFO ] Flatten gal took : 400 ms
[2023-03-22 18:50:01] [INFO ] Flatten gal took : 393 ms
[2023-03-22 18:50:01] [INFO ] Input system was already deterministic with 15776 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 46 places :
Symmetric choice reduction at 0 with 46 rule applications. Total rules 46 place count 8739 transition count 16106
Iterating global reduction 0 with 46 rules applied. Total rules applied 92 place count 8739 transition count 16106
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 121 place count 8710 transition count 16043
Iterating global reduction 0 with 29 rules applied. Total rules applied 150 place count 8710 transition count 16043
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 162 place count 8698 transition count 16007
Iterating global reduction 0 with 12 rules applied. Total rules applied 174 place count 8698 transition count 16007
Applied a total of 174 rules in 8459 ms. Remains 8698 /8785 variables (removed 87) and now considering 16007/16186 (removed 179) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8459 ms. Remains : 8698/8785 places, 16007/16186 transitions.
[2023-03-22 18:50:10] [INFO ] Flatten gal took : 363 ms
[2023-03-22 18:50:11] [INFO ] Flatten gal took : 410 ms
[2023-03-22 18:50:11] [INFO ] Input system was already deterministic with 16007 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 44 place count 8741 transition count 16108
Iterating global reduction 0 with 44 rules applied. Total rules applied 88 place count 8741 transition count 16108
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 115 place count 8714 transition count 16051
Iterating global reduction 0 with 27 rules applied. Total rules applied 142 place count 8714 transition count 16051
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 154 place count 8702 transition count 16015
Iterating global reduction 0 with 12 rules applied. Total rules applied 166 place count 8702 transition count 16015
Applied a total of 166 rules in 8515 ms. Remains 8702 /8785 variables (removed 83) and now considering 16015/16186 (removed 171) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8517 ms. Remains : 8702/8785 places, 16015/16186 transitions.
[2023-03-22 18:50:20] [INFO ] Flatten gal took : 362 ms
[2023-03-22 18:50:21] [INFO ] Flatten gal took : 413 ms
[2023-03-22 18:50:22] [INFO ] Input system was already deterministic with 16015 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 43 places :
Symmetric choice reduction at 0 with 43 rule applications. Total rules 43 place count 8742 transition count 16111
Iterating global reduction 0 with 43 rules applied. Total rules applied 86 place count 8742 transition count 16111
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 113 place count 8715 transition count 16054
Iterating global reduction 0 with 27 rules applied. Total rules applied 140 place count 8715 transition count 16054
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 152 place count 8703 transition count 16018
Iterating global reduction 0 with 12 rules applied. Total rules applied 164 place count 8703 transition count 16018
Applied a total of 164 rules in 8635 ms. Remains 8703 /8785 variables (removed 82) and now considering 16018/16186 (removed 168) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8637 ms. Remains : 8703/8785 places, 16018/16186 transitions.
[2023-03-22 18:50:31] [INFO ] Flatten gal took : 365 ms
[2023-03-22 18:50:31] [INFO ] Flatten gal took : 414 ms
[2023-03-22 18:50:32] [INFO ] Input system was already deterministic with 16018 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 41 places :
Symmetric choice reduction at 0 with 41 rule applications. Total rules 41 place count 8744 transition count 16115
Iterating global reduction 0 with 41 rules applied. Total rules applied 82 place count 8744 transition count 16115
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 108 place count 8718 transition count 16057
Iterating global reduction 0 with 26 rules applied. Total rules applied 134 place count 8718 transition count 16057
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 144 place count 8708 transition count 16027
Iterating global reduction 0 with 10 rules applied. Total rules applied 154 place count 8708 transition count 16027
Applied a total of 154 rules in 8462 ms. Remains 8708 /8785 variables (removed 77) and now considering 16027/16186 (removed 159) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8464 ms. Remains : 8708/8785 places, 16027/16186 transitions.
[2023-03-22 18:50:41] [INFO ] Flatten gal took : 360 ms
[2023-03-22 18:50:41] [INFO ] Flatten gal took : 398 ms
[2023-03-22 18:50:42] [INFO ] Input system was already deterministic with 16027 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 44 place count 8741 transition count 16108
Iterating global reduction 0 with 44 rules applied. Total rules applied 88 place count 8741 transition count 16108
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 115 place count 8714 transition count 16047
Iterating global reduction 0 with 27 rules applied. Total rules applied 142 place count 8714 transition count 16047
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 152 place count 8704 transition count 16017
Iterating global reduction 0 with 10 rules applied. Total rules applied 162 place count 8704 transition count 16017
Applied a total of 162 rules in 8468 ms. Remains 8704 /8785 variables (removed 81) and now considering 16017/16186 (removed 169) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8471 ms. Remains : 8704/8785 places, 16017/16186 transitions.
[2023-03-22 18:50:51] [INFO ] Flatten gal took : 360 ms
[2023-03-22 18:50:51] [INFO ] Flatten gal took : 415 ms
[2023-03-22 18:50:52] [INFO ] Input system was already deterministic with 16017 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 8785 transition count 16174
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 24 place count 8773 transition count 16174
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 199 Pre rules applied. Total rules applied 24 place count 8773 transition count 15975
Deduced a syphon composed of 199 places in 11 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 2 with 398 rules applied. Total rules applied 422 place count 8574 transition count 15975
Discarding 34 places :
Symmetric choice reduction at 2 with 34 rule applications. Total rules 456 place count 8540 transition count 15909
Iterating global reduction 2 with 34 rules applied. Total rules applied 490 place count 8540 transition count 15909
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 490 place count 8540 transition count 15908
Deduced a syphon composed of 1 places in 11 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 492 place count 8539 transition count 15908
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 510 place count 8521 transition count 15854
Iterating global reduction 2 with 18 rules applied. Total rules applied 528 place count 8521 transition count 15854
Performed 38 Post agglomeration using F-continuation condition.Transition count delta: 38
Deduced a syphon composed of 38 places in 12 ms
Reduce places removed 38 places and 0 transitions.
Iterating global reduction 2 with 76 rules applied. Total rules applied 604 place count 8483 transition count 15816
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 615 place count 8472 transition count 15805
Iterating global reduction 2 with 11 rules applied. Total rules applied 626 place count 8472 transition count 15805
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 626 place count 8472 transition count 15800
Deduced a syphon composed of 5 places in 11 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 636 place count 8467 transition count 15800
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 647 place count 8456 transition count 15767
Iterating global reduction 2 with 11 rules applied. Total rules applied 658 place count 8456 transition count 15767
Applied a total of 658 rules in 14451 ms. Remains 8456 /8785 variables (removed 329) and now considering 15767/16186 (removed 419) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14453 ms. Remains : 8456/8785 places, 15767/16186 transitions.
[2023-03-22 18:51:07] [INFO ] Flatten gal took : 351 ms
[2023-03-22 18:51:07] [INFO ] Flatten gal took : 426 ms
[2023-03-22 18:51:08] [INFO ] Input system was already deterministic with 15767 transitions.
Incomplete random walk after 10000 steps, including 449 resets, run finished after 183 ms. (steps per millisecond=54 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 47 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 13093 steps, run timeout after 3001 ms. (steps per millisecond=4 ) properties seen :{}
Probabilistic random walk after 13093 steps, saw 6132 distinct states, run finished after 3004 ms. (steps per millisecond=4 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 18:51:11] [INFO ] Flow matrix only has 14711 transitions (discarded 1056 similar events)
// Phase 1: matrix 14711 rows 8456 cols
[2023-03-22 18:51:12] [INFO ] Computed 1361 place invariants in 789 ms
[2023-03-22 18:51:13] [INFO ] [Real]Absence check using 65 positive place invariants in 117 ms returned sat
[2023-03-22 18:51:13] [INFO ] [Real]Absence check using 65 positive and 1296 generalized place invariants in 488 ms returned sat
[2023-03-22 18:51:25] [INFO ] After 11283ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-22 18:51:25] [INFO ] State equation strengthened by 6120 read => feed constraints.
[2023-03-22 18:51:26] [INFO ] After 1525ms SMT Verify possible using 6120 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:51:26] [INFO ] After 14431ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:51:27] [INFO ] [Nat]Absence check using 65 positive place invariants in 116 ms returned sat
[2023-03-22 18:51:28] [INFO ] [Nat]Absence check using 65 positive and 1296 generalized place invariants in 505 ms returned sat
[2023-03-22 18:51:40] [INFO ] After 11965ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:51:43] [INFO ] After 3399ms SMT Verify possible using 6120 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 18:51:44] [INFO ] After 4125ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 449 ms.
[2023-03-22 18:51:44] [INFO ] After 18069ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 2 ms.
Support contains 2 out of 8456 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 8456/8456 places, 15767/15767 transitions.
Free-agglomeration rule (complex) applied 576 times.
Iterating global reduction 0 with 576 rules applied. Total rules applied 576 place count 8456 transition count 17169
Reduce places removed 576 places and 0 transitions.
Iterating post reduction 0 with 576 rules applied. Total rules applied 1152 place count 7880 transition count 17169
Applied a total of 1152 rules in 5210 ms. Remains 7880 /8456 variables (removed 576) and now considering 17169/15767 (removed -1402) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 5211 ms. Remains : 7880/8456 places, 17169/15767 transitions.
Finished random walk after 8841 steps, including 462 resets, run visited all 1 properties in 309 ms. (steps per millisecond=28 )
FORMULA MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 8785 transition count 16174
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 24 place count 8773 transition count 16174
Performed 198 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 198 Pre rules applied. Total rules applied 24 place count 8773 transition count 15976
Deduced a syphon composed of 198 places in 13 ms
Reduce places removed 198 places and 0 transitions.
Iterating global reduction 2 with 396 rules applied. Total rules applied 420 place count 8575 transition count 15976
Discarding 35 places :
Symmetric choice reduction at 2 with 35 rule applications. Total rules 455 place count 8540 transition count 15907
Iterating global reduction 2 with 35 rules applied. Total rules applied 490 place count 8540 transition count 15907
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 490 place count 8540 transition count 15906
Deduced a syphon composed of 1 places in 12 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 492 place count 8539 transition count 15906
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 510 place count 8521 transition count 15852
Iterating global reduction 2 with 18 rules applied. Total rules applied 528 place count 8521 transition count 15852
Performed 38 Post agglomeration using F-continuation condition.Transition count delta: 38
Deduced a syphon composed of 38 places in 12 ms
Reduce places removed 38 places and 0 transitions.
Iterating global reduction 2 with 76 rules applied. Total rules applied 604 place count 8483 transition count 15814
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 615 place count 8472 transition count 15803
Iterating global reduction 2 with 11 rules applied. Total rules applied 626 place count 8472 transition count 15803
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 626 place count 8472 transition count 15798
Deduced a syphon composed of 5 places in 11 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 636 place count 8467 transition count 15798
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 647 place count 8456 transition count 15765
Iterating global reduction 2 with 11 rules applied. Total rules applied 658 place count 8456 transition count 15765
Applied a total of 658 rules in 14887 ms. Remains 8456 /8785 variables (removed 329) and now considering 15765/16186 (removed 421) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14888 ms. Remains : 8456/8785 places, 15765/16186 transitions.
[2023-03-22 18:52:05] [INFO ] Flatten gal took : 364 ms
[2023-03-22 18:52:06] [INFO ] Flatten gal took : 413 ms
[2023-03-22 18:52:06] [INFO ] Input system was already deterministic with 15765 transitions.
Finished random walk after 761 steps, including 34 resets, run visited all 1 properties in 17 ms. (steps per millisecond=44 )
FORMULA MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 8785/8785 places, 16186/16186 transitions.
Discarding 40 places :
Symmetric choice reduction at 0 with 40 rule applications. Total rules 40 place count 8745 transition count 16120
Iterating global reduction 0 with 40 rules applied. Total rules applied 80 place count 8745 transition count 16120
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 107 place count 8718 transition count 16063
Iterating global reduction 0 with 27 rules applied. Total rules applied 134 place count 8718 transition count 16063
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 146 place count 8706 transition count 16027
Iterating global reduction 0 with 12 rules applied. Total rules applied 158 place count 8706 transition count 16027
Applied a total of 158 rules in 8470 ms. Remains 8706 /8785 variables (removed 79) and now considering 16027/16186 (removed 159) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8470 ms. Remains : 8706/8785 places, 16027/16186 transitions.
[2023-03-22 18:52:15] [INFO ] Flatten gal took : 352 ms
[2023-03-22 18:52:16] [INFO ] Flatten gal took : 409 ms
[2023-03-22 18:52:16] [INFO ] Input system was already deterministic with 16027 transitions.
[2023-03-22 18:52:17] [INFO ] Flatten gal took : 410 ms
[2023-03-22 18:52:17] [INFO ] Flatten gal took : 425 ms
[2023-03-22 18:52:17] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-22 18:52:17] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8785 places, 16186 transitions and 75241 arcs took 74 ms.
Total runtime 389471 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S32C03
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability
FORMULA MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679511401680
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 104 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 3.000000 secs.
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 109 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 114 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 3.000000 secs.
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 119 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 124 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 3.000000 secs.
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 129 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 4.000000 secs.
lola: Created skeleton in 3.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 134 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
lola: Created skeleton in 3.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 139 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 144 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 149 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 154 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 159 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 164 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 169 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 174 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 179 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 184 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 189 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 194 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 199 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 204 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 209 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 214 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 219 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 224 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 229 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 235 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 240 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 245 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 251 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 256 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-00: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-07: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S32C03-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 261 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 11
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 520 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S32C03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is MultiCrashLeafsetExtension-PT-S32C03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856416700898"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S32C03.tgz
mv MultiCrashLeafsetExtension-PT-S32C03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;