About the Execution of LoLa+red for LamportFastMutEx-COL-6
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2857.539 | 206369.00 | 213798.00 | 867.30 | TTFF?FFT?TTTFTT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r231-tall-167856416000370.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is LamportFastMutEx-COL-6, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856416000370
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.1K Feb 25 13:41 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 13:41 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 13:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 13:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 13:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 13:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Feb 25 13:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-00
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-01
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-02
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-03
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-04
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-05
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-06
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-07
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-08
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-09
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-10
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-11
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-12
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-13
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-14
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679447353831
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-COL-6
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 01:09:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 01:09:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 01:09:15] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-22 01:09:15] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-22 01:09:15] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 650 ms
[2023-03-22 01:09:16] [INFO ] Imported 18 HL places and 17 HL transitions for a total of 217 PT places and 525.0 transition bindings in 15 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
[2023-03-22 01:09:16] [INFO ] Built PT skeleton of HLPN with 18 places and 17 transitions 68 arcs in 4 ms.
[2023-03-22 01:09:16] [INFO ] Skeletonized 4 HLPN properties in 1 ms. Removed 12 properties that had guard overlaps.
Computed a total of 3 stabilizing places and 0 stable transitions
Remains 4 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 177 steps, including 0 resets, run visited all 11 properties in 17 ms. (steps per millisecond=10 )
[2023-03-22 01:09:16] [INFO ] Flatten gal took : 13 ms
[2023-03-22 01:09:16] [INFO ] Flatten gal took : 3 ms
Domain [pid(7), pid(7)] of place P_wait breaks symmetries in sort pid
Symmetric sort wr.t. initial and guards and successors and join/free detected :P_bool
Arc [3:1*[$i, 1]] contains constants of sort P_bool
Transition T_setbi_2 : constants on arcs in [[3:1*[$i, 1]]] introduces in P_bool(2) partition with 1 elements that refines current partition to 2 subsets.
[2023-03-22 01:09:16] [INFO ] Unfolded HLPN to a Petri net with 217 places and 420 transitions 1834 arcs in 20 ms.
[2023-03-22 01:09:16] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Deduced a syphon composed of 41 places in 2 ms
Reduce places removed 41 places and 66 transitions.
Support contains 176 out of 176 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 9 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
[2023-03-22 01:09:16] [INFO ] Flow matrix only has 264 transitions (discarded 90 similar events)
// Phase 1: matrix 264 rows 176 cols
[2023-03-22 01:09:16] [INFO ] Computed 50 place invariants in 20 ms
[2023-03-22 01:09:16] [INFO ] Implicit Places using invariants in 205 ms returned []
[2023-03-22 01:09:16] [INFO ] Flow matrix only has 264 transitions (discarded 90 similar events)
[2023-03-22 01:09:16] [INFO ] Invariant cache hit.
[2023-03-22 01:09:16] [INFO ] State equation strengthened by 72 read => feed constraints.
[2023-03-22 01:09:16] [INFO ] Implicit Places using invariants and state equation in 125 ms returned []
Implicit Place search using SMT with State Equation took 353 ms to find 0 implicit places.
[2023-03-22 01:09:16] [INFO ] Flow matrix only has 264 transitions (discarded 90 similar events)
[2023-03-22 01:09:16] [INFO ] Invariant cache hit.
[2023-03-22 01:09:16] [INFO ] Dead Transitions using invariants and state equation in 166 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 532 ms. Remains : 176/176 places, 354/354 transitions.
Support contains 176 out of 176 places after structural reductions.
[2023-03-22 01:09:16] [INFO ] Flatten gal took : 47 ms
[2023-03-22 01:09:17] [INFO ] Flatten gal took : 55 ms
[2023-03-22 01:09:17] [INFO ] Input system was already deterministic with 354 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 189 ms. (steps per millisecond=52 ) properties (out of 42) seen :41
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-22 01:09:17] [INFO ] Flow matrix only has 264 transitions (discarded 90 similar events)
[2023-03-22 01:09:17] [INFO ] Invariant cache hit.
[2023-03-22 01:09:17] [INFO ] [Real]Absence check using 50 positive place invariants in 12 ms returned sat
[2023-03-22 01:09:17] [INFO ] After 76ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 01:09:17] [INFO ] [Nat]Absence check using 50 positive place invariants in 10 ms returned sat
[2023-03-22 01:09:17] [INFO ] After 127ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 01:09:17] [INFO ] State equation strengthened by 72 read => feed constraints.
[2023-03-22 01:09:18] [INFO ] After 83ms SMT Verify possible using 72 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 8 places in 74 ms of which 3 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 18 places in 67 ms of which 1 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 8 places in 70 ms of which 1 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 15 places in 61 ms of which 1 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 16 places in 64 ms of which 1 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 9 places in 58 ms of which 1 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 9 places in 71 ms of which 0 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 20 places in 54 ms of which 0 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 16 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 15 places in 55 ms of which 1 ms to minimize.
[2023-03-22 01:09:18] [INFO ] Deduced a trap composed of 28 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 28 places in 66 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 13 places in 49 ms of which 1 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 48 places in 63 ms of which 1 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 26 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 39 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 24 places in 57 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 25 places in 63 ms of which 1 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 20 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 15 places in 66 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 30 places in 57 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 36 places in 63 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 30 places in 57 ms of which 0 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 9 places in 58 ms of which 1 ms to minimize.
[2023-03-22 01:09:19] [INFO ] Deduced a trap composed of 24 places in 55 ms of which 1 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 24 places in 61 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 16 places in 61 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 27 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 8 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 19 places in 49 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 25 places in 71 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 20 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 16 places in 67 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 20 places in 65 ms of which 1 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 21 places in 64 ms of which 4 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 23 places in 61 ms of which 1 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 29 places in 59 ms of which 0 ms to minimize.
[2023-03-22 01:09:20] [INFO ] Deduced a trap composed of 23 places in 58 ms of which 1 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 21 places in 68 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 16 places in 66 ms of which 1 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 21 places in 66 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 9 places in 41 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 9 places in 26 ms of which 1 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 35 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 19 places in 73 ms of which 1 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 9 places in 29 ms of which 1 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 25 places in 59 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 18 places in 61 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 22 places in 56 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 28 places in 67 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 30 places in 65 ms of which 0 ms to minimize.
[2023-03-22 01:09:21] [INFO ] Deduced a trap composed of 21 places in 60 ms of which 1 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 27 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 16 places in 58 ms of which 1 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 29 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 28 places in 65 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 22 places in 59 ms of which 1 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 23 places in 59 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 19 places in 61 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 27 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 17 places in 60 ms of which 1 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 24 places in 62 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 15 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 34 places in 64 ms of which 0 ms to minimize.
[2023-03-22 01:09:22] [INFO ] Deduced a trap composed of 17 places in 63 ms of which 1 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 17 places in 58 ms of which 2 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 26 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 25 places in 61 ms of which 1 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 41 places in 60 ms of which 1 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 21 places in 54 ms of which 1 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 17 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 26 places in 53 ms of which 1 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 18 places in 50 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 18 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 9 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 15 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 9 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 24 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 21 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:23] [INFO ] Deduced a trap composed of 23 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 23 places in 53 ms of which 1 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 15 places in 51 ms of which 1 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 23 places in 56 ms of which 1 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 16 places in 54 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 16 places in 56 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 20 places in 59 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 21 places in 62 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 33 places in 60 ms of which 1 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 15 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 18 places in 59 ms of which 1 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 15 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 19 places in 62 ms of which 1 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 15 places in 59 ms of which 0 ms to minimize.
[2023-03-22 01:09:24] [INFO ] Deduced a trap composed of 29 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 22 places in 50 ms of which 1 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 22 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 21 places in 51 ms of which 1 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 19 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 20 places in 51 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 21 places in 51 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 21 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 19 places in 47 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 15 places in 52 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 20 places in 50 ms of which 1 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 18 places in 49 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 9 places in 47 ms of which 0 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 22 places in 59 ms of which 1 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 29 places in 64 ms of which 1 ms to minimize.
[2023-03-22 01:09:25] [INFO ] Deduced a trap composed of 15 places in 62 ms of which 1 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 23 places in 58 ms of which 1 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 22 places in 68 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 19 places in 57 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 20 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 19 places in 56 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 17 places in 65 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 25 places in 68 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 17 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 15 places in 56 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 22 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 22 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 21 places in 52 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 23 places in 57 ms of which 0 ms to minimize.
[2023-03-22 01:09:26] [INFO ] Deduced a trap composed of 18 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 16 places in 61 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 27 places in 65 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 30 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 46 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 48 places in 69 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 17 places in 63 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 18 places in 57 ms of which 1 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 9 places in 57 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 26 places in 60 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 19 places in 57 ms of which 1 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 35 places in 61 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 15 places in 56 ms of which 0 ms to minimize.
[2023-03-22 01:09:27] [INFO ] Deduced a trap composed of 26 places in 62 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 15 places in 63 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 19 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 26 places in 55 ms of which 1 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 15 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 40 places in 53 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 15 places in 52 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 25 places in 52 ms of which 1 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 22 places in 58 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 22 places in 52 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 19 places in 58 ms of which 1 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 46 places in 55 ms of which 0 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Deduced a trap composed of 17 places in 49 ms of which 1 ms to minimize.
[2023-03-22 01:09:28] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 148 trap constraints in 10637 ms
[2023-03-22 01:09:28] [INFO ] After 10800ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :0
[2023-03-22 01:09:28] [INFO ] After 10986ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-22 01:09:28] [INFO ] Flatten gal took : 31 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 56 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Computed a total of 1 stabilizing places and 6 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 6 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 16 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 16 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 3 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 14 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 15 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 15 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 12 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 13 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 4 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 12 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 14 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 3 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 20 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 14 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 11 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 13 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 16 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 5 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 11 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 3 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 12 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 11 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 11 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 11 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 11 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 13 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 9 ms
[2023-03-22 01:09:29] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:29] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:30] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 9 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:30] [INFO ] Input system was already deterministic with 354 transitions.
Finished random walk after 1275 steps, including 0 resets, run visited all 1 properties in 8 ms. (steps per millisecond=159 )
FORMULA LamportFastMutEx-COL-6-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 10 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 9 ms
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:30] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 176/176 places, 354/354 transitions.
Applied a total of 0 rules in 9 ms. Remains 176 /176 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 176/176 places, 354/354 transitions.
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 9 ms
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 10 ms
[2023-03-22 01:09:30] [INFO ] Input system was already deterministic with 354 transitions.
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 24 ms
[2023-03-22 01:09:30] [INFO ] Flatten gal took : 25 ms
[2023-03-22 01:09:30] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 20 ms.
[2023-03-22 01:09:30] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 176 places, 354 transitions and 1536 arcs took 2 ms.
Total runtime 15282 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT LamportFastMutEx-COL-6
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA LamportFastMutEx-COL-6-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679447560200
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
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lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 4 (type EXCL) for 3 LamportFastMutEx-COL-6-CTLFireability-01
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-01
lola: result : true
lola: markings : 14
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 LamportFastMutEx-COL-6-CTLFireability-00
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 1 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-00
lola: result : true
lola: markings : 2001
lola: fired transitions : 3928
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 12 LamportFastMutEx-COL-6-CTLFireability-04
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-04
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 62 (type EXCL) for 33 LamportFastMutEx-COL-6-CTLFireability-07
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 62 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 10 (type EXCL) for 9 LamportFastMutEx-COL-6-CTLFireability-03
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 10 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-03
lola: result : false
lola: markings : 1777
lola: fired transitions : 3283
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 71 (type EXCL) for 70 LamportFastMutEx-COL-6-CTLFireability-10
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 71 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-10
lola: result : true
lola: markings : 387034
lola: fired transitions : 2438469
lola: time used : 4.000000
lola: memory pages used : 2
lola: LAUNCH task # 77 (type EXCL) for 76 LamportFastMutEx-COL-6-CTLFireability-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 77 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-12
lola: result : false
lola: markings : 1986
lola: fired transitions : 13809
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 74 (type EXCL) for 73 LamportFastMutEx-COL-6-CTLFireability-11
lola: time limit : 199 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 1 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 CTL EXCL 1/199 1/32 LamportFastMutEx-COL-6-CTLFireability-11 107897 m, 21579 m/sec, 511858 t fired, .
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lola: FINISHED task # 74 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-11
lola: result : true
lola: markings : 121994
lola: fired transitions : 582747
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 68 (type EXCL) for 67 LamportFastMutEx-COL-6-CTLFireability-09
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-09
lola: result : true
lola: markings : 64883
lola: fired transitions : 282642
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 65 (type EXCL) for 64 LamportFastMutEx-COL-6-CTLFireability-08
lola: time limit : 224 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 1 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 CTL EXCL 5/224 5/32 LamportFastMutEx-COL-6-CTLFireability-08 895958 m, 179191 m/sec, 1708302 t fired, .
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LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 1 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 CTL EXCL 10/224 9/32 LamportFastMutEx-COL-6-CTLFireability-08 1855214 m, 191851 m/sec, 3546311 t fired, .
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LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 1 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 CTL EXCL 15/224 13/32 LamportFastMutEx-COL-6-CTLFireability-08 2810048 m, 190966 m/sec, 5418053 t fired, .
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LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 1 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 CTL EXCL 20/224 17/32 LamportFastMutEx-COL-6-CTLFireability-08 3726440 m, 183278 m/sec, 7335806 t fired, .
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LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 1 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 CTL EXCL 25/224 21/32 LamportFastMutEx-COL-6-CTLFireability-08 4656950 m, 186102 m/sec, 9308413 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 7 0 0 9 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 1 0 0 13 0 0 2
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
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LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
83 CTL EXCL 74/699 30/32 LamportFastMutEx-COL-6-CTLFireability-15 6671211 m, 88955 m/sec, 52037861 t fired, .
Time elapsed: 178 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
83 CTL EXCL 79/699 32/32 LamportFastMutEx-COL-6-CTLFireability-15 7116491 m, 89056 m/sec, 55589603 t fired, .
Time elapsed: 183 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 83 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 188 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 26 (type EXCL) for 19 LamportFastMutEx-COL-6-CTLFireability-05
lola: time limit : 853 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-05
lola: result : false
lola: markings : 118909
lola: fired transitions : 337106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 80 (type EXCL) for 79 LamportFastMutEx-COL-6-CTLFireability-14
lola: time limit : 1137 sec
lola: memory limit: 32 pages
lola: FINISHED task # 80 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-14
lola: result : true
lola: markings : 1986
lola: fired transitions : 3961
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 19 LamportFastMutEx-COL-6-CTLFireability-05
lola: time limit : 1706 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-05
lola: result : false
lola: markings : 22187
lola: fired transitions : 55598
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 LamportFastMutEx-COL-6-CTLFireability-02
lola: time limit : 3411 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-02
lola: result : false
lola: markings : 14
lola: fired transitions : 71
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 15
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-04: DISJ unknown DISJ
LamportFastMutEx-COL-6-CTLFireability-05: DISJ false DISJ
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-08: CTL unknown AGGR
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-14: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-15: CTL unknown AGGR
Time elapsed: 189 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is LamportFastMutEx-COL-6, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856416000370"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;