fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r231-tall-167856415900322
Last Updated
May 14, 2023

About the Execution of LoLa+red for Kanban-PT-20000

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4023.911 119931.00 97232.00 567.50 ???????TFFF?T?TT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415900322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Kanban-PT-20000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415900322
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 576K
-rw-r--r-- 1 mcc users 9.3K Feb 25 11:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 11:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 11:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 11:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:19 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:19 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 25 11:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 183K Feb 25 11:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 11:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 11:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Kanban-PT-20000-CTLFireability-00
FORMULA_NAME Kanban-PT-20000-CTLFireability-01
FORMULA_NAME Kanban-PT-20000-CTLFireability-02
FORMULA_NAME Kanban-PT-20000-CTLFireability-03
FORMULA_NAME Kanban-PT-20000-CTLFireability-04
FORMULA_NAME Kanban-PT-20000-CTLFireability-05
FORMULA_NAME Kanban-PT-20000-CTLFireability-06
FORMULA_NAME Kanban-PT-20000-CTLFireability-07
FORMULA_NAME Kanban-PT-20000-CTLFireability-08
FORMULA_NAME Kanban-PT-20000-CTLFireability-09
FORMULA_NAME Kanban-PT-20000-CTLFireability-10
FORMULA_NAME Kanban-PT-20000-CTLFireability-11
FORMULA_NAME Kanban-PT-20000-CTLFireability-12
FORMULA_NAME Kanban-PT-20000-CTLFireability-13
FORMULA_NAME Kanban-PT-20000-CTLFireability-14
FORMULA_NAME Kanban-PT-20000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679444462956

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Kanban-PT-20000
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 00:21:04] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 00:21:04] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 00:21:04] [INFO ] Load time of PNML (sax parser for PT used): 19 ms
[2023-03-22 00:21:04] [INFO ] Transformed 16 places.
[2023-03-22 00:21:04] [INFO ] Transformed 16 transitions.
[2023-03-22 00:21:04] [INFO ] Parsed PT model containing 16 places and 16 transitions and 40 arcs in 78 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Initial state reduction rules removed 1 formulas.
FORMULA Kanban-PT-20000-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 16 out of 16 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 11 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 16 cols
[2023-03-22 00:21:04] [INFO ] Computed 5 place invariants in 6 ms
[2023-03-22 00:21:04] [INFO ] Implicit Places using invariants in 128 ms returned []
[2023-03-22 00:21:04] [INFO ] Invariant cache hit.
[2023-03-22 00:21:04] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 192 ms to find 0 implicit places.
[2023-03-22 00:21:04] [INFO ] Invariant cache hit.
[2023-03-22 00:21:04] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 246 ms. Remains : 16/16 places, 16/16 transitions.
Support contains 16 out of 16 places after structural reductions.
[2023-03-22 00:21:05] [INFO ] Flatten gal took : 14 ms
[2023-03-22 00:21:05] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:21:05] [INFO ] Input system was already deterministic with 16 transitions.
Incomplete random walk after 20001 steps, including 0 resets, run finished after 21 ms. (steps per millisecond=952 ) properties (out of 30) seen :2
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=22 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 28) seen :22
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 6) seen :3
Running SMT prover for 3 properties.
[2023-03-22 00:21:05] [INFO ] Invariant cache hit.
[2023-03-22 00:21:05] [INFO ] [Real]Absence check using 4 positive place invariants in 4 ms returned sat
[2023-03-22 00:21:05] [INFO ] [Real]Absence check using 4 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-22 00:21:05] [INFO ] After 57ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-22 00:21:05] [INFO ] [Nat]Absence check using 4 positive place invariants in 1 ms returned sat
[2023-03-22 00:21:05] [INFO ] [Nat]Absence check using 4 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-22 00:21:05] [INFO ] After 17ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-22 00:21:05] [INFO ] After 32ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 8 ms.
[2023-03-22 00:21:05] [INFO ] After 81ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Finished Parikh walk after 39582 steps, including 0 resets, run visited all 3 properties in 645 ms. (steps per millisecond=61 )
Parikh walk visited 3 properties in 646 ms.
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 8 ms
[2023-03-22 00:21:06] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 2 ms
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:06] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 2 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:06] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 2 ms
[2023-03-22 00:21:06] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 2 ms
[2023-03-22 00:21:06] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:06] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (trivial) has 11 edges and 16 vertex of which 6 / 16 are part of one of the 3 SCC in 2 ms
Free SCC test removed 3 places
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 12 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 11 transition count 12
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 10 transition count 11
Applied a total of 5 rules in 2856 ms. Remains 10 /16 variables (removed 6) and now considering 11/16 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2856 ms. Remains : 10/16 places, 11/16 transitions.
[2023-03-22 00:21:09] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:09] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:09] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-22 00:21:09] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:09] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:09] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (trivial) has 12 edges and 16 vertex of which 6 / 16 are part of one of the 3 SCC in 0 ms
Free SCC test removed 3 places
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 12 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 11 transition count 12
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 10 transition count 11
Applied a total of 5 rules in 2700 ms. Remains 10 /16 variables (removed 6) and now considering 11/16 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2701 ms. Remains : 10/16 places, 11/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 0 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 0 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 0 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 0 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 0 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 0 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 0 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 0 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 0 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Input system was already deterministic with 15 transitions.
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 2 ms
[2023-03-22 00:21:11] [INFO ] Flatten gal took : 1 ms
[2023-03-22 00:21:11] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-22 00:21:11] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 16 places, 16 transitions and 40 arcs took 0 ms.
Total runtime 7407 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Kanban-PT-20000
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA Kanban-PT-20000-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Kanban-PT-20000-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Kanban-PT-20000-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Kanban-PT-20000-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Kanban-PT-20000-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Kanban-PT-20000-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679444582887

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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Kanban-PT-20000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Kanban-PT-20000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Kanban-PT-20000-CTLFireability-04: AGEF 0 0 0 0 1 0 1 0
Kanban-PT-20000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Kanban-PT-20000-CTLFireability-06: AGEF 0 0 0 0 1 0 1 0
Kanban-PT-20000-CTLFireability-09: CONJ 0 1 0 0 2 0 1 0
Kanban-PT-20000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
Kanban-PT-20000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 29 (type EXCL) for 24 Kanban-PT-20000-CTLFireability-09
lola: time limit : 3490 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for Kanban-PT-20000-CTLFireability-09
lola: result : false
lola: markings : 3
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 15

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Kanban-PT-20000-CTLFireability-00: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-01: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-02: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-03: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-04: AGEF unknown AGGR
Kanban-PT-20000-CTLFireability-05: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-06: AGEF unknown AGGR
Kanban-PT-20000-CTLFireability-08: AXAG false state space /EXEF
Kanban-PT-20000-CTLFireability-09: CONJ false CTL model checker
Kanban-PT-20000-CTLFireability-10: CTL false CTL model checker
Kanban-PT-20000-CTLFireability-11: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-12: CTL true CTL model checker
Kanban-PT-20000-CTLFireability-13: CTL unknown AGGR
Kanban-PT-20000-CTLFireability-14: DISJ true CTL model checker
Kanban-PT-20000-CTLFireability-15: EXEF true state space /EXEF


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Kanban-PT-20000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Kanban-PT-20000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415900322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Kanban-PT-20000.tgz
mv Kanban-PT-20000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;