About the Execution of LoLa+red for Kanban-PT-00010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
4072.012 | 213602.00 | 195740.00 | 844.60 | F???TF?TTFFTTF?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415800242.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Kanban-PT-00010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415800242
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 8.9K Feb 25 11:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 104K Feb 25 11:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 11:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 11:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:19 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:19 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 11:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Feb 25 11:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 25 11:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 11:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Kanban-PT-00010-CTLFireability-00
FORMULA_NAME Kanban-PT-00010-CTLFireability-01
FORMULA_NAME Kanban-PT-00010-CTLFireability-02
FORMULA_NAME Kanban-PT-00010-CTLFireability-03
FORMULA_NAME Kanban-PT-00010-CTLFireability-04
FORMULA_NAME Kanban-PT-00010-CTLFireability-05
FORMULA_NAME Kanban-PT-00010-CTLFireability-06
FORMULA_NAME Kanban-PT-00010-CTLFireability-07
FORMULA_NAME Kanban-PT-00010-CTLFireability-08
FORMULA_NAME Kanban-PT-00010-CTLFireability-09
FORMULA_NAME Kanban-PT-00010-CTLFireability-10
FORMULA_NAME Kanban-PT-00010-CTLFireability-11
FORMULA_NAME Kanban-PT-00010-CTLFireability-12
FORMULA_NAME Kanban-PT-00010-CTLFireability-13
FORMULA_NAME Kanban-PT-00010-CTLFireability-14
FORMULA_NAME Kanban-PT-00010-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679443095005
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Kanban-PT-00010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-21 23:58:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 23:58:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 23:58:16] [INFO ] Load time of PNML (sax parser for PT used): 20 ms
[2023-03-21 23:58:16] [INFO ] Transformed 16 places.
[2023-03-21 23:58:16] [INFO ] Transformed 16 transitions.
[2023-03-21 23:58:16] [INFO ] Parsed PT model containing 16 places and 16 transitions and 40 arcs in 75 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Initial state reduction rules removed 1 formulas.
FORMULA Kanban-PT-00010-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 16 out of 16 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 7 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
// Phase 1: matrix 16 rows 16 cols
[2023-03-21 23:58:16] [INFO ] Computed 5 place invariants in 7 ms
[2023-03-21 23:58:16] [INFO ] Implicit Places using invariants in 137 ms returned []
[2023-03-21 23:58:16] [INFO ] Invariant cache hit.
[2023-03-21 23:58:16] [INFO ] Implicit Places using invariants and state equation in 40 ms returned []
Implicit Place search using SMT with State Equation took 202 ms to find 0 implicit places.
[2023-03-21 23:58:16] [INFO ] Invariant cache hit.
[2023-03-21 23:58:16] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 246 ms. Remains : 16/16 places, 16/16 transitions.
Support contains 16 out of 16 places after structural reductions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 14 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 3 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 25) seen :24
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-21 23:58:17] [INFO ] Invariant cache hit.
[2023-03-21 23:58:17] [INFO ] After 26ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 2 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 3 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (trivial) has 11 edges and 16 vertex of which 6 / 16 are part of one of the 3 SCC in 2 ms
Free SCC test removed 3 places
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 12 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 11 transition count 12
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 10 transition count 11
Applied a total of 5 rules in 10 ms. Remains 10 /16 variables (removed 6) and now considering 11/16 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 10/16 places, 11/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 1 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 2 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 1 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 2 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 2 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 2 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 2 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (trivial) has 7 edges and 16 vertex of which 4 / 16 are part of one of the 2 SCC in 0 ms
Free SCC test removed 2 places
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 14 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 13 transition count 13
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 12 transition count 12
Applied a total of 5 rules in 2 ms. Remains 12 /16 variables (removed 4) and now considering 12/16 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 12/16 places, 12/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 0 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 0 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 1 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 1 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (trivial) has 10 edges and 16 vertex of which 6 / 16 are part of one of the 3 SCC in 0 ms
Free SCC test removed 3 places
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 12 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 11 transition count 12
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 4 place count 10 transition count 11
Iterating global reduction 2 with 1 rules applied. Total rules applied 5 place count 10 transition count 11
Applied a total of 5 rules in 1 ms. Remains 10 /16 variables (removed 6) and now considering 11/16 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 10/16 places, 11/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 1 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (trivial) has 11 edges and 16 vertex of which 6 / 16 are part of one of the 3 SCC in 0 ms
Free SCC test removed 3 places
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 12 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 11 transition count 12
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 10 transition count 11
Applied a total of 5 rules in 1 ms. Remains 10 /16 variables (removed 6) and now considering 11/16 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 10/16 places, 11/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 0 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 11 transitions.
Finished random walk after 12 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=6 )
FORMULA Kanban-PT-00010-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 14 transition count 15
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 15
Applied a total of 3 rules in 0 ms. Remains 14 /16 variables (removed 2) and now considering 15/16 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 14/16 places, 15/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 16
Applied a total of 1 rules in 0 ms. Remains 15 /16 variables (removed 1) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 15/16 places, 16/16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Flatten gal took : 1 ms
[2023-03-21 23:58:17] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 1 ms.
[2023-03-21 23:58:17] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 16 places, 16 transitions and 40 arcs took 0 ms.
Total runtime 1025 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Kanban-PT-00010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA Kanban-PT-00010-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Kanban-PT-00010-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679443308607
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 1 (type EXCL) for 0 Kanban-PT-00010-CTLFireability-00
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 1 (type EXCL) for Kanban-PT-00010-CTLFireability-00
lola: result : false
lola: markings : 179806
lola: fired transitions : 1318472
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 44 Kanban-PT-00010-CTLFireability-13
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type EXCL) for Kanban-PT-00010-CTLFireability-13
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 31 Kanban-PT-00010-CTLFireability-09
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Kanban-PT-00010-CTLFireability-09
lola: result : true
lola: markings : 67
lola: fired transitions : 67
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 Kanban-PT-00010-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
Kanban-PT-00010-CTLFireability-09: AXAF false state space /EXEG
Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Kanban-PT-00010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
Kanban-PT-00010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-10: EG 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
Kanban-PT-00010-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 5/276 6/32 Kanban-PT-00010-CTLFireability-14 1237746 m, 247549 m/sec, 7182189 t fired, .
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Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
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Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Kanban-PT-00010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
Kanban-PT-00010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-10: EG 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
Kanban-PT-00010-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 10/276 11/32 Kanban-PT-00010-CTLFireability-14 2501867 m, 252824 m/sec, 14422748 t fired, .
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Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
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Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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48 CTL EXCL 15/276 16/32 Kanban-PT-00010-CTLFireability-14 3725724 m, 244771 m/sec, 21326917 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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48 CTL EXCL 20/276 21/32 Kanban-PT-00010-CTLFireability-14 4929612 m, 240777 m/sec, 28168458 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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48 CTL EXCL 25/276 26/32 Kanban-PT-00010-CTLFireability-14 6023795 m, 218836 m/sec, 35328550 t fired, .
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Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Kanban-PT-00010-CTLFireability-10: EG 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
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48 CTL EXCL 30/276 29/32 Kanban-PT-00010-CTLFireability-14 6865763 m, 168393 m/sec, 43199680 t fired, .
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Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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48 CTL EXCL 35/276 32/32 Kanban-PT-00010-CTLFireability-14 7667345 m, 160316 m/sec, 51048009 t fired, .
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Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
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Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
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lola: FINISHED task # 42 (type EXCL) for Kanban-PT-00010-CTLFireability-11
lola: result : true
lola: markings : 25
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lola: result : true
lola: markings : 257
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 20/1710 25/32 Kanban-PT-00010-CTLFireability-01 5912515 m, 275430 m/sec, 31815189 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
Kanban-PT-00010-CTLFireability-04: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-07: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-08: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-09: AXAF false state space /EXEG
Kanban-PT-00010-CTLFireability-10: EG false state space / EG
Kanban-PT-00010-CTLFireability-11: DISJ true CTL model checker
Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Kanban-PT-00010-CTLFireability-01: CONJ 0 0 1 0 2 0 1 0
Kanban-PT-00010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Kanban-PT-00010-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Kanban-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Kanban-PT-00010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 25/1710 30/32 Kanban-PT-00010-CTLFireability-01 7258020 m, 269101 m/sec, 39225494 t fired, .
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lola: CANCELED task # 8 (type EXCL) for Kanban-PT-00010-CTLFireability-01 (memory limit exceeded)
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Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
Kanban-PT-00010-CTLFireability-04: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-07: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-08: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-09: AXAF false state space /EXEG
Kanban-PT-00010-CTLFireability-10: EG false state space / EG
Kanban-PT-00010-CTLFireability-11: DISJ true CTL model checker
Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Kanban-PT-00010-CTLFireability-01: CONJ 0 0 0 0 2 0 2 0
Kanban-PT-00010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Kanban-PT-00010-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Kanban-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Kanban-PT-00010-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Kanban-PT-00010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: time limit : 3390 sec
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lola: result : false
lola: markings : 51
lola: fired transitions : 184
lola: time used : 0.000000
lola: memory pages used : 1
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Kanban-PT-00010-CTLFireability-00: CTL false CTL model checker
Kanban-PT-00010-CTLFireability-01: CONJ unknown CONJ
Kanban-PT-00010-CTLFireability-02: CTL unknown AGGR
Kanban-PT-00010-CTLFireability-03: CTL unknown AGGR
Kanban-PT-00010-CTLFireability-04: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-05: CTL false CTL model checker
Kanban-PT-00010-CTLFireability-06: CTL unknown AGGR
Kanban-PT-00010-CTLFireability-07: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-08: CTL true CTL model checker
Kanban-PT-00010-CTLFireability-09: AXAF false state space /EXEG
Kanban-PT-00010-CTLFireability-10: EG false state space / EG
Kanban-PT-00010-CTLFireability-11: DISJ true CTL model checker
Kanban-PT-00010-CTLFireability-13: AXAG false state space /EXEF
Kanban-PT-00010-CTLFireability-14: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Kanban-PT-00010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Kanban-PT-00010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415800242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Kanban-PT-00010.tgz
mv Kanban-PT-00010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;