Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r230-tall-167856414700490.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is LeafsetExtension-PT-S16C4, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r230-tall-167856414700490
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 14K Feb 25 16:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 25 16:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Feb 25 16:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 86K Feb 25 16:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.5K Feb 25 16:21 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:21 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:21 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:21 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 16:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 25 16:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Feb 25 16:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 25 16:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 905K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-00
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-01
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-02
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-03
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-04
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-05
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-06
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-07
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-08
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-09
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-10
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-11
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-12
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-13
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-14
FORMULA_NAME LeafsetExtension-PT-S16C4-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679476612005

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LeafsetExtension-PT-S16C4
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT LeafsetExtension-PT-S16C4
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S16C4-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679476959948

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 60 (type SKEL/SRCH) for 36 LeafsetExtension-PT-S16C4-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for LeafsetExtension-PT-S16C4-CTLFireability-12
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 61 (type SKEL/SRCH) for 36 LeafsetExtension-PT-S16C4-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EXCL) for 50 LeafsetExtension-PT-S16C4-CTLFireability-14
lola: Created skeleton in 0.000000 secs.
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:663
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: FINISHED task # 61 (type SKEL/SRCH) for LeafsetExtension-PT-S16C4-CTLFireability-12
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 4/199 3/32 LeafsetExtension-PT-S16C4-CTLFireability-14 221420 m, 44284 m/sec, 1044075 t fired, .

Time elapsed: 6 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 9/199 5/32 LeafsetExtension-PT-S16C4-CTLFireability-14 481578 m, 52031 m/sec, 2340086 t fired, .

Time elapsed: 11 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 14/199 7/32 LeafsetExtension-PT-S16C4-CTLFireability-14 727685 m, 49221 m/sec, 3602837 t fired, .

Time elapsed: 16 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 19/199 10/32 LeafsetExtension-PT-S16C4-CTLFireability-14 986549 m, 51772 m/sec, 4853905 t fired, .

Time elapsed: 21 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 24/199 12/32 LeafsetExtension-PT-S16C4-CTLFireability-14 1225722 m, 47834 m/sec, 6058573 t fired, .

Time elapsed: 26 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 29/199 14/32 LeafsetExtension-PT-S16C4-CTLFireability-14 1477577 m, 50371 m/sec, 7302540 t fired, .

Time elapsed: 31 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 34/199 16/32 LeafsetExtension-PT-S16C4-CTLFireability-14 1731843 m, 50853 m/sec, 8538845 t fired, .

Time elapsed: 36 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 39/199 19/32 LeafsetExtension-PT-S16C4-CTLFireability-14 1995686 m, 52768 m/sec, 9793005 t fired, .

Time elapsed: 41 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 44/199 21/32 LeafsetExtension-PT-S16C4-CTLFireability-14 2253990 m, 51660 m/sec, 11047227 t fired, .

Time elapsed: 46 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 49/199 24/32 LeafsetExtension-PT-S16C4-CTLFireability-14 2504708 m, 50143 m/sec, 12235886 t fired, .

Time elapsed: 51 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 54/199 26/32 LeafsetExtension-PT-S16C4-CTLFireability-14 2760850 m, 51228 m/sec, 13473796 t fired, .

Time elapsed: 56 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 59/199 28/32 LeafsetExtension-PT-S16C4-CTLFireability-14 3016104 m, 51050 m/sec, 14630489 t fired, .

Time elapsed: 61 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 64/199 30/32 LeafsetExtension-PT-S16C4-CTLFireability-14 3240617 m, 44902 m/sec, 15779421 t fired, .

Time elapsed: 66 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 1 0 2 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 69/199 32/32 LeafsetExtension-PT-S16C4-CTLFireability-14 3466710 m, 45218 m/sec, 16959780 t fired, .

Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 53 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ 0 2 0 0 3 0 0 1
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 58 (type EXCL) for 57 LeafsetExtension-PT-S16C4-CTLFireability-15
lola: time limit : 207 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-15
lola: result : true
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 LeafsetExtension-PT-S16C4-CTLFireability-13
lola: time limit : 220 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-13
lola: result : true
lola: markings : 35
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 36 LeafsetExtension-PT-S16C4-CTLFireability-12
lola: time limit : 234 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-12
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 LeafsetExtension-PT-S16C4-CTLFireability-11
lola: time limit : 271 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/271 3/32 LeafsetExtension-PT-S16C4-CTLFireability-11 182372 m, 36474 m/sec, 719221 t fired, .

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/271 5/32 LeafsetExtension-PT-S16C4-CTLFireability-11 347669 m, 33059 m/sec, 1408099 t fired, .

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/271 7/32 LeafsetExtension-PT-S16C4-CTLFireability-11 503832 m, 31232 m/sec, 2085052 t fired, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/271 9/32 LeafsetExtension-PT-S16C4-CTLFireability-11 675206 m, 34274 m/sec, 2797577 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 25/271 12/32 LeafsetExtension-PT-S16C4-CTLFireability-11 832534 m, 31465 m/sec, 3476857 t fired, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 30/271 13/32 LeafsetExtension-PT-S16C4-CTLFireability-11 985156 m, 30524 m/sec, 4147390 t fired, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 35/271 15/32 LeafsetExtension-PT-S16C4-CTLFireability-11 1147515 m, 32471 m/sec, 4825954 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 40/271 17/32 LeafsetExtension-PT-S16C4-CTLFireability-11 1303633 m, 31223 m/sec, 5497063 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 45/271 19/32 LeafsetExtension-PT-S16C4-CTLFireability-11 1466272 m, 32527 m/sec, 6189254 t fired, .

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 50/271 21/32 LeafsetExtension-PT-S16C4-CTLFireability-11 1620731 m, 30891 m/sec, 6861635 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 55/271 23/32 LeafsetExtension-PT-S16C4-CTLFireability-11 1777131 m, 31280 m/sec, 7532358 t fired, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 60/271 25/32 LeafsetExtension-PT-S16C4-CTLFireability-11 1927829 m, 30139 m/sec, 8187406 t fired, .

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 65/271 27/32 LeafsetExtension-PT-S16C4-CTLFireability-11 2078598 m, 30153 m/sec, 8837898 t fired, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 70/271 29/32 LeafsetExtension-PT-S16C4-CTLFireability-11 2234629 m, 31206 m/sec, 9505658 t fired, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 75/271 31/32 LeafsetExtension-PT-S16C4-CTLFireability-11 2394249 m, 31924 m/sec, 10175860 t fired, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 31 (type EXCL) for 30 LeafsetExtension-PT-S16C4-CTLFireability-10
lola: time limit : 287 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-10
lola: result : true
lola: markings : 32
lola: fired transitions : 63
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 LeafsetExtension-PT-S16C4-CTLFireability-09
lola: time limit : 313 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-09
lola: result : false
lola: markings : 70340
lola: fired transitions : 203854
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 LeafsetExtension-PT-S16C4-CTLFireability-08
lola: time limit : 344 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-08
lola: result : true
lola: markings : 32
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 LeafsetExtension-PT-S16C4-CTLFireability-07
lola: time limit : 382 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-07
lola: result : true
lola: markings : 82462
lola: fired transitions : 320953
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 19 (type EXCL) for 18 LeafsetExtension-PT-S16C4-CTLFireability-06
lola: time limit : 430 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 1/430 1/32 LeafsetExtension-PT-S16C4-CTLFireability-06 72716 m, 14543 m/sec, 210266 t fired, .

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 19 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-06
lola: result : true
lola: markings : 84042
lola: fired transitions : 244018
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 16 (type EXCL) for 15 LeafsetExtension-PT-S16C4-CTLFireability-05
lola: time limit : 491 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-05
lola: result : false
lola: markings : 84
lola: fired transitions : 181
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 LeafsetExtension-PT-S16C4-CTLFireability-04
lola: time limit : 573 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-04
lola: result : true
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 LeafsetExtension-PT-S16C4-CTLFireability-03
lola: time limit : 687 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-03
lola: result : false
lola: markings : 173042
lola: fired transitions : 679224
lola: time used : 4.000000
lola: memory pages used : 3
lola: LAUNCH task # 7 (type EXCL) for 6 LeafsetExtension-PT-S16C4-CTLFireability-02
lola: time limit : 858 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 0/858 1/32 LeafsetExtension-PT-S16C4-CTLFireability-02 14105 m, 2821 m/sec, 55099 t fired, .

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/858 3/32 LeafsetExtension-PT-S16C4-CTLFireability-02 201855 m, 37550 m/sec, 778004 t fired, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/858 5/32 LeafsetExtension-PT-S16C4-CTLFireability-02 367229 m, 33074 m/sec, 1444160 t fired, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/858 6/32 LeafsetExtension-PT-S16C4-CTLFireability-02 518865 m, 30327 m/sec, 2107585 t fired, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/858 8/32 LeafsetExtension-PT-S16C4-CTLFireability-02 675298 m, 31286 m/sec, 2772980 t fired, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/858 10/32 LeafsetExtension-PT-S16C4-CTLFireability-02 828686 m, 30677 m/sec, 3433829 t fired, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/858 12/32 LeafsetExtension-PT-S16C4-CTLFireability-02 978794 m, 30021 m/sec, 4089132 t fired, .

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/858 14/32 LeafsetExtension-PT-S16C4-CTLFireability-02 1131371 m, 30515 m/sec, 4761308 t fired, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/858 16/32 LeafsetExtension-PT-S16C4-CTLFireability-02 1304653 m, 34656 m/sec, 5431844 t fired, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/858 17/32 LeafsetExtension-PT-S16C4-CTLFireability-02 1450942 m, 29257 m/sec, 6092217 t fired, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/858 19/32 LeafsetExtension-PT-S16C4-CTLFireability-02 1597285 m, 29268 m/sec, 6747301 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 55/858 21/32 LeafsetExtension-PT-S16C4-CTLFireability-02 1743264 m, 29195 m/sec, 7406489 t fired, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 60/858 22/32 LeafsetExtension-PT-S16C4-CTLFireability-02 1888176 m, 28982 m/sec, 8056086 t fired, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 65/858 24/32 LeafsetExtension-PT-S16C4-CTLFireability-02 2030361 m, 28437 m/sec, 8681678 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 70/858 26/32 LeafsetExtension-PT-S16C4-CTLFireability-02 2204327 m, 34793 m/sec, 9335890 t fired, .

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 76/858 27/32 LeafsetExtension-PT-S16C4-CTLFireability-02 2343742 m, 27883 m/sec, 9992150 t fired, .

Time elapsed: 242 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 81/858 28/32 LeafsetExtension-PT-S16C4-CTLFireability-02 2491724 m, 29596 m/sec, 10645474 t fired, .

Time elapsed: 247 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 86/858 30/32 LeafsetExtension-PT-S16C4-CTLFireability-02 2639400 m, 29535 m/sec, 11298422 t fired, .

Time elapsed: 252 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 91/858 31/32 LeafsetExtension-PT-S16C4-CTLFireability-02 2779533 m, 28026 m/sec, 11945788 t fired, .

Time elapsed: 257 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 262 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 LeafsetExtension-PT-S16C4-CTLFireability-01
lola: time limit : 1112 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/1112 3/32 LeafsetExtension-PT-S16C4-CTLFireability-01 183954 m, 36790 m/sec, 725090 t fired, .

Time elapsed: 267 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/1112 5/32 LeafsetExtension-PT-S16C4-CTLFireability-01 349616 m, 33132 m/sec, 1415220 t fired, .

Time elapsed: 272 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/1112 7/32 LeafsetExtension-PT-S16C4-CTLFireability-01 506159 m, 31308 m/sec, 2092544 t fired, .

Time elapsed: 277 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/1112 9/32 LeafsetExtension-PT-S16C4-CTLFireability-01 675287 m, 33825 m/sec, 2795762 t fired, .

Time elapsed: 282 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/1112 12/32 LeafsetExtension-PT-S16C4-CTLFireability-01 829237 m, 30790 m/sec, 3459212 t fired, .

Time elapsed: 287 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/1112 13/32 LeafsetExtension-PT-S16C4-CTLFireability-01 980969 m, 30346 m/sec, 4127088 t fired, .

Time elapsed: 292 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/1112 15/32 LeafsetExtension-PT-S16C4-CTLFireability-01 1144465 m, 32699 m/sec, 4808350 t fired, .

Time elapsed: 297 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/1112 17/32 LeafsetExtension-PT-S16C4-CTLFireability-01 1300461 m, 31199 m/sec, 5478026 t fired, .

Time elapsed: 302 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/1112 19/32 LeafsetExtension-PT-S16C4-CTLFireability-01 1463025 m, 32512 m/sec, 6170434 t fired, .

Time elapsed: 307 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/1112 21/32 LeafsetExtension-PT-S16C4-CTLFireability-01 1617427 m, 30880 m/sec, 6841781 t fired, .

Time elapsed: 312 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/1112 23/32 LeafsetExtension-PT-S16C4-CTLFireability-01 1773779 m, 31270 m/sec, 7512370 t fired, .

Time elapsed: 317 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/1112 25/32 LeafsetExtension-PT-S16C4-CTLFireability-01 1926491 m, 30542 m/sec, 8175615 t fired, .

Time elapsed: 322 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 65/1112 27/32 LeafsetExtension-PT-S16C4-CTLFireability-01 2080990 m, 30899 m/sec, 8841843 t fired, .

Time elapsed: 327 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 70/1112 29/32 LeafsetExtension-PT-S16C4-CTLFireability-01 2242376 m, 32277 m/sec, 9525953 t fired, .

Time elapsed: 332 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 75/1112 31/32 LeafsetExtension-PT-S16C4-CTLFireability-01 2404193 m, 32363 m/sec, 10209039 t fired, .

Time elapsed: 337 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 342 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 LeafsetExtension-PT-S16C4-CTLFireability-00
lola: time limit : 1629 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-00
lola: result : false
lola: markings : 65839
lola: fired transitions : 208104
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 63 (type EXCL) for 50 LeafsetExtension-PT-S16C4-CTLFireability-14
lola: time limit : 3257 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ 0 0 1 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 LTL EXCL 4/3257 5/32 LeafsetExtension-PT-S16C4-CTLFireability-14 405852 m, 81170 m/sec, 704444 t fired, .

Time elapsed: 347 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 63 (type EXCL) for LeafsetExtension-PT-S16C4-CTLFireability-14
lola: result : false
lola: markings : 495322
lola: fired transitions : 863701
lola: time used : 4.000000
lola: memory pages used : 6
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S16C4-CTLFireability-00: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-01: CTL unknown AGGR
LeafsetExtension-PT-S16C4-CTLFireability-02: CTL unknown AGGR
LeafsetExtension-PT-S16C4-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-04: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-09: CTL false CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-10: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-11: CTL unknown AGGR
LeafsetExtension-PT-S16C4-CTLFireability-12: DISJ true state space /EXEF
LeafsetExtension-PT-S16C4-CTLFireability-13: CTL true CTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-14: DISJ true LTL model checker
LeafsetExtension-PT-S16C4-CTLFireability-15: CTL true CTL model checker


Time elapsed: 347 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S16C4"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S16C4, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r230-tall-167856414700490"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S16C4.tgz
mv LeafsetExtension-PT-S16C4 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;