About the Execution of LoLA for LamportFastMutEx-COL-6
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
3741.344 | 197745.00 | 205610.00 | 810.80 | TTFF?FFT?TTTFTT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r230-tall-167856414600370.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is LamportFastMutEx-COL-6, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r230-tall-167856414600370
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.1K Feb 25 13:41 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 13:41 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 13:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 13:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 13:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 13:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Feb 25 13:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-00
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-01
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-02
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-03
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-04
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-05
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-06
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-07
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-08
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-09
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-10
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-11
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-12
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-13
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-14
FORMULA_NAME LamportFastMutEx-COL-6-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679454997920
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-COL-6
Not applying reductions.
Model is COL
CTLFireability PT
[2023-03-22 03:16:39] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLFireability, --reduce-single, STATESPACE]
[2023-03-22 03:16:39] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-22 03:16:39] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-22 03:16:39] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-22 03:16:39] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 623 ms
[2023-03-22 03:16:40] [INFO ] Imported 18 HL places and 17 HL transitions for a total of 217 PT places and 525.0 transition bindings in 15 ms.
Parsed 16 properties from file ./CTLFireability.xml in 12 ms.
[2023-03-22 03:16:40] [INFO ] Unfolded HLPN to a Petri net with 217 places and 420 transitions 1834 arcs in 26 ms.
[2023-03-22 03:16:40] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Reduce places removed 0 places and 7 transitions.
Reduce places removed 7 places and 0 transitions.
[2023-03-22 03:16:40] [INFO ] Export to MCC of 16 properties in file ./CTLFireability.STATESPACE.xml took 25 ms.
[2023-03-22 03:16:40] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 210 places, 413 transitions and 1792 arcs took 3 ms.
Total runtime 836 ms.
starting LoLA
BK_INPUT LamportFastMutEx-COL-6
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfCTLFireability
FORMULA LamportFastMutEx-COL-6-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-COL-6-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679455195665
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfCTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfCTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfCTLFireability/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 59 transitions removed,34 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 7 (type EXCL) for 6 LamportFastMutEx-COL-6-CTLFireability-02
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 7 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-02
lola: result : false
lola: markings : 14
lola: fired transitions : 71
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 LamportFastMutEx-COL-6-CTLFireability-03
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-03
lola: result : false
lola: markings : 1777
lola: fired transitions : 3283
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 52 (type EXCL) for 33 LamportFastMutEx-COL-6-CTLFireability-07
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 52 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 72 (type EXCL) for 33 LamportFastMutEx-COL-6-CTLFireability-07
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: FINISHED task # 72 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 33 LamportFastMutEx-COL-6-CTLFireability-07
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 33 LamportFastMutEx-COL-6-CTLFireability-07
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 104 (type FNDP) for 95 LamportFastMutEx-COL-6-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type EQUN) for 95 LamportFastMutEx-COL-6-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 107 (type SRCH) for 95 LamportFastMutEx-COL-6-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type SRCH) for LamportFastMutEx-COL-6-CTLFireability-13
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 104 (type FNDP) for LamportFastMutEx-COL-6-CTLFireability-13
lola: result : true
lola: fired transitions : 3426
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 105 (type EQUN) for LamportFastMutEx-COL-6-CTLFireability-13 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 36 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-07
lola: result : true
lola: markings : 274228
lola: fired transitions : 944002
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 93 (type EXCL) for 92 LamportFastMutEx-COL-6-CTLFireability-12
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 93 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-12
lola: result : false
lola: markings : 1986
lola: fired transitions : 9861
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 90 (type EXCL) for 89 LamportFastMutEx-COL-6-CTLFireability-11
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 90 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-11
lola: result : true
lola: markings : 210080
lola: fired transitions : 1061686
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 87 (type EXCL) for 86 LamportFastMutEx-COL-6-CTLFireability-10
lola: time limit : 171 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
87 CTL EXCL 1/171 1/32 LamportFastMutEx-COL-6-CTLFireability-10 141149 m, 28229 m/sec, 782142 t fired, .
Time elapsed: 8 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 87 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-10
lola: result : true
lola: markings : 313596
lola: fired transitions : 1810161
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 84 (type EXCL) for 83 LamportFastMutEx-COL-6-CTLFireability-09
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: FINISHED task # 84 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-09
lola: result : true
lola: markings : 26702
lola: fired transitions : 110136
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 81 (type EXCL) for 80 LamportFastMutEx-COL-6-CTLFireability-08
lola: time limit : 188 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 3/188 3/32 LamportFastMutEx-COL-6-CTLFireability-08 587355 m, 117471 m/sec, 1154333 t fired, .
Time elapsed: 13 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 105 (type EQUN) for LamportFastMutEx-COL-6-CTLFireability-13
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 8/188 7/32 LamportFastMutEx-COL-6-CTLFireability-08 1549261 m, 192381 m/sec, 2939321 t fired, .
Time elapsed: 18 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 13/188 11/32 LamportFastMutEx-COL-6-CTLFireability-08 2479063 m, 185960 m/sec, 4764171 t fired, .
Time elapsed: 23 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 18/188 15/32 LamportFastMutEx-COL-6-CTLFireability-08 3364588 m, 177105 m/sec, 6572794 t fired, .
Time elapsed: 28 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 23/188 19/32 LamportFastMutEx-COL-6-CTLFireability-08 4246898 m, 176462 m/sec, 8485156 t fired, .
Time elapsed: 33 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 28/188 23/32 LamportFastMutEx-COL-6-CTLFireability-08 5108901 m, 172400 m/sec, 10205840 t fired, .
Time elapsed: 38 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 33/188 26/32 LamportFastMutEx-COL-6-CTLFireability-08 5900903 m, 158400 m/sec, 11993475 t fired, .
Time elapsed: 43 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 CTL EXCL 38/188 30/32 LamportFastMutEx-COL-6-CTLFireability-08 6789386 m, 177696 m/sec, 13908375 t fired, .
Time elapsed: 48 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 81 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-07: CONJ 0 8 0 0 16 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 53 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 78 (type EXCL) for 33 LamportFastMutEx-COL-6-CTLFireability-07
lola: time limit : 197 sec
lola: memory limit: 32 pages
lola: FINISHED task # 78 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-07
lola: result : true
lola: markings : 12
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 LamportFastMutEx-COL-6-CTLFireability-06
lola: time limit : 354 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-06
lola: result : false
lola: markings : 10914
lola: fired transitions : 36741
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 12 LamportFastMutEx-COL-6-CTLFireability-04
lola: time limit : 394 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-04
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 LamportFastMutEx-COL-6-CTLFireability-01
lola: time limit : 443 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-01
lola: result : true
lola: markings : 14
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 LamportFastMutEx-COL-6-CTLFireability-00
lola: time limit : 506 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-00
lola: result : true
lola: markings : 10920
lola: fired transitions : 25756
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 19 LamportFastMutEx-COL-6-CTLFireability-05
lola: time limit : 591 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-05
lola: result : true
lola: markings : 353
lola: fired transitions : 377
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 12 LamportFastMutEx-COL-6-CTLFireability-04
lola: time limit : 709 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 4/709 4/32 LamportFastMutEx-COL-6-CTLFireability-04 867150 m, 173430 m/sec, 4177330 t fired, .
Time elapsed: 58 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 9/709 8/32 LamportFastMutEx-COL-6-CTLFireability-04 1603799 m, 147329 m/sec, 8515423 t fired, .
Time elapsed: 63 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 14/709 11/32 LamportFastMutEx-COL-6-CTLFireability-04 2321536 m, 143547 m/sec, 12748142 t fired, .
Time elapsed: 68 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 19/709 14/32 LamportFastMutEx-COL-6-CTLFireability-04 3000673 m, 135827 m/sec, 17008515 t fired, .
Time elapsed: 73 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 24/709 18/32 LamportFastMutEx-COL-6-CTLFireability-04 3668780 m, 133621 m/sec, 21177999 t fired, .
Time elapsed: 78 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 29/709 21/32 LamportFastMutEx-COL-6-CTLFireability-04 4320226 m, 130289 m/sec, 25315542 t fired, .
Time elapsed: 83 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 34/709 23/32 LamportFastMutEx-COL-6-CTLFireability-04 4952220 m, 126398 m/sec, 29334543 t fired, .
Time elapsed: 88 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 39/709 26/32 LamportFastMutEx-COL-6-CTLFireability-04 5564314 m, 122418 m/sec, 33186943 t fired, .
Time elapsed: 93 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 44/709 29/32 LamportFastMutEx-COL-6-CTLFireability-04 6114956 m, 110128 m/sec, 36848378 t fired, .
Time elapsed: 98 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 49/709 31/32 LamportFastMutEx-COL-6-CTLFireability-04 6686873 m, 114383 m/sec, 40557505 t fired, .
Time elapsed: 103 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 15 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 109 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 102 (type EXCL) for 101 LamportFastMutEx-COL-6-CTLFireability-15
lola: time limit : 872 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 5/872 3/32 LamportFastMutEx-COL-6-CTLFireability-15 452260 m, 90452 m/sec, 3396206 t fired, .
Time elapsed: 114 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 10/872 5/32 LamportFastMutEx-COL-6-CTLFireability-15 937737 m, 97095 m/sec, 6887596 t fired, .
Time elapsed: 119 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 15/872 7/32 LamportFastMutEx-COL-6-CTLFireability-15 1402368 m, 92926 m/sec, 10234594 t fired, .
Time elapsed: 124 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 20/872 9/32 LamportFastMutEx-COL-6-CTLFireability-15 1857377 m, 91001 m/sec, 13546611 t fired, .
Time elapsed: 129 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 25/872 11/32 LamportFastMutEx-COL-6-CTLFireability-15 2295463 m, 87617 m/sec, 16780093 t fired, .
Time elapsed: 134 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 30/872 13/32 LamportFastMutEx-COL-6-CTLFireability-15 2704746 m, 81856 m/sec, 20029583 t fired, .
Time elapsed: 139 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 35/872 15/32 LamportFastMutEx-COL-6-CTLFireability-15 3125540 m, 84158 m/sec, 23276328 t fired, .
Time elapsed: 144 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 40/872 17/32 LamportFastMutEx-COL-6-CTLFireability-15 3535563 m, 82004 m/sec, 26545230 t fired, .
Time elapsed: 149 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 45/872 19/32 LamportFastMutEx-COL-6-CTLFireability-15 3944458 m, 81779 m/sec, 29827861 t fired, .
Time elapsed: 154 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 50/872 21/32 LamportFastMutEx-COL-6-CTLFireability-15 4338875 m, 78883 m/sec, 33174317 t fired, .
Time elapsed: 159 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 55/872 23/32 LamportFastMutEx-COL-6-CTLFireability-15 4741136 m, 80452 m/sec, 36498021 t fired, .
Time elapsed: 164 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 60/872 25/32 LamportFastMutEx-COL-6-CTLFireability-15 5136496 m, 79072 m/sec, 39747859 t fired, .
Time elapsed: 169 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 65/872 27/32 LamportFastMutEx-COL-6-CTLFireability-15 5534623 m, 79625 m/sec, 42880081 t fired, .
Time elapsed: 174 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 70/872 28/32 LamportFastMutEx-COL-6-CTLFireability-15 5932586 m, 79592 m/sec, 46022737 t fired, .
Time elapsed: 179 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 75/872 30/32 LamportFastMutEx-COL-6-CTLFireability-15 6328795 m, 79241 m/sec, 49170657 t fired, .
Time elapsed: 184 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 CTL EXCL 80/872 32/32 LamportFastMutEx-COL-6-CTLFireability-15 6723297 m, 78900 m/sec, 52317188 t fired, .
Time elapsed: 189 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 102 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-COL-6-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
LamportFastMutEx-COL-6-CTLFireability-05: DISJ 0 2 0 0 4 0 0 0
LamportFastMutEx-COL-6-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-COL-6-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-COL-6-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 194 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 26 (type EXCL) for 19 LamportFastMutEx-COL-6-CTLFireability-05
lola: time limit : 1135 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-05
lola: result : false
lola: markings : 118909
lola: fired transitions : 337106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 99 (type EXCL) for 98 LamportFastMutEx-COL-6-CTLFireability-14
lola: time limit : 1703 sec
lola: memory limit: 32 pages
lola: FINISHED task # 99 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-14
lola: result : true
lola: markings : 1986
lola: fired transitions : 3961
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 19 LamportFastMutEx-COL-6-CTLFireability-05
lola: time limit : 3406 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for LamportFastMutEx-COL-6-CTLFireability-05
lola: result : false
lola: markings : 14
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-6-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-02: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-03: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-04: DISJ unknown DISJ
LamportFastMutEx-COL-6-CTLFireability-05: DISJ false DISJ
LamportFastMutEx-COL-6-CTLFireability-06: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-07: CONJ true CONJ
LamportFastMutEx-COL-6-CTLFireability-08: CTL unknown AGGR
LamportFastMutEx-COL-6-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-10: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-11: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-12: CTL false CTL model checker
LamportFastMutEx-COL-6-CTLFireability-13: EF true findpath
LamportFastMutEx-COL-6-CTLFireability-14: CTL true CTL model checker
LamportFastMutEx-COL-6-CTLFireability-15: CTL unknown AGGR
Time elapsed: 194 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is LamportFastMutEx-COL-6, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r230-tall-167856414600370"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;