About the Execution of smpt for GlobalResAllocation-PT-05
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16048.035 | 824368.00 | 1994477.00 | 3382.40 | FFTFTFFTTFFTFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r204-smll-167840350200231.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool smpt
Input is GlobalResAllocation-PT-05, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r204-smll-167840350200231
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 272M
-rw-r--r-- 1 mcc users 35K Feb 25 19:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 179K Feb 25 19:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.1M Feb 25 19:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 35M Feb 25 19:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 18K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.1M Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 29M Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 60K Feb 26 00:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 276K Feb 26 00:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 27M Feb 26 00:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109M Feb 26 00:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.9K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 55M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-00
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-01
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-02
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-03
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-04
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-05
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-06
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-07
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-08
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-09
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-10
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-11
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-12
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-13
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-14
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityFireability-15
=== Now, execution of the tool begins
BK_START 1678548142109
# Hello
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-05 FALSE TECHNIQUES DUPLICATE
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING WALK
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING WALK
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING WALK
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION PROJECTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION PROJECTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION PROJECTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION PROJECTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION PROJECTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION IMPLICIT SAT_SMT STATE_EQUATION
FORMULA GlobalResAllocation-PT-05-ReachabilityFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING BULK WALK
# Bye bye
BK_STOP 1678548966477
--------------------
content from stderr:
Reachability True
Host mcc2023
Colored False
z3 process has failed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-05"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="smpt"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smpt"
echo " Input is GlobalResAllocation-PT-05, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r204-smll-167840350200231"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-05.tgz
mv GlobalResAllocation-PT-05 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;