About the Execution of LoLa+red for HouseConstruction-PT-00050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2675.411 | 224587.00 | 212438.00 | 1306.80 | F?TF?T?F?TTF?T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346100546.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HouseConstruction-PT-00050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346100546
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 8.1K Feb 25 13:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K Feb 25 13:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 13:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 25 13:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 142K Feb 25 13:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Feb 25 13:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 25 13:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-00
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-01
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-02
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-03
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-04
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-05
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-06
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-07
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-08
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-09
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-10
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-11
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-12
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-13
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-14
FORMULA_NAME HouseConstruction-PT-00050-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678562911170
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HouseConstruction-PT-00050
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 19:28:34] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 19:28:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 19:28:34] [INFO ] Load time of PNML (sax parser for PT used): 52 ms
[2023-03-11 19:28:34] [INFO ] Transformed 26 places.
[2023-03-11 19:28:34] [INFO ] Transformed 18 transitions.
[2023-03-11 19:28:35] [INFO ] Parsed PT model containing 26 places and 18 transitions and 51 arcs in 212 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Support contains 26 out of 26 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 20 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 26 cols
[2023-03-11 19:28:35] [INFO ] Computed 8 place invariants in 9 ms
[2023-03-11 19:28:35] [INFO ] Implicit Places using invariants in 247 ms returned []
[2023-03-11 19:28:35] [INFO ] Invariant cache hit.
[2023-03-11 19:28:35] [INFO ] Implicit Places using invariants and state equation in 95 ms returned []
Implicit Place search using SMT with State Equation took 417 ms to find 0 implicit places.
[2023-03-11 19:28:35] [INFO ] Invariant cache hit.
[2023-03-11 19:28:35] [INFO ] Dead Transitions using invariants and state equation in 86 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 526 ms. Remains : 26/26 places, 18/18 transitions.
Support contains 26 out of 26 places after structural reductions.
[2023-03-11 19:28:35] [INFO ] Flatten gal took : 33 ms
[2023-03-11 19:28:35] [INFO ] Flatten gal took : 12 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10006 steps, including 10 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 26) seen :24
Finished Best-First random walk after 261 steps, including 0 resets, run visited all 2 properties in 6 ms. (steps per millisecond=43 )
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 7 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 8 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 26 stabilizing places and 18 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 26 transition count 18
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 16 are kept as prefixes of interest. Removing 10 places using SCC suffix rule.2 ms
Discarding 10 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 3 Pre rules applied. Total rules applied 1 place count 16 transition count 9
Deduced a syphon composed of 3 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 9 place count 11 transition count 9
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 11 place count 10 transition count 8
Applied a total of 11 rules in 17 ms. Remains 10 /26 variables (removed 16) and now considering 8/18 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 10/26 places, 8/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 25 transition count 14
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 5 rules applied. Total rules applied 9 place count 21 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 10 place count 20 transition count 13
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 10 place count 20 transition count 10
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 16 place count 17 transition count 10
Applied a total of 16 rules in 14 ms. Remains 17 /26 variables (removed 9) and now considering 10/18 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 17/26 places, 10/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 14 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.1 ms
Discarding 12 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 13 transition count 8
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 12 transition count 8
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 3 place count 12 transition count 5
Deduced a syphon composed of 3 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 11 place count 7 transition count 5
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 11 place count 7 transition count 4
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 13 place count 6 transition count 4
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 2 with 1 rules applied. Total rules applied 14 place count 5 transition count 4
Applied a total of 14 rules in 14 ms. Remains 5 /26 variables (removed 21) and now considering 4/18 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 5/26 places, 4/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 1 are kept as prefixes of interest. Removing 25 places using SCC suffix rule.1 ms
Discarding 25 places :
Also discarding 17 output transitions
Drop transitions removed 17 transitions
Applied a total of 1 rules in 2 ms. Remains 1 /26 variables (removed 25) and now considering 1/18 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 1/26 places, 1/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 0 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 0 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 4 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 4 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 4 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 4 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 25 transition count 15
Reduce places removed 3 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 4 rules applied. Total rules applied 7 place count 22 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 8 place count 21 transition count 14
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 8 place count 21 transition count 9
Deduced a syphon composed of 5 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 20 place count 14 transition count 9
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 20 place count 14 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 22 place count 13 transition count 8
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 26 place count 10 transition count 7
Applied a total of 26 rules in 9 ms. Remains 10 /26 variables (removed 16) and now considering 7/18 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 10/26 places, 7/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 25 transition count 16
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 3 rules applied. Total rules applied 5 place count 23 transition count 15
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 22 transition count 15
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 6 place count 22 transition count 12
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 12 place count 19 transition count 12
Applied a total of 12 rules in 5 ms. Remains 19 /26 variables (removed 7) and now considering 12/18 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 19/26 places, 12/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 4 are kept as prefixes of interest. Removing 22 places using SCC suffix rule.0 ms
Discarding 22 places :
Also discarding 14 output transitions
Drop transitions removed 14 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 3 ms. Remains 3 /26 variables (removed 23) and now considering 3/18 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 3/26 places, 3/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 0 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 15 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.0 ms
Discarding 11 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 15 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 10
Applied a total of 3 rules in 3 ms. Remains 14 /26 variables (removed 12) and now considering 10/18 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 14/26 places, 10/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 15 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.1 ms
Discarding 11 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 1 place count 14 transition count 9
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 3 place count 13 transition count 9
Applied a total of 3 rules in 4 ms. Remains 13 /26 variables (removed 13) and now considering 9/18 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 13/26 places, 9/18 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:28:36] [INFO ] Input system was already deterministic with 9 transitions.
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:28:36] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-11 19:28:36] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 26 places, 18 transitions and 51 arcs took 0 ms.
Total runtime 1865 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HouseConstruction-PT-00050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
CTLFireability
FORMULA HouseConstruction-PT-00050-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HouseConstruction-PT-00050-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678563135757
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 38 (type EXCL) for 37 HouseConstruction-PT-00050-CTLFireability-11
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type FNDP) for 27 HouseConstruction-PT-00050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 27 HouseConstruction-PT-00050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type SRCH) for 27 HouseConstruction-PT-00050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SRCH) for HouseConstruction-PT-00050-CTLFireability-09
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type FNDP) for HouseConstruction-PT-00050-CTLFireability-09 (obsolete)
lola: CANCELED task # 54 (type EQUN) for HouseConstruction-PT-00050-CTLFireability-09 (obsolete)
lola: FINISHED task # 53 (type FNDP) for HouseConstruction-PT-00050-CTLFireability-09
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/371/CTLFireability-54.sara.
lola: FINISHED task # 38 (type EXCL) for HouseConstruction-PT-00050-CTLFireability-11
lola: result : false
lola: markings : 20293
lola: fired transitions : 26703
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 HouseConstruction-PT-00050-CTLFireability-12
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EQUN) for HouseConstruction-PT-00050-CTLFireability-09
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-02: EFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-03: EG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-10: AFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 5/257 5/32 HouseConstruction-PT-00050-CTLFireability-12 1002148 m, 200429 m/sec, 4928040 t fired, .
Time elapsed: 5 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-02: EFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-03: EG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-10: AFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 10/257 8/32 HouseConstruction-PT-00050-CTLFireability-12 1977699 m, 195110 m/sec, 10057498 t fired, .
Time elapsed: 10 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00050-CTLFireability-02: EFAG 0 1 0 0 1 0 0 0
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4 CTL EXCL 25/868 25/32 HouseConstruction-PT-00050-CTLFireability-01 6216198 m, 235943 m/sec, 29049372 t fired, .
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HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
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HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
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HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
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4 CTL EXCL 30/868 30/32 HouseConstruction-PT-00050-CTLFireability-01 7386467 m, 234053 m/sec, 34634387 t fired, .
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
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lola: time limit : 1146 sec
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
HouseConstruction-PT-00050-CTLFireability-03: EG false state space / EG
HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 5/1146 7/32 HouseConstruction-PT-00050-CTLFireability-14 1534405 m, 306881 m/sec, 6688336 t fired, .
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HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 10/1146 12/32 HouseConstruction-PT-00050-CTLFireability-14 2838528 m, 260824 m/sec, 13237790 t fired, .
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
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47 CTL EXCL 15/1146 17/32 HouseConstruction-PT-00050-CTLFireability-14 4051439 m, 242582 m/sec, 19517913 t fired, .
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 20/1146 22/32 HouseConstruction-PT-00050-CTLFireability-14 5326751 m, 255062 m/sec, 25854765 t fired, .
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HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
HouseConstruction-PT-00050-CTLFireability-03: EG false state space / EG
HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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HouseConstruction-PT-00050-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00050-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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HouseConstruction-PT-00050-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
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47 CTL EXCL 25/1146 26/32 HouseConstruction-PT-00050-CTLFireability-14 6373109 m, 209271 m/sec, 31689393 t fired, .
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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47 CTL EXCL 30/1146 31/32 HouseConstruction-PT-00050-CTLFireability-14 7566176 m, 238613 m/sec, 37642968 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
HouseConstruction-PT-00050-CTLFireability-03: EG false state space / EG
HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
HouseConstruction-PT-00050-CTLFireability-03: EG false state space / EG
HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 5/1702 11/32 HouseConstruction-PT-00050-CTLFireability-15 2439946 m, 487989 m/sec, 6645208 t fired, .
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HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 10/1702 21/32 HouseConstruction-PT-00050-CTLFireability-15 4878179 m, 487646 m/sec, 13597460 t fired, .
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HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
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50 CTL EXCL 15/1702 31/32 HouseConstruction-PT-00050-CTLFireability-15 7334772 m, 491318 m/sec, 20586087 t fired, .
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HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
HouseConstruction-PT-00050-CTLFireability-03: EG false state space / EG
HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
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lola: LAUNCH task # 1 (type EXCL) for 0 HouseConstruction-PT-00050-CTLFireability-00
lola: time limit : 3385 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for HouseConstruction-PT-00050-CTLFireability-00
lola: result : false
lola: markings : 1209786
lola: fired transitions : 3069848
lola: time used : 3.000000
lola: memory pages used : 5
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00050-CTLFireability-00: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-01: CTL unknown AGGR
HouseConstruction-PT-00050-CTLFireability-02: EFAG true tscc_search
HouseConstruction-PT-00050-CTLFireability-03: EG false state space / EG
HouseConstruction-PT-00050-CTLFireability-04: CTL unknown AGGR
HouseConstruction-PT-00050-CTLFireability-05: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-06: CTL unknown AGGR
HouseConstruction-PT-00050-CTLFireability-07: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-08: CTL unknown AGGR
HouseConstruction-PT-00050-CTLFireability-09: DISJ true search / frozen tokens
HouseConstruction-PT-00050-CTLFireability-10: AFAG true CTL model checker
HouseConstruction-PT-00050-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00050-CTLFireability-12: CTL unknown AGGR
HouseConstruction-PT-00050-CTLFireability-13: CTL true CTL model checker
HouseConstruction-PT-00050-CTLFireability-14: CTL unknown AGGR
HouseConstruction-PT-00050-CTLFireability-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-00050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HouseConstruction-PT-00050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346100546"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-00050.tgz
mv HouseConstruction-PT-00050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;