Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346100538.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HouseConstruction-PT-00020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346100538
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 6.4K Feb 25 13:06 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 13:06 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 13:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 13:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 13:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Feb 25 13:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Feb 25 13:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 25 13:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-00
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-01
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-02
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-03
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-04
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-05
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-06
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-07
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-08
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-09
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-10
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-11
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-12
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-13
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-14
FORMULA_NAME HouseConstruction-PT-00020-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678561758887

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HouseConstruction-PT-00020
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 19:09:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 19:09:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 19:09:22] [INFO ] Load time of PNML (sax parser for PT used): 48 ms
[2023-03-11 19:09:22] [INFO ] Transformed 26 places.
[2023-03-11 19:09:22] [INFO ] Transformed 18 transitions.
[2023-03-11 19:09:22] [INFO ] Parsed PT model containing 26 places and 18 transitions and 51 arcs in 212 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Support contains 26 out of 26 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 21 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 26 cols
[2023-03-11 19:09:23] [INFO ] Computed 8 place invariants in 10 ms
[2023-03-11 19:09:23] [INFO ] Implicit Places using invariants in 257 ms returned []
[2023-03-11 19:09:23] [INFO ] Invariant cache hit.
[2023-03-11 19:09:23] [INFO ] Implicit Places using invariants and state equation in 103 ms returned []
Implicit Place search using SMT with State Equation took 417 ms to find 0 implicit places.
[2023-03-11 19:09:23] [INFO ] Invariant cache hit.
[2023-03-11 19:09:23] [INFO ] Dead Transitions using invariants and state equation in 66 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 506 ms. Remains : 26/26 places, 18/18 transitions.
Support contains 26 out of 26 places after structural reductions.
[2023-03-11 19:09:23] [INFO ] Flatten gal took : 37 ms
[2023-03-11 19:09:23] [INFO ] Flatten gal took : 13 ms
[2023-03-11 19:09:23] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10001 steps, including 26 resets, run finished after 243 ms. (steps per millisecond=41 ) properties (out of 39) seen :33
Finished Best-First random walk after 624 steps, including 0 resets, run visited all 6 properties in 10 ms. (steps per millisecond=62 )
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 5 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 6 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 26 stabilizing places and 18 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 26 transition count 18
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA HouseConstruction-PT-00020-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 15 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.1 ms
Discarding 11 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 15 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 14 transition count 10
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 3 place count 14 transition count 9
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 7 place count 11 transition count 9
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 7 place count 11 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 9 place count 10 transition count 8
Applied a total of 9 rules in 21 ms. Remains 10 /26 variables (removed 16) and now considering 8/18 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 10/26 places, 8/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 18 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.0 ms
Discarding 8 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Ensure Unique test removed 1 places
Reduce places removed 2 places and 1 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 4 place count 16 transition count 9
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 7 place count 13 transition count 9
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 7 place count 13 transition count 7
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 13 place count 9 transition count 7
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 13 place count 9 transition count 5
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 5 rules applied. Total rules applied 18 place count 6 transition count 5
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 19 place count 6 transition count 4
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 20 place count 5 transition count 4
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 21 place count 4 transition count 3
Applied a total of 21 rules in 10 ms. Remains 4 /26 variables (removed 22) and now considering 3/18 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 4/26 places, 3/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 25 transition count 15
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 23 transition count 15
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 4 place count 23 transition count 13
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 8 place count 21 transition count 13
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 9 place count 20 transition count 12
Applied a total of 9 rules in 6 ms. Remains 20 /26 variables (removed 6) and now considering 12/18 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 20/26 places, 12/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 0 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 13 are kept as prefixes of interest. Removing 13 places using SCC suffix rule.0 ms
Discarding 13 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 13 transition count 9
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 12 transition count 8
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 5 place count 11 transition count 8
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 5 place count 11 transition count 6
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 11 place count 7 transition count 6
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 11 place count 7 transition count 4
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 5 rules applied. Total rules applied 16 place count 4 transition count 4
Applied a total of 16 rules in 3 ms. Remains 4 /26 variables (removed 22) and now considering 4/18 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 4/26 places, 4/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 0 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 12 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.1 ms
Discarding 14 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 3 place count 11 transition count 7
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 9 transition count 7
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 5 place count 9 transition count 6
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 7 place count 8 transition count 6
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 8 place count 7 transition count 5
Applied a total of 8 rules in 4 ms. Remains 7 /26 variables (removed 19) and now considering 5/18 (removed 13) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 7/26 places, 5/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 1 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 0 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 2 ms
[2023-03-11 19:09:24] [INFO ] Input system was already deterministic with 18 transitions.
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:09:24] [INFO ] Flatten gal took : 3 ms
[2023-03-11 19:09:24] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-11 19:09:24] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 26 places, 18 transitions and 51 arcs took 1 ms.
Total runtime 1938 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HouseConstruction-PT-00020
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
CTLFireability

FORMULA HouseConstruction-PT-00020-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00020-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00020-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00020-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00020-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00020-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00020-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678562146523

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 8 (type EXCL) for 7 HouseConstruction-PT-00020-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type FNDP) for 0 HouseConstruction-PT-00020-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type EQUN) for 0 HouseConstruction-PT-00020-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SRCH) for 0 HouseConstruction-PT-00020-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SRCH) for HouseConstruction-PT-00020-CTLFireability-00
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 50 (type FNDP) for HouseConstruction-PT-00020-CTLFireability-00
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: CANCELED task # 51 (type EQUN) for HouseConstruction-PT-00020-CTLFireability-00 (obsolete)
lola: FINISHED task # 51 (type EQUN) for HouseConstruction-PT-00020-CTLFireability-00
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00020-CTLFireability-00: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00020-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-03: AFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 4/257 6/32 HouseConstruction-PT-00020-CTLFireability-01 1268551 m, 253710 m/sec, 5198259 t fired, .

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HouseConstruction-PT-00020-CTLFireability-00: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00020-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-03: AFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 9/257 11/32 HouseConstruction-PT-00020-CTLFireability-01 2549262 m, 256142 m/sec, 10644636 t fired, .

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HouseConstruction-PT-00020-CTLFireability-00: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00020-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-03: AFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 14/257 16/32 HouseConstruction-PT-00020-CTLFireability-01 3787458 m, 247639 m/sec, 16075160 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00020-CTLFireability-00: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00020-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-03: AFAG 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00020-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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23 CTL EXCL 20/3299 10/32 HouseConstruction-PT-00020-CTLFireability-06 2269243 m, 74466 m/sec, 26187572 t fired, .

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HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
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23 CTL EXCL 25/3299 12/32 HouseConstruction-PT-00020-CTLFireability-06 2853269 m, 116805 m/sec, 33289549 t fired, .

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23 CTL EXCL 40/3299 18/32 HouseConstruction-PT-00020-CTLFireability-06 4253135 m, 89601 m/sec, 53030120 t fired, .

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HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
HouseConstruction-PT-00020-CTLFireability-10: CTL false CTL model checker
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23 CTL EXCL 50/3299 22/32 HouseConstruction-PT-00020-CTLFireability-06 5454385 m, 121129 m/sec, 66974569 t fired, .

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23 CTL EXCL 55/3299 24/32 HouseConstruction-PT-00020-CTLFireability-06 5889643 m, 87051 m/sec, 73594696 t fired, .

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HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
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23 CTL EXCL 60/3299 26/32 HouseConstruction-PT-00020-CTLFireability-06 6435338 m, 109139 m/sec, 79965263 t fired, .

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HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
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23 CTL EXCL 65/3299 28/32 HouseConstruction-PT-00020-CTLFireability-06 6853018 m, 83536 m/sec, 86883819 t fired, .

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HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
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23 CTL EXCL 70/3299 30/32 HouseConstruction-PT-00020-CTLFireability-06 7368057 m, 103007 m/sec, 93714560 t fired, .

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HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
HouseConstruction-PT-00020-CTLFireability-10: CTL false CTL model checker
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23 CTL EXCL 75/3299 32/32 HouseConstruction-PT-00020-CTLFireability-06 7938554 m, 114099 m/sec, 100459778 t fired, .

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HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00020-CTLFireability-00: CONJ false findpath
HouseConstruction-PT-00020-CTLFireability-01: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-02: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-03: AFAG false CTL model checker
HouseConstruction-PT-00020-CTLFireability-04: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-05: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-06: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-07: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-08: CTL true CTL model checker
HouseConstruction-PT-00020-CTLFireability-09: CTL false CTL model checker
HouseConstruction-PT-00020-CTLFireability-10: CTL false CTL model checker
HouseConstruction-PT-00020-CTLFireability-11: CTL unknown AGGR
HouseConstruction-PT-00020-CTLFireability-12: CTL false CTL model checker
HouseConstruction-PT-00020-CTLFireability-13: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-00020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HouseConstruction-PT-00020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346100538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-00020.tgz
mv HouseConstruction-PT-00020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;