Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346100522.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HouseConstruction-PT-00005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346100522
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 4.9K Feb 25 13:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K Feb 25 13:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 13:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 25 13:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 13:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 137K Feb 25 13:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 13:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K Feb 25 13:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-00
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-01
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-02
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-03
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-04
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-05
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-06
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-07
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-08
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-09
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-10
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-11
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-12
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-13
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-14
FORMULA_NAME HouseConstruction-PT-00005-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678557946531

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HouseConstruction-PT-00005
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 18:05:50] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 18:05:50] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 18:05:50] [INFO ] Load time of PNML (sax parser for PT used): 51 ms
[2023-03-11 18:05:50] [INFO ] Transformed 26 places.
[2023-03-11 18:05:50] [INFO ] Transformed 18 transitions.
[2023-03-11 18:05:50] [INFO ] Parsed PT model containing 26 places and 18 transitions and 51 arcs in 208 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
Support contains 26 out of 26 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 20 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 26 cols
[2023-03-11 18:05:50] [INFO ] Computed 8 place invariants in 9 ms
[2023-03-11 18:05:50] [INFO ] Implicit Places using invariants in 252 ms returned []
[2023-03-11 18:05:50] [INFO ] Invariant cache hit.
[2023-03-11 18:05:50] [INFO ] Implicit Places using invariants and state equation in 91 ms returned []
Implicit Place search using SMT with State Equation took 407 ms to find 0 implicit places.
[2023-03-11 18:05:50] [INFO ] Invariant cache hit.
[2023-03-11 18:05:50] [INFO ] Dead Transitions using invariants and state equation in 82 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 513 ms. Remains : 26/26 places, 18/18 transitions.
Support contains 26 out of 26 places after structural reductions.
[2023-03-11 18:05:51] [INFO ] Flatten gal took : 36 ms
[2023-03-11 18:05:51] [INFO ] Flatten gal took : 12 ms
[2023-03-11 18:05:51] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10003 steps, including 91 resets, run finished after 470 ms. (steps per millisecond=21 ) properties (out of 38) seen :32
Finished Best-First random walk after 2034 steps, including 4 resets, run visited all 6 properties in 32 ms. (steps per millisecond=63 )
[2023-03-11 18:05:51] [INFO ] Flatten gal took : 6 ms
[2023-03-11 18:05:51] [INFO ] Flatten gal took : 7 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 26 stabilizing places and 18 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 26 transition count 18
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA HouseConstruction-PT-00005-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA HouseConstruction-PT-00005-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 15 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.2 ms
Discarding 11 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 3 Pre rules applied. Total rules applied 1 place count 14 transition count 7
Deduced a syphon composed of 3 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 9 place count 9 transition count 7
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 9 place count 9 transition count 6
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 11 place count 8 transition count 6
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 6 transition count 5
Applied a total of 14 rules in 14 ms. Remains 6 /26 variables (removed 20) and now considering 5/18 (removed 13) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 6/26 places, 5/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 3 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 7 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 17 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.0 ms
Discarding 9 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 16 transition count 11
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 15 transition count 11
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 3 place count 15 transition count 8
Deduced a syphon composed of 3 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 11 place count 10 transition count 8
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 13 place count 9 transition count 7
Applied a total of 13 rules in 6 ms. Remains 9 /26 variables (removed 17) and now considering 7/18 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 9/26 places, 7/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 12 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 9 output transitions
Drop transitions removed 9 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 11 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 10 transition count 7
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 3 place count 10 transition count 6
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 7 place count 7 transition count 6
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 7 place count 7 transition count 4
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 5 rules applied. Total rules applied 12 place count 4 transition count 4
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 12 place count 4 transition count 3
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 14 place count 3 transition count 3
Applied a total of 14 rules in 5 ms. Remains 3 /26 variables (removed 23) and now considering 3/18 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 3/26 places, 3/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 0 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 12 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 9 output transitions
Drop transitions removed 9 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 11 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 10 transition count 7
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 4 place count 9 transition count 6
Applied a total of 4 rules in 14 ms. Remains 9 /26 variables (removed 17) and now considering 6/18 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 9/26 places, 6/18 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:05:52] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:05:52] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:05:52] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-11 18:05:52] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 26 places, 18 transitions and 51 arcs took 0 ms.
Total runtime 2283 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HouseConstruction-PT-00005
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA HouseConstruction-PT-00005-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00005-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678557971581

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 7 (type EXCL) for 6 HouseConstruction-PT-00005-CTLFireability-02
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-02
lola: result : true
lola: markings : 120
lola: fired transitions : 329
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 13 (type EXCL) for 12 HouseConstruction-PT-00005-CTLFireability-05
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 50 (type FNDP) for 21 HouseConstruction-PT-00005-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type EQUN) for 21 HouseConstruction-PT-00005-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 53 (type SRCH) for 21 HouseConstruction-PT-00005-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SRCH) for HouseConstruction-PT-00005-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 50 (type FNDP) for HouseConstruction-PT-00005-CTLFireability-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: CANCELED task # 51 (type EQUN) for HouseConstruction-PT-00005-CTLFireability-08 (obsolete)
sara: try reading problem file /home/mcc/execution/373/CTLFireability-51.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 51 (type EQUN) for HouseConstruction-PT-00005-CTLFireability-08
lola: result : true
lola: FINISHED task # 13 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-05
lola: result : false
lola: markings : 33530
lola: fired transitions : 86772
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 HouseConstruction-PT-00005-CTLFireability-14
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-14
lola: result : true
lola: markings : 350354
lola: fired transitions : 1475209
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 39 (type EXCL) for 38 HouseConstruction-PT-00005-CTLFireability-11
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-11
lola: result : false
lola: markings : 156
lola: fired transitions : 198
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 HouseConstruction-PT-00005-CTLFireability-09
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-09
lola: result : true
lola: markings : 81432
lola: fired transitions : 468766
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 HouseConstruction-PT-00005-CTLFireability-06
lola: time limit : 399 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00005-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-05: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-09: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00005-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-08: CONJ 0 1 0 0 6 0 0 2
HouseConstruction-PT-00005-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 3/399 3/32 HouseConstruction-PT-00005-CTLFireability-06 579180 m, 115836 m/sec, 2366523 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 14
lola: FINISHED task # 16 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-06
lola: result : true
lola: markings : 604328
lola: fired transitions : 2972323
lola: time used : 4.000000
lola: memory pages used : 3
lola: LAUNCH task # 10 (type EXCL) for 9 HouseConstruction-PT-00005-CTLFireability-04
lola: time limit : 449 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00005-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-05: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-09: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00005-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-08: CONJ 0 1 0 0 6 0 0 2
HouseConstruction-PT-00005-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 4/449 4/32 HouseConstruction-PT-00005-CTLFireability-04 886054 m, 177210 m/sec, 4989190 t fired, .

Time elapsed: 10 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00005-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-05: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-09: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HouseConstruction-PT-00005-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-08: CONJ 0 1 0 0 6 0 0 2
HouseConstruction-PT-00005-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00005-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 9/449 5/32 HouseConstruction-PT-00005-CTLFireability-04 1174900 m, 57769 m/sec, 11790924 t fired, .

Time elapsed: 15 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 14
lola: FINISHED task # 10 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-04
lola: result : true
lola: markings : 1187984
lola: fired transitions : 15967309
lola: time used : 12.000000
lola: memory pages used : 5
lola: LAUNCH task # 4 (type EXCL) for 3 HouseConstruction-PT-00005-CTLFireability-01
lola: time limit : 511 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-01
lola: result : true
lola: markings : 90
lola: fired transitions : 204
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 HouseConstruction-PT-00005-CTLFireability-08
lola: time limit : 597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-08
lola: result : true
lola: markings : 26
lola: fired transitions : 51
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 HouseConstruction-PT-00005-CTLFireability-00
lola: time limit : 716 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-00
lola: result : true
lola: markings : 1351
lola: fired transitions : 4207
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 HouseConstruction-PT-00005-CTLFireability-10
lola: time limit : 895 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-10
lola: result : true
lola: markings : 21
lola: fired transitions : 61
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 HouseConstruction-PT-00005-CTLFireability-15
lola: time limit : 1194 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-15
lola: result : true
lola: markings : 804
lola: fired transitions : 2000
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 HouseConstruction-PT-00005-CTLFireability-12
lola: time limit : 1791 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-12
lola: result : true
lola: markings : 379
lola: fired transitions : 1518
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 HouseConstruction-PT-00005-CTLFireability-07
lola: time limit : 3582 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for HouseConstruction-PT-00005-CTLFireability-07
lola: result : true
lola: markings : 142
lola: fired transitions : 319
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00005-CTLFireability-00: AGEF true tscc_search
HouseConstruction-PT-00005-CTLFireability-01: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-04: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-05: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-07: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-08: CONJ true CONJ
HouseConstruction-PT-00005-CTLFireability-09: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-10: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00005-CTLFireability-12: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-14: CTL true CTL model checker
HouseConstruction-PT-00005-CTLFireability-15: CTL true CTL model checker


Time elapsed: 18 secs. Pages in use: 5

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-00005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HouseConstruction-PT-00005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346100522"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-00005.tgz
mv HouseConstruction-PT-00005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;