Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346100514.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HouseConstruction-PT-00002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346100514
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 6.5K Feb 25 13:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 25 13:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 13:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 25 13:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.7K Feb 25 13:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 25 13:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.4K Feb 25 13:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 87K Feb 25 13:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-00
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-01
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-02
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-03
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-04
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-05
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-06
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-07
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-08
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-09
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-10
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-11
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-12
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-13
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-14
FORMULA_NAME HouseConstruction-PT-00002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678557763480

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HouseConstruction-PT-00002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 18:02:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 18:02:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 18:02:47] [INFO ] Load time of PNML (sax parser for PT used): 49 ms
[2023-03-11 18:02:47] [INFO ] Transformed 26 places.
[2023-03-11 18:02:47] [INFO ] Transformed 18 transitions.
[2023-03-11 18:02:47] [INFO ] Parsed PT model containing 26 places and 18 transitions and 51 arcs in 191 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Initial state reduction rules removed 2 formulas.
FORMULA HouseConstruction-PT-00002-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA HouseConstruction-PT-00002-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 26 out of 26 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 22 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 26 cols
[2023-03-11 18:02:47] [INFO ] Computed 8 place invariants in 9 ms
[2023-03-11 18:02:47] [INFO ] Implicit Places using invariants in 239 ms returned []
[2023-03-11 18:02:47] [INFO ] Invariant cache hit.
[2023-03-11 18:02:47] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 384 ms to find 0 implicit places.
[2023-03-11 18:02:47] [INFO ] Invariant cache hit.
[2023-03-11 18:02:47] [INFO ] Dead Transitions using invariants and state equation in 79 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 489 ms. Remains : 26/26 places, 18/18 transitions.
Support contains 26 out of 26 places after structural reductions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 31 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 12 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Finished random walk after 1050 steps, including 19 resets, run visited all 32 properties in 68 ms. (steps per millisecond=15 )
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 7 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 8 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 26 stabilizing places and 18 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 26 transition count 18
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA HouseConstruction-PT-00002-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA HouseConstruction-PT-00002-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 17
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 24 transition count 16
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 4 place count 23 transition count 16
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 4 place count 23 transition count 15
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 6 place count 22 transition count 15
Applied a total of 6 rules in 17 ms. Remains 22 /26 variables (removed 4) and now considering 15/18 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 22/26 places, 15/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 5 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 17
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 24 transition count 17
Applied a total of 2 rules in 6 ms. Remains 24 /26 variables (removed 2) and now considering 17/18 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 24/26 places, 17/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 17 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 4 are kept as prefixes of interest. Removing 22 places using SCC suffix rule.1 ms
Discarding 22 places :
Also discarding 14 output transitions
Drop transitions removed 14 transitions
Reduce places removed 1 places and 1 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 1 place count 3 transition count 2
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 3 place count 2 transition count 2
Applied a total of 3 rules in 8 ms. Remains 2 /26 variables (removed 24) and now considering 2/18 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 2/26 places, 2/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 0 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 13 are kept as prefixes of interest. Removing 13 places using SCC suffix rule.0 ms
Discarding 13 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 4 ms. Remains 12 /26 variables (removed 14) and now considering 9/18 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 12/26 places, 9/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 2 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 3 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 7 are kept as prefixes of interest. Removing 19 places using SCC suffix rule.0 ms
Discarding 19 places :
Also discarding 12 output transitions
Drop transitions removed 12 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 6 transition count 4
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 5 transition count 4
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 4 place count 4 transition count 3
Applied a total of 4 rules in 10 ms. Remains 4 /26 variables (removed 22) and now considering 3/18 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 4/26 places, 3/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 0 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 4 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=2 )
FORMULA HouseConstruction-PT-00002-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 17 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.0 ms
Discarding 9 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 1 place count 17 transition count 12
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 3 place count 16 transition count 12
Applied a total of 3 rules in 5 ms. Remains 16 /26 variables (removed 10) and now considering 12/18 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 16/26 places, 12/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 2 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 6 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.0 ms
Discarding 20 places :
Also discarding 12 output transitions
Drop transitions removed 12 transitions
Applied a total of 1 rules in 2 ms. Remains 6 /26 variables (removed 20) and now considering 6/18 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 6/26 places, 6/18 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 1 ms
[2023-03-11 18:02:48] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:02:48] [INFO ] Flatten gal took : 4 ms
[2023-03-11 18:02:48] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-11 18:02:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 26 places, 18 transitions and 51 arcs took 1 ms.
Total runtime 1739 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HouseConstruction-PT-00002
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA HouseConstruction-PT-00002-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00002-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678557770029

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 4 (type EXCL) for 3 HouseConstruction-PT-00002-CTLFireability-01
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 4 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-01
lola: result : false
lola: markings : 1004
lola: fired transitions : 4861
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 HouseConstruction-PT-00002-CTLFireability-11
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 25 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-11
lola: result : false
lola: markings : 1237
lola: fired transitions : 6347
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 HouseConstruction-PT-00002-CTLFireability-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-10
lola: result : false
lola: markings : 260
lola: fired transitions : 670
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 HouseConstruction-PT-00002-CTLFireability-08
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-08
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 HouseConstruction-PT-00002-CTLFireability-04
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-04
lola: result : false
lola: markings : 36
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 9 HouseConstruction-PT-00002-CTLFireability-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-03
lola: result : false
lola: markings : 9
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 HouseConstruction-PT-00002-CTLFireability-15
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-15
lola: result : false
lola: markings : 10
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 HouseConstruction-PT-00002-CTLFireability-05
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-05
lola: result : false
lola: markings : 42
lola: fired transitions : 140
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 HouseConstruction-PT-00002-CTLFireability-02
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-02
lola: result : true
lola: markings : 35
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 HouseConstruction-PT-00002-CTLFireability-00
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-00
lola: result : true
lola: markings : 48
lola: fired transitions : 143
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 HouseConstruction-PT-00002-CTLFireability-14
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for HouseConstruction-PT-00002-CTLFireability-14
lola: result : false
lola: markings : 515
lola: fired transitions : 3306
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00002-CTLFireability-00: CTL true CTL model checker
HouseConstruction-PT-00002-CTLFireability-01: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00002-CTLFireability-03: AGAF true state space /EFEG
HouseConstruction-PT-00002-CTLFireability-04: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-05: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-08: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-10: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-11: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-14: CTL false CTL model checker
HouseConstruction-PT-00002-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-00002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HouseConstruction-PT-00002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346100514"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-00002.tgz
mv HouseConstruction-PT-00002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;