About the Execution of LoLa+red for HirschbergSinclair-PT-45
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 941.684 | 50771.00 | 147756.00 | 262.10 | TTFTTTTTTFFFTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346000495.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HirschbergSinclair-PT-45, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346000495
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 9.2K Feb 26 02:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 26 02:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 26 02:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 02:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 02:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Feb 26 02:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 02:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 02:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 616K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-00
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-01
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-02
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-03
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-04
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-05
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-06
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-07
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-08
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-09
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-10
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-11
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-12
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-13
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-14
FORMULA_NAME HirschbergSinclair-PT-45-ReachabilityFireability-15
=== Now, execution of the tool begins
BK_START 1678556117835
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-45
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 17:35:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 17:35:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 17:35:20] [INFO ] Load time of PNML (sax parser for PT used): 178 ms
[2023-03-11 17:35:20] [INFO ] Transformed 1138 places.
[2023-03-11 17:35:20] [INFO ] Transformed 1042 transitions.
[2023-03-11 17:35:20] [INFO ] Parsed PT model containing 1138 places and 1042 transitions and 3176 arcs in 303 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 13 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 9 resets, run finished after 662 ms. (steps per millisecond=15 ) properties (out of 16) seen :12
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 1042 rows 1138 cols
[2023-03-11 17:35:21] [INFO ] Computed 96 place invariants in 53 ms
[2023-03-11 17:35:22] [INFO ] [Real]Absence check using 90 positive place invariants in 123 ms returned sat
[2023-03-11 17:35:22] [INFO ] [Real]Absence check using 90 positive and 6 generalized place invariants in 9 ms returned sat
[2023-03-11 17:35:22] [INFO ] After 802ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:3
[2023-03-11 17:35:23] [INFO ] [Nat]Absence check using 90 positive place invariants in 102 ms returned sat
[2023-03-11 17:35:23] [INFO ] [Nat]Absence check using 90 positive and 6 generalized place invariants in 8 ms returned sat
[2023-03-11 17:35:25] [INFO ] After 1708ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :2
[2023-03-11 17:35:26] [INFO ] Deduced a trap composed of 34 places in 766 ms of which 10 ms to minimize.
[2023-03-11 17:35:26] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1107 ms
[2023-03-11 17:35:27] [INFO ] After 3751ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :2
Attempting to minimize the solution found.
Minimization took 1289 ms.
[2023-03-11 17:35:28] [INFO ] After 5618ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :2
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 4 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 90 ms.
Support contains 27 out of 1138 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1138/1138 places, 1042/1042 transitions.
Graph (complete) has 2184 edges and 1138 vertex of which 1092 are kept as prefixes of interest. Removing 46 places using SCC suffix rule.7 ms
Discarding 46 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 358 transitions
Trivial Post-agglo rules discarded 358 transitions
Performed 358 trivial Post agglomeration. Transition count delta: 358
Iterating post reduction 0 with 359 rules applied. Total rules applied 360 place count 1092 transition count 683
Reduce places removed 358 places and 0 transitions.
Graph (complete) has 1260 edges and 734 vertex of which 634 are kept as prefixes of interest. Removing 100 places using SCC suffix rule.2 ms
Discarding 100 places :
Also discarding 0 output transitions
Iterating post reduction 1 with 359 rules applied. Total rules applied 719 place count 634 transition count 683
Drop transitions removed 100 transitions
Reduce isomorphic transitions removed 100 transitions.
Iterating post reduction 2 with 100 rules applied. Total rules applied 819 place count 634 transition count 583
Discarding 15 places :
Symmetric choice reduction at 3 with 15 rule applications. Total rules 834 place count 619 transition count 568
Iterating global reduction 3 with 15 rules applied. Total rules applied 849 place count 619 transition count 568
Discarding 12 places :
Symmetric choice reduction at 3 with 12 rule applications. Total rules 861 place count 607 transition count 556
Iterating global reduction 3 with 12 rules applied. Total rules applied 873 place count 607 transition count 556
Free-agglomeration rule (complex) applied 39 times.
Iterating global reduction 3 with 39 rules applied. Total rules applied 912 place count 607 transition count 517
Reduce places removed 39 places and 0 transitions.
Iterating post reduction 3 with 39 rules applied. Total rules applied 951 place count 568 transition count 517
Reduce places removed 35 places and 35 transitions.
Iterating global reduction 4 with 35 rules applied. Total rules applied 986 place count 533 transition count 482
Applied a total of 986 rules in 432 ms. Remains 533 /1138 variables (removed 605) and now considering 482/1042 (removed 560) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 433 ms. Remains : 533/1138 places, 482/1042 transitions.
Incomplete random walk after 10000 steps, including 19 resets, run finished after 211 ms. (steps per millisecond=47 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 2) seen :1
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-03 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 482 rows 533 cols
[2023-03-11 17:35:29] [INFO ] Computed 51 place invariants in 15 ms
[2023-03-11 17:35:29] [INFO ] [Real]Absence check using 1 positive place invariants in 3 ms returned sat
[2023-03-11 17:35:29] [INFO ] [Real]Absence check using 1 positive and 50 generalized place invariants in 143 ms returned sat
[2023-03-11 17:35:29] [INFO ] After 613ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 17:35:30] [INFO ] [Nat]Absence check using 1 positive place invariants in 3 ms returned sat
[2023-03-11 17:35:30] [INFO ] [Nat]Absence check using 1 positive and 50 generalized place invariants in 179 ms returned sat
[2023-03-11 17:35:30] [INFO ] After 388ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 17:35:30] [INFO ] State equation strengthened by 9 read => feed constraints.
[2023-03-11 17:35:30] [INFO ] After 51ms SMT Verify possible using 9 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 17:35:30] [INFO ] After 129ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 41 ms.
[2023-03-11 17:35:30] [INFO ] After 875ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 3 out of 533 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 533/533 places, 482/482 transitions.
Graph (complete) has 995 edges and 533 vertex of which 527 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.2 ms
Discarding 6 places :
Also discarding 0 output transitions
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Drop transitions removed 87 transitions
Trivial Post-agglo rules discarded 87 transitions
Performed 87 trivial Post agglomeration. Transition count delta: 87
Iterating post reduction 0 with 93 rules applied. Total rules applied 94 place count 527 transition count 389
Reduce places removed 117 places and 0 transitions.
Graph (complete) has 560 edges and 410 vertex of which 397 are kept as prefixes of interest. Removing 13 places using SCC suffix rule.1 ms
Discarding 13 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Drop transitions removed 168 transitions
Trivial Post-agglo rules discarded 168 transitions
Performed 168 trivial Post agglomeration. Transition count delta: 168
Iterating post reduction 1 with 286 rules applied. Total rules applied 380 place count 397 transition count 218
Reduce places removed 168 places and 0 transitions.
Drop transitions removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 2 with 178 rules applied. Total rules applied 558 place count 229 transition count 208
Performed 44 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 44 Pre rules applied. Total rules applied 558 place count 229 transition count 164
Deduced a syphon composed of 44 places in 3 ms
Reduce places removed 44 places and 0 transitions.
Iterating global reduction 3 with 88 rules applied. Total rules applied 646 place count 185 transition count 164
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 647 place count 184 transition count 163
Iterating global reduction 3 with 1 rules applied. Total rules applied 648 place count 184 transition count 163
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 3 with 1 rules applied. Total rules applied 649 place count 184 transition count 162
Reduce places removed 1 places and 0 transitions.
Graph (complete) has 327 edges and 183 vertex of which 182 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.0 ms
Discarding 1 places :
Also discarding 0 output transitions
Iterating post reduction 4 with 2 rules applied. Total rules applied 651 place count 182 transition count 162
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 652 place count 182 transition count 161
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 654 place count 181 transition count 160
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 6 with 3 rules applied. Total rules applied 657 place count 179 transition count 159
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Graph (complete) has 308 edges and 179 vertex of which 178 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 6 with 4 rules applied. Total rules applied 661 place count 178 transition count 156
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 663 place count 176 transition count 156
Performed 10 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 8 with 10 Pre rules applied. Total rules applied 663 place count 176 transition count 146
Deduced a syphon composed of 10 places in 1 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 8 with 20 rules applied. Total rules applied 683 place count 166 transition count 146
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 8 with 1 rules applied. Total rules applied 684 place count 165 transition count 146
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 9 with 1 Pre rules applied. Total rules applied 684 place count 165 transition count 145
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 9 with 2 rules applied. Total rules applied 686 place count 164 transition count 145
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 9 with 4 rules applied. Total rules applied 690 place count 162 transition count 143
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 9 with 3 rules applied. Total rules applied 693 place count 162 transition count 140
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 9 with 3 rules applied. Total rules applied 696 place count 159 transition count 140
Reduce places removed 8 places and 8 transitions.
Iterating global reduction 10 with 8 rules applied. Total rules applied 704 place count 151 transition count 132
Reduce places removed 4 places and 0 transitions.
Drop transitions removed 23 transitions
Trivial Post-agglo rules discarded 23 transitions
Performed 23 trivial Post agglomeration. Transition count delta: 23
Iterating post reduction 10 with 27 rules applied. Total rules applied 731 place count 147 transition count 109
Reduce places removed 23 places and 0 transitions.
Iterating post reduction 11 with 23 rules applied. Total rules applied 754 place count 124 transition count 109
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 12 with 6 Pre rules applied. Total rules applied 754 place count 124 transition count 103
Renaming transitions due to excessive name length > 1024 char.
Deduced a syphon composed of 6 places in 2 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 12 with 12 rules applied. Total rules applied 766 place count 118 transition count 103
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 12 with 2 rules applied. Total rules applied 768 place count 117 transition count 102
Applied a total of 768 rules in 137 ms. Remains 117 /533 variables (removed 416) and now considering 102/482 (removed 380) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 137 ms. Remains : 117/533 places, 102/482 transitions.
Incomplete random walk after 10000 steps, including 96 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 37 resets, run finished after 9 ms. (steps per millisecond=1111 ) properties (out of 1) seen :0
Finished probabilistic random walk after 405 steps, run visited all 1 properties in 16 ms. (steps per millisecond=25 )
Probabilistic random walk after 405 steps, saw 303 distinct states, run finished after 16 ms. (steps per millisecond=25 ) properties seen :1
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-08 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
All properties solved without resorting to model-checking.
Total runtime 10647 ms.
starting LoLA
BK_INPUT HirschbergSinclair-PT-45
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-45-ReachabilityFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678556168606
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type EXCL) for 6 HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 6 HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 6 HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SRCH) for 6 HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 59 (type EXCL) for HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-02 (obsolete)
lola: CANCELED task # 50 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-02 (obsolete)
lola: CANCELED task # 58 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-02 (obsolete)
lola: LAUNCH task # 72 (type EXCL) for 33 HirschbergSinclair-PT-45-ReachabilityFireability-11
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 57 (type FNDP) for 9 HirschbergSinclair-PT-45-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 9 HirschbergSinclair-PT-45-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SRCH) for 9 HirschbergSinclair-PT-45-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-50.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 49 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 57 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-03
lola: result : true
lola: fired transitions : 222
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 63 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-03
lola: result : true
lola: markings : 224
lola: fired transitions : 223
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 61 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-03 (obsolete)
lola: LAUNCH task # 51 (type FNDP) for 12 HirschbergSinclair-PT-45-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 12 HirschbergSinclair-PT-45-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SRCH) for 12 HirschbergSinclair-PT-45-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-04
lola: result : true
lola: markings : 208
lola: fired transitions : 207
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 51 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-04 (obsolete)
lola: CANCELED task # 52 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-04 (obsolete)
lola: LAUNCH task # 68 (type FNDP) for 33 HirschbergSinclair-PT-45-ReachabilityFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type EQUN) for 33 HirschbergSinclair-PT-45-ReachabilityFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH) for 33 HirschbergSinclair-PT-45-ReachabilityFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-02
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 72 (type EXCL) for HirschbergSinclair-PT-45-ReachabilityFireability-11
lola: result : true
lola: markings : 390
lola: fired transitions : 389
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 68 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-11 (obsolete)
lola: CANCELED task # 69 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-11 (obsolete)
lola: CANCELED task # 71 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-11 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 92 (type EXCL) for 27 HirschbergSinclair-PT-45-ReachabilityFireability-09
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 80 (type FNDP) for 18 HirschbergSinclair-PT-45-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 18 HirschbergSinclair-PT-45-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SRCH) for 18 HirschbergSinclair-PT-45-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 68 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-11
lola: result : true
lola: fired transitions : 355
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 51 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-04
lola: result : true
lola: fired transitions : 206
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-61.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-52.sara.
lola: FINISHED task # 80 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-06
lola: result : true
lola: fired transitions : 17
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 81 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-06 (obsolete)
lola: CANCELED task # 84 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-06 (obsolete)
lola: LAUNCH task # 101 (type FNDP) for 42 HirschbergSinclair-PT-45-ReachabilityFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type EQUN) for 42 HirschbergSinclair-PT-45-ReachabilityFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 104 (type SRCH) for 42 HirschbergSinclair-PT-45-ReachabilityFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 104 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 101 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-14 (obsolete)
lola: CANCELED task # 102 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-14 (obsolete)
lola: LAUNCH task # 95 (type FNDP) for 36 HirschbergSinclair-PT-45-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type EQUN) for 36 HirschbergSinclair-PT-45-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SRCH) for 36 HirschbergSinclair-PT-45-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 101 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-69.sara.
lola: FINISHED task # 95 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 96 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-12 (obsolete)
lola: CANCELED task # 98 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-12 (obsolete)
lola: LAUNCH task # 108 (type FNDP) for 21 HirschbergSinclair-PT-45-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type EQUN) for 21 HirschbergSinclair-PT-45-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SRCH) for 21 HirschbergSinclair-PT-45-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-12
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-102.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-81.sara.
lola: FINISHED task # 92 (type EXCL) for HirschbergSinclair-PT-45-ReachabilityFireability-09
lola: result : true
lola: markings : 275
lola: fired transitions : 274
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 30 HirschbergSinclair-PT-45-ReachabilityFireability-10
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 102 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-14
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 79 (type EXCL) for HirschbergSinclair-PT-45-ReachabilityFireability-10
lola: result : true
lola: markings : 215
lola: fired transitions : 214
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 131 (type EXCL) for 3 HirschbergSinclair-PT-45-ReachabilityFireability-01
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 131 (type EXCL) for HirschbergSinclair-PT-45-ReachabilityFireability-01
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 144 (type EXCL) for 0 HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: time limit : 598 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 111 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-07
lola: result : false
lola: markings : 22190
lola: fired transitions : 49263
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 108 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-07 (obsolete)
lola: CANCELED task # 109 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-07 (obsolete)
lola: LAUNCH task # 121 (type FNDP) for 39 HirschbergSinclair-PT-45-ReachabilityFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type EQUN) for 39 HirschbergSinclair-PT-45-ReachabilityFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SRCH) for 39 HirschbergSinclair-PT-45-ReachabilityFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-07
lola: result : unknown
lola: fired transitions : 82553
lola: tried executions : 2212
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 124 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-13
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 121 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-13 (obsolete)
lola: CANCELED task # 122 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-13 (obsolete)
lola: LAUNCH task # 146 (type FNDP) for 15 HirschbergSinclair-PT-45-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type EQUN) for 15 HirschbergSinclair-PT-45-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SRCH) for 15 HirschbergSinclair-PT-45-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 121 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-13
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 122 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-13
lola: result : unknown
lola: FINISHED task # 146 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-05
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 147 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-05 (obsolete)
lola: CANCELED task # 149 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-05 (obsolete)
lola: LAUNCH task # 114 (type FNDP) for 45 HirschbergSinclair-PT-45-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type EQUN) for 45 HirschbergSinclair-PT-45-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 45 HirschbergSinclair-PT-45-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 81 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-06
lola: result : true
lola: FINISHED task # 147 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-05
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 117 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-15
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 114 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-15 (obsolete)
lola: CANCELED task # 115 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-15 (obsolete)
lola: LAUNCH task # 133 (type FNDP) for 24 HirschbergSinclair-PT-45-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type EQUN) for 24 HirschbergSinclair-PT-45-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SRCH) for 24 HirschbergSinclair-PT-45-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 114 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-15
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 133 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-08
lola: result : true
lola: fired transitions : 27
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 134 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-08 (obsolete)
lola: CANCELED task # 137 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-08 (obsolete)
lola: LAUNCH task # 140 (type FNDP) for 0 HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type EQUN) for 0 HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SRCH) for 0 HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-134.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 134 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-08
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-141.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-115.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-109.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-45-ReachabilityFireability-01: EF true tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-02: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-03: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-04: EF true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-05: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-06: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-07: AG true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-08: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-09: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-10: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-11: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-12: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-13: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-14: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-15: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-45-ReachabilityFireability-00: AG 0 1 4 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
140 EF FNDP 3/1795 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 293138 t fired, 10176 attempts, .
141 EF STEQ 3/3590 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 sara is running.
143 EF SRCH 3/3590 2/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 179818 m, 35963 m/sec, 220626 t fired, .
144 EF EXCL 4/3591 1/32 HirschbergSinclair-PT-45-ReachabilityFireability-00 34439 m, 6887 m/sec, 45330 t fired, .
Time elapsed: 13 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-45-ReachabilityFireability-01: EF true tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-02: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-03: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-04: EF true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-05: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-06: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-07: AG true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-08: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-09: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-10: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-11: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-12: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-13: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-14: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-15: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-45-ReachabilityFireability-00: AG 0 1 4 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
140 EF FNDP 8/1792 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 699021 t fired, 32825 attempts, .
141 EF STEQ 8/3587 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 sara is running.
143 EF SRCH 8/3587 3/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 457387 m, 55513 m/sec, 566237 t fired, .
144 EF EXCL 9/3591 1/32 HirschbergSinclair-PT-45-ReachabilityFireability-00 73470 m, 7806 m/sec, 101918 t fired, .
Time elapsed: 18 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-45-ReachabilityFireability-01: EF true tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-02: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-03: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-04: EF true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-05: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-06: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-07: AG true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-08: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-09: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-10: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-11: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-12: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-13: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-14: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-15: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-45-ReachabilityFireability-00: AG 0 1 4 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
140 EF FNDP 13/1787 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 1082349 t fired, 55345 attempts, .
141 EF STEQ 13/3582 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 sara is running.
143 EF SRCH 13/3582 5/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 735963 m, 55715 m/sec, 911778 t fired, .
144 EF EXCL 14/3591 1/32 HirschbergSinclair-PT-45-ReachabilityFireability-00 113351 m, 7976 m/sec, 160229 t fired, .
Time elapsed: 23 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 143 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-45-ReachabilityFireability-01: EF true tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-02: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-03: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-04: EF true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-05: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-06: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-07: AG true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-08: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-09: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-10: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-11: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-12: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-13: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-14: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-15: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-45-ReachabilityFireability-00: AG 0 1 3 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
140 EF FNDP 18/1782 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 1511463 t fired, 81096 attempts, .
141 EF STEQ 18/3577 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 sara is running.
144 EF EXCL 19/3591 2/32 HirschbergSinclair-PT-45-ReachabilityFireability-00 161842 m, 9698 m/sec, 223416 t fired, .
Time elapsed: 28 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 145 (type SRCH) for 0 HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 145 (type SRCH) for HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-45-ReachabilityFireability-01: EF true tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-02: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-03: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-04: EF true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-05: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-06: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-07: AG true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-08: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-09: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-10: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-11: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-12: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-13: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-14: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-15: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-45-ReachabilityFireability-00: AG 0 0 3 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
140 EF FNDP 23/3590 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 1969417 t fired, 108633 attempts, .
141 EF STEQ 23/3590 0/5 HirschbergSinclair-PT-45-ReachabilityFireability-00 sara is running.
144 EF EXCL 24/3591 2/32 HirschbergSinclair-PT-45-ReachabilityFireability-00 207659 m, 9163 m/sec, 288740 t fired, .
Time elapsed: 33 secs. Pages in use: 6
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 141 (type EQUN) for HirschbergSinclair-PT-45-ReachabilityFireability-00
lola: result : false
lola: CANCELED task # 140 (type FNDP) for HirschbergSinclair-PT-45-ReachabilityFireability-00 (obsolete)
lola: CANCELED task # 144 (type EXCL) for HirschbergSinclair-PT-45-ReachabilityFireability-00 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-45-ReachabilityFireability-00: AG true state equation
HirschbergSinclair-PT-45-ReachabilityFireability-01: EF true tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-02: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-03: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-04: EF true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-05: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-06: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-07: AG true tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-08: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-09: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-10: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-11: AG false tandem / relaxed
HirschbergSinclair-PT-45-ReachabilityFireability-12: EF true findpath
HirschbergSinclair-PT-45-ReachabilityFireability-13: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-14: AG false tandem / insertion
HirschbergSinclair-PT-45-ReachabilityFireability-15: EF true tandem / insertion
Time elapsed: 37 secs. Pages in use: 6
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-45"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HirschbergSinclair-PT-45, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346000495"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-45.tgz
mv HirschbergSinclair-PT-45 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;