About the Execution of LoLa+red for HirschbergSinclair-PT-35
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2856.560 | 1192468.00 | 1207860.00 | 4086.70 | TTFFFT??FFTT???? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346000474.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HirschbergSinclair-PT-35, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346000474
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 12K Feb 26 02:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Feb 26 02:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 26 02:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 02:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 32K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 20K Feb 26 02:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 141K Feb 26 02:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Feb 26 02:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 02:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 544K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-00
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-01
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-02
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-03
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-04
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-05
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-06
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-07
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-08
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-09
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-10
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-11
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-12
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-13
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-14
FORMULA_NAME HirschbergSinclair-PT-35-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678548661771
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-35
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 15:31:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 15:31:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 15:31:05] [INFO ] Load time of PNML (sax parser for PT used): 208 ms
[2023-03-11 15:31:05] [INFO ] Transformed 998 places.
[2023-03-11 15:31:05] [INFO ] Transformed 922 transitions.
[2023-03-11 15:31:05] [INFO ] Parsed PT model containing 998 places and 922 transitions and 2806 arcs in 370 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
Support contains 159 out of 998 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 998/998 places, 922/922 transitions.
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 963 transition count 922
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 63 place count 935 transition count 894
Iterating global reduction 1 with 28 rules applied. Total rules applied 91 place count 935 transition count 894
Discarding 22 places :
Symmetric choice reduction at 1 with 22 rule applications. Total rules 113 place count 913 transition count 872
Iterating global reduction 1 with 22 rules applied. Total rules applied 135 place count 913 transition count 872
Applied a total of 135 rules in 551 ms. Remains 913 /998 variables (removed 85) and now considering 872/922 (removed 50) transitions.
// Phase 1: matrix 872 rows 913 cols
[2023-03-11 15:31:06] [INFO ] Computed 41 place invariants in 41 ms
[2023-03-11 15:31:07] [INFO ] Implicit Places using invariants in 1052 ms returned []
[2023-03-11 15:31:07] [INFO ] Invariant cache hit.
[2023-03-11 15:31:09] [INFO ] Implicit Places using invariants and state equation in 1964 ms returned []
Implicit Place search using SMT with State Equation took 3074 ms to find 0 implicit places.
[2023-03-11 15:31:09] [INFO ] Invariant cache hit.
[2023-03-11 15:31:11] [INFO ] Dead Transitions using invariants and state equation in 1296 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 913/998 places, 872/922 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4925 ms. Remains : 913/998 places, 872/922 transitions.
Support contains 159 out of 913 places after structural reductions.
[2023-03-11 15:31:11] [INFO ] Flatten gal took : 148 ms
[2023-03-11 15:31:11] [INFO ] Flatten gal took : 79 ms
[2023-03-11 15:31:11] [INFO ] Input system was already deterministic with 872 transitions.
Support contains 158 out of 913 places (down from 159) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 10 resets, run finished after 735 ms. (steps per millisecond=13 ) properties (out of 98) seen :95
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-11 15:31:12] [INFO ] Invariant cache hit.
[2023-03-11 15:31:13] [INFO ] [Real]Absence check using 0 positive and 41 generalized place invariants in 283 ms returned sat
[2023-03-11 15:31:14] [INFO ] After 1460ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:1
[2023-03-11 15:31:14] [INFO ] [Nat]Absence check using 0 positive and 41 generalized place invariants in 253 ms returned sat
[2023-03-11 15:31:15] [INFO ] After 825ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :1
[2023-03-11 15:31:15] [INFO ] After 1051ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :1
Attempting to minimize the solution found.
Minimization took 81 ms.
[2023-03-11 15:31:15] [INFO ] After 1654ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :1
Fused 3 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 7 ms.
Support contains 3 out of 913 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 913/913 places, 872/872 transitions.
Graph (complete) has 1742 edges and 913 vertex of which 892 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.4 ms
Discarding 21 places :
Also discarding 0 output transitions
Drop transitions removed 21 transitions
Reduce isomorphic transitions removed 21 transitions.
Drop transitions removed 378 transitions
Trivial Post-agglo rules discarded 378 transitions
Performed 378 trivial Post agglomeration. Transition count delta: 378
Iterating post reduction 0 with 399 rules applied. Total rules applied 400 place count 892 transition count 473
Reduce places removed 378 places and 0 transitions.
Graph (complete) has 909 edges and 514 vertex of which 452 are kept as prefixes of interest. Removing 62 places using SCC suffix rule.2 ms
Discarding 62 places :
Also discarding 0 output transitions
Iterating post reduction 1 with 379 rules applied. Total rules applied 779 place count 452 transition count 473
Drop transitions removed 62 transitions
Reduce isomorphic transitions removed 62 transitions.
Iterating post reduction 2 with 62 rules applied. Total rules applied 841 place count 452 transition count 411
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 848 place count 445 transition count 404
Iterating global reduction 3 with 7 rules applied. Total rules applied 855 place count 445 transition count 404
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 3 with 5 rules applied. Total rules applied 860 place count 445 transition count 399
Reduce places removed 5 places and 0 transitions.
Graph (complete) has 776 edges and 440 vertex of which 432 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.2 ms
Discarding 8 places :
Also discarding 0 output transitions
Iterating post reduction 4 with 6 rules applied. Total rules applied 866 place count 432 transition count 399
Drop transitions removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 5 with 8 rules applied. Total rules applied 874 place count 432 transition count 391
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 875 place count 431 transition count 390
Iterating global reduction 6 with 1 rules applied. Total rules applied 876 place count 431 transition count 390
Free-agglomeration rule (complex) applied 14 times.
Iterating global reduction 6 with 14 rules applied. Total rules applied 890 place count 431 transition count 376
Reduce places removed 14 places and 0 transitions.
Iterating post reduction 6 with 14 rules applied. Total rules applied 904 place count 417 transition count 376
Reduce places removed 34 places and 34 transitions.
Iterating global reduction 7 with 34 rules applied. Total rules applied 938 place count 383 transition count 342
Reduce places removed 20 places and 0 transitions.
Drop transitions removed 153 transitions
Trivial Post-agglo rules discarded 153 transitions
Performed 153 trivial Post agglomeration. Transition count delta: 153
Iterating post reduction 7 with 173 rules applied. Total rules applied 1111 place count 363 transition count 189
Reduce places removed 153 places and 0 transitions.
Iterating post reduction 8 with 153 rules applied. Total rules applied 1264 place count 210 transition count 189
Performed 25 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 9 with 25 Pre rules applied. Total rules applied 1264 place count 210 transition count 164
Deduced a syphon composed of 25 places in 2 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 9 with 50 rules applied. Total rules applied 1314 place count 185 transition count 164
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 9 with 1 rules applied. Total rules applied 1315 place count 184 transition count 164
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 10 with 1 Pre rules applied. Total rules applied 1315 place count 184 transition count 163
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 10 with 2 rules applied. Total rules applied 1317 place count 183 transition count 163
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 2 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 10 with 6 rules applied. Total rules applied 1323 place count 180 transition count 160
Applied a total of 1323 rules in 373 ms. Remains 180 /913 variables (removed 733) and now considering 160/872 (removed 712) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 373 ms. Remains : 180/913 places, 160/872 transitions.
Incomplete random walk after 10000 steps, including 61 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 1) seen :0
Finished Best-First random walk after 1109 steps, including 2 resets, run visited all 1 properties in 3 ms. (steps per millisecond=369 )
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-11 15:31:16] [INFO ] Flatten gal took : 55 ms
[2023-03-11 15:31:16] [INFO ] Flatten gal took : 61 ms
[2023-03-11 15:31:16] [INFO ] Input system was already deterministic with 872 transitions.
Computed a total of 913 stabilizing places and 872 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 913 transition count 872
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA HirschbergSinclair-PT-35-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 900 transition count 859
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 900 transition count 859
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 33 place count 893 transition count 852
Iterating global reduction 0 with 7 rules applied. Total rules applied 40 place count 893 transition count 852
Applied a total of 40 rules in 322 ms. Remains 893 /913 variables (removed 20) and now considering 852/872 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 322 ms. Remains : 893/913 places, 852/872 transitions.
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 40 ms
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 41 ms
[2023-03-11 15:31:17] [INFO ] Input system was already deterministic with 852 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 902 transition count 861
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 902 transition count 861
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 28 place count 896 transition count 855
Iterating global reduction 0 with 6 rules applied. Total rules applied 34 place count 896 transition count 855
Applied a total of 34 rules in 123 ms. Remains 896 /913 variables (removed 17) and now considering 855/872 (removed 17) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 124 ms. Remains : 896/913 places, 855/872 transitions.
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 36 ms
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 38 ms
[2023-03-11 15:31:17] [INFO ] Input system was already deterministic with 855 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 901 transition count 860
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 901 transition count 860
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 30 place count 895 transition count 854
Iterating global reduction 0 with 6 rules applied. Total rules applied 36 place count 895 transition count 854
Applied a total of 36 rules in 117 ms. Remains 895 /913 variables (removed 18) and now considering 854/872 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 118 ms. Remains : 895/913 places, 854/872 transitions.
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 30 ms
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 31 ms
[2023-03-11 15:31:17] [INFO ] Input system was already deterministic with 854 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 904 transition count 863
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 904 transition count 863
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 23 place count 899 transition count 858
Iterating global reduction 0 with 5 rules applied. Total rules applied 28 place count 899 transition count 858
Applied a total of 28 rules in 113 ms. Remains 899 /913 variables (removed 14) and now considering 858/872 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 114 ms. Remains : 899/913 places, 858/872 transitions.
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 27 ms
[2023-03-11 15:31:17] [INFO ] Flatten gal took : 29 ms
[2023-03-11 15:31:17] [INFO ] Input system was already deterministic with 858 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 901 transition count 860
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 901 transition count 860
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 31 place count 894 transition count 853
Iterating global reduction 0 with 7 rules applied. Total rules applied 38 place count 894 transition count 853
Applied a total of 38 rules in 109 ms. Remains 894 /913 variables (removed 19) and now considering 853/872 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 111 ms. Remains : 894/913 places, 853/872 transitions.
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 26 ms
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 27 ms
[2023-03-11 15:31:18] [INFO ] Input system was already deterministic with 853 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 901 transition count 860
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 901 transition count 860
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 30 place count 895 transition count 854
Iterating global reduction 0 with 6 rules applied. Total rules applied 36 place count 895 transition count 854
Applied a total of 36 rules in 131 ms. Remains 895 /913 variables (removed 18) and now considering 854/872 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 131 ms. Remains : 895/913 places, 854/872 transitions.
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 23 ms
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 25 ms
[2023-03-11 15:31:18] [INFO ] Input system was already deterministic with 854 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 903 transition count 862
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 903 transition count 862
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 26 place count 897 transition count 856
Iterating global reduction 0 with 6 rules applied. Total rules applied 32 place count 897 transition count 856
Applied a total of 32 rules in 104 ms. Remains 897 /913 variables (removed 16) and now considering 856/872 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 105 ms. Remains : 897/913 places, 856/872 transitions.
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 24 ms
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 25 ms
[2023-03-11 15:31:18] [INFO ] Input system was already deterministic with 856 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 901 transition count 860
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 901 transition count 860
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 30 place count 895 transition count 854
Iterating global reduction 0 with 6 rules applied. Total rules applied 36 place count 895 transition count 854
Applied a total of 36 rules in 112 ms. Remains 895 /913 variables (removed 18) and now considering 854/872 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 114 ms. Remains : 895/913 places, 854/872 transitions.
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 24 ms
[2023-03-11 15:31:18] [INFO ] Flatten gal took : 24 ms
[2023-03-11 15:31:18] [INFO ] Input system was already deterministic with 854 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Reduce places removed 33 places and 33 transitions.
Drop transitions removed 364 transitions
Trivial Post-agglo rules discarded 364 transitions
Performed 364 trivial Post agglomeration. Transition count delta: 364
Iterating post reduction 0 with 364 rules applied. Total rules applied 364 place count 880 transition count 475
Reduce places removed 364 places and 0 transitions.
Iterating post reduction 1 with 364 rules applied. Total rules applied 728 place count 516 transition count 475
Discarding 13 places :
Symmetric choice reduction at 2 with 13 rule applications. Total rules 741 place count 503 transition count 462
Iterating global reduction 2 with 13 rules applied. Total rules applied 754 place count 503 transition count 462
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 2 with 5 rules applied. Total rules applied 759 place count 503 transition count 457
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 764 place count 498 transition count 457
Applied a total of 764 rules in 104 ms. Remains 498 /913 variables (removed 415) and now considering 457/872 (removed 415) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 104 ms. Remains : 498/913 places, 457/872 transitions.
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 12 ms
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 13 ms
[2023-03-11 15:31:19] [INFO ] Input system was already deterministic with 457 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 900 transition count 859
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 900 transition count 859
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 33 place count 893 transition count 852
Iterating global reduction 0 with 7 rules applied. Total rules applied 40 place count 893 transition count 852
Applied a total of 40 rules in 260 ms. Remains 893 /913 variables (removed 20) and now considering 852/872 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 261 ms. Remains : 893/913 places, 852/872 transitions.
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 22 ms
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 23 ms
[2023-03-11 15:31:19] [INFO ] Input system was already deterministic with 852 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Reduce places removed 33 places and 33 transitions.
Drop transitions removed 362 transitions
Trivial Post-agglo rules discarded 362 transitions
Performed 362 trivial Post agglomeration. Transition count delta: 362
Iterating post reduction 0 with 362 rules applied. Total rules applied 362 place count 880 transition count 477
Reduce places removed 362 places and 0 transitions.
Iterating post reduction 1 with 362 rules applied. Total rules applied 724 place count 518 transition count 477
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 736 place count 506 transition count 465
Iterating global reduction 2 with 12 rules applied. Total rules applied 748 place count 506 transition count 465
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 2 with 5 rules applied. Total rules applied 753 place count 506 transition count 460
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 758 place count 501 transition count 460
Applied a total of 758 rules in 62 ms. Remains 501 /913 variables (removed 412) and now considering 460/872 (removed 412) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 501/913 places, 460/872 transitions.
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 15 ms
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 17 ms
[2023-03-11 15:31:19] [INFO ] Input system was already deterministic with 460 transitions.
Support contains 5 out of 501 places (down from 7) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 901 transition count 860
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 901 transition count 860
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 30 place count 895 transition count 854
Iterating global reduction 0 with 6 rules applied. Total rules applied 36 place count 895 transition count 854
Applied a total of 36 rules in 120 ms. Remains 895 /913 variables (removed 18) and now considering 854/872 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 121 ms. Remains : 895/913 places, 854/872 transitions.
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 29 ms
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 26 ms
[2023-03-11 15:31:19] [INFO ] Input system was already deterministic with 854 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Reduce places removed 30 places and 30 transitions.
Drop transitions removed 323 transitions
Trivial Post-agglo rules discarded 323 transitions
Performed 323 trivial Post agglomeration. Transition count delta: 323
Iterating post reduction 0 with 323 rules applied. Total rules applied 323 place count 883 transition count 519
Reduce places removed 323 places and 0 transitions.
Iterating post reduction 1 with 323 rules applied. Total rules applied 646 place count 560 transition count 519
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 657 place count 549 transition count 508
Iterating global reduction 2 with 11 rules applied. Total rules applied 668 place count 549 transition count 508
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 2 with 3 rules applied. Total rules applied 671 place count 549 transition count 505
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 674 place count 546 transition count 505
Applied a total of 674 rules in 64 ms. Remains 546 /913 variables (removed 367) and now considering 505/872 (removed 367) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 65 ms. Remains : 546/913 places, 505/872 transitions.
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 16 ms
[2023-03-11 15:31:19] [INFO ] Flatten gal took : 14 ms
[2023-03-11 15:31:19] [INFO ] Input system was already deterministic with 505 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Reduce places removed 32 places and 32 transitions.
Drop transitions removed 363 transitions
Trivial Post-agglo rules discarded 363 transitions
Performed 363 trivial Post agglomeration. Transition count delta: 363
Iterating post reduction 0 with 363 rules applied. Total rules applied 363 place count 881 transition count 477
Reduce places removed 363 places and 0 transitions.
Iterating post reduction 1 with 363 rules applied. Total rules applied 726 place count 518 transition count 477
Discarding 13 places :
Symmetric choice reduction at 2 with 13 rule applications. Total rules 739 place count 505 transition count 464
Iterating global reduction 2 with 13 rules applied. Total rules applied 752 place count 505 transition count 464
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 2 with 6 rules applied. Total rules applied 758 place count 505 transition count 458
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 3 with 6 rules applied. Total rules applied 764 place count 499 transition count 458
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 766 place count 497 transition count 456
Iterating global reduction 4 with 2 rules applied. Total rules applied 768 place count 497 transition count 456
Applied a total of 768 rules in 81 ms. Remains 497 /913 variables (removed 416) and now considering 456/872 (removed 416) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 81 ms. Remains : 497/913 places, 456/872 transitions.
[2023-03-11 15:31:20] [INFO ] Flatten gal took : 10 ms
[2023-03-11 15:31:20] [INFO ] Flatten gal took : 10 ms
[2023-03-11 15:31:20] [INFO ] Input system was already deterministic with 456 transitions.
Starting structural reductions in LTL mode, iteration 0 : 913/913 places, 872/872 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 902 transition count 861
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 902 transition count 861
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 28 place count 896 transition count 855
Iterating global reduction 0 with 6 rules applied. Total rules applied 34 place count 896 transition count 855
Applied a total of 34 rules in 93 ms. Remains 896 /913 variables (removed 17) and now considering 855/872 (removed 17) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 94 ms. Remains : 896/913 places, 855/872 transitions.
[2023-03-11 15:31:20] [INFO ] Flatten gal took : 19 ms
[2023-03-11 15:31:20] [INFO ] Flatten gal took : 21 ms
[2023-03-11 15:31:20] [INFO ] Input system was already deterministic with 855 transitions.
[2023-03-11 15:31:20] [INFO ] Flatten gal took : 22 ms
[2023-03-11 15:31:20] [INFO ] Flatten gal took : 22 ms
[2023-03-11 15:31:20] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-11 15:31:20] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 913 places, 872 transitions and 2615 arcs took 6 ms.
Total runtime 14862 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HirschbergSinclair-PT-35
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/365
CTLFireability
FORMULA HirschbergSinclair-PT-35-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA HirschbergSinclair-PT-35-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678549854239
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/365/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/365/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/365/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 14 (type EXCL) for 13 HirschbergSinclair-PT-35-CTLFireability-04
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 14 (type EXCL) for HirschbergSinclair-PT-35-CTLFireability-04
lola: result : false
lola: markings : 885
lola: fired transitions : 1338
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 41 (type EXCL) for 40 HirschbergSinclair-PT-35-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-35-CTLFireability-04: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-35-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
HirschbergSinclair-PT-35-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-10: EXEF 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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HirschbergSinclair-PT-35-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
HirschbergSinclair-PT-35-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-35-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-35"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HirschbergSinclair-PT-35, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346000474"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-35.tgz
mv HirschbergSinclair-PT-35 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;