Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346000434.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HirschbergSinclair-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346000434
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 624K
-rw-r--r-- 1 mcc users 8.1K Feb 26 02:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 02:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 26 02:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 02:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 26 02:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Feb 26 02:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 02:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 26 02:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 136K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-00
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-01
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-02
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-03
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-04
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-05
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-06
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-07
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-08
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-09
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-10
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-11
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-12
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-13
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-14
FORMULA_NAME HirschbergSinclair-PT-10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678538557805

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 12:42:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 12:42:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 12:42:41] [INFO ] Load time of PNML (sax parser for PT used): 108 ms
[2023-03-11 12:42:41] [INFO ] Transformed 260 places.
[2023-03-11 12:42:41] [INFO ] Transformed 236 transitions.
[2023-03-11 12:42:41] [INFO ] Parsed PT model containing 260 places and 236 transitions and 721 arcs in 256 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
Support contains 117 out of 260 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 260/260 places, 236/236 transitions.
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 250 transition count 236
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 13 place count 247 transition count 233
Iterating global reduction 1 with 3 rules applied. Total rules applied 16 place count 247 transition count 233
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 17 place count 246 transition count 232
Iterating global reduction 1 with 1 rules applied. Total rules applied 18 place count 246 transition count 232
Applied a total of 18 rules in 82 ms. Remains 246 /260 variables (removed 14) and now considering 232/236 (removed 4) transitions.
// Phase 1: matrix 232 rows 246 cols
[2023-03-11 12:42:42] [INFO ] Computed 14 place invariants in 22 ms
[2023-03-11 12:42:42] [INFO ] Implicit Places using invariants in 353 ms returned []
[2023-03-11 12:42:42] [INFO ] Invariant cache hit.
[2023-03-11 12:42:43] [INFO ] Implicit Places using invariants and state equation in 567 ms returned []
Implicit Place search using SMT with State Equation took 961 ms to find 0 implicit places.
[2023-03-11 12:42:43] [INFO ] Invariant cache hit.
[2023-03-11 12:42:43] [INFO ] Dead Transitions using invariants and state equation in 450 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 246/260 places, 232/236 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1495 ms. Remains : 246/260 places, 232/236 transitions.
Support contains 117 out of 246 places after structural reductions.
[2023-03-11 12:42:44] [INFO ] Flatten gal took : 164 ms
[2023-03-11 12:42:44] [INFO ] Flatten gal took : 73 ms
[2023-03-11 12:42:44] [INFO ] Input system was already deterministic with 232 transitions.
Incomplete random walk after 10000 steps, including 42 resets, run finished after 886 ms. (steps per millisecond=11 ) properties (out of 75) seen :62
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 10 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 12) seen :1
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 7 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-11 12:42:46] [INFO ] Invariant cache hit.
[2023-03-11 12:42:46] [INFO ] [Real]Absence check using 0 positive and 14 generalized place invariants in 41 ms returned sat
[2023-03-11 12:42:46] [INFO ] After 441ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-11 12:42:47] [INFO ] [Nat]Absence check using 0 positive and 14 generalized place invariants in 79 ms returned sat
[2023-03-11 12:42:47] [INFO ] After 293ms SMT Verify possible using state equation in natural domain returned unsat :9 sat :2
[2023-03-11 12:42:47] [INFO ] After 482ms SMT Verify possible using trap constraints in natural domain returned unsat :9 sat :2
Attempting to minimize the solution found.
Minimization took 88 ms.
[2023-03-11 12:42:47] [INFO ] After 1047ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :2
Fused 11 Parikh solutions to 2 different solutions.
Parikh walk visited 1 properties in 26 ms.
Support contains 3 out of 246 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 246/246 places, 232/232 transitions.
Graph (complete) has 463 edges and 246 vertex of which 239 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.19 ms
Discarding 7 places :
Also discarding 0 output transitions
Drop transitions removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Drop transitions removed 89 transitions
Trivial Post-agglo rules discarded 89 transitions
Performed 89 trivial Post agglomeration. Transition count delta: 89
Iterating post reduction 0 with 96 rules applied. Total rules applied 97 place count 239 transition count 136
Reduce places removed 89 places and 0 transitions.
Graph (complete) has 259 edges and 150 vertex of which 134 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.1 ms
Discarding 16 places :
Also discarding 0 output transitions
Iterating post reduction 1 with 90 rules applied. Total rules applied 187 place count 134 transition count 136
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 203 place count 134 transition count 120
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 208 place count 129 transition count 115
Iterating global reduction 3 with 5 rules applied. Total rules applied 213 place count 129 transition count 115
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 3 with 2 rules applied. Total rules applied 215 place count 129 transition count 113
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 224 edges and 127 vertex of which 124 are kept as prefixes of interest. Removing 3 places using SCC suffix rule.1 ms
Discarding 3 places :
Also discarding 0 output transitions
Iterating post reduction 4 with 3 rules applied. Total rules applied 218 place count 124 transition count 113
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 5 with 3 rules applied. Total rules applied 221 place count 124 transition count 110
Discarding 2 places :
Symmetric choice reduction at 6 with 2 rule applications. Total rules 223 place count 122 transition count 108
Iterating global reduction 6 with 2 rules applied. Total rules applied 225 place count 122 transition count 108
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 6 with 3 rules applied. Total rules applied 228 place count 122 transition count 105
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 6 with 3 rules applied. Total rules applied 231 place count 119 transition count 105
Reduce places removed 8 places and 8 transitions.
Iterating global reduction 7 with 8 rules applied. Total rules applied 239 place count 111 transition count 97
Reduce places removed 7 places and 0 transitions.
Drop transitions removed 39 transitions
Trivial Post-agglo rules discarded 39 transitions
Performed 39 trivial Post agglomeration. Transition count delta: 39
Iterating post reduction 7 with 46 rules applied. Total rules applied 285 place count 104 transition count 58
Reduce places removed 39 places and 0 transitions.
Iterating post reduction 8 with 39 rules applied. Total rules applied 324 place count 65 transition count 58
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 9 with 13 Pre rules applied. Total rules applied 324 place count 65 transition count 45
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 9 with 26 rules applied. Total rules applied 350 place count 52 transition count 45
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 9 with 1 rules applied. Total rules applied 351 place count 51 transition count 45
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 10 with 1 Pre rules applied. Total rules applied 351 place count 51 transition count 44
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 10 with 2 rules applied. Total rules applied 353 place count 50 transition count 44
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 10 with 6 rules applied. Total rules applied 359 place count 47 transition count 41
Applied a total of 359 rules in 206 ms. Remains 47 /246 variables (removed 199) and now considering 41/232 (removed 191) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 206 ms. Remains : 47/246 places, 41/232 transitions.
Incomplete random walk after 10000 steps, including 223 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 96 resets, run finished after 13 ms. (steps per millisecond=769 ) properties (out of 1) seen :0
Probably explored full state space saw : 602 states, properties seen :0
Probabilistic random walk after 1756 steps, saw 602 distinct states, run finished after 34 ms. (steps per millisecond=51 ) properties seen :0
Explored full state space saw : 602 states, properties seen :0
Exhaustive walk after 1756 steps, saw 602 distinct states, run finished after 5 ms. (steps per millisecond=351 ) properties seen :0
Successfully simplified 10 atomic propositions for a total of 16 simplifications.
[2023-03-11 12:42:48] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 37 ms
FORMULA HirschbergSinclair-PT-10-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA HirschbergSinclair-PT-10-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 36 ms
[2023-03-11 12:42:48] [INFO ] Input system was already deterministic with 232 transitions.
Support contains 88 out of 246 places (down from 94) after GAL structural reductions.
Computed a total of 246 stabilizing places and 232 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 246 transition count 232
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Reduce places removed 7 places and 7 transitions.
Drop transitions removed 78 transitions
Trivial Post-agglo rules discarded 78 transitions
Performed 78 trivial Post agglomeration. Transition count delta: 78
Iterating post reduction 0 with 78 rules applied. Total rules applied 78 place count 239 transition count 147
Reduce places removed 78 places and 0 transitions.
Iterating post reduction 1 with 78 rules applied. Total rules applied 156 place count 161 transition count 147
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 164 place count 153 transition count 139
Iterating global reduction 2 with 8 rules applied. Total rules applied 172 place count 153 transition count 139
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 2 with 2 rules applied. Total rules applied 174 place count 153 transition count 137
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 176 place count 151 transition count 137
Applied a total of 176 rules in 59 ms. Remains 151 /246 variables (removed 95) and now considering 137/232 (removed 95) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 59 ms. Remains : 151/246 places, 137/232 transitions.
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 10 ms
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 13 ms
[2023-03-11 12:42:48] [INFO ] Input system was already deterministic with 137 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 237 transition count 223
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 237 transition count 223
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 24 place count 231 transition count 217
Iterating global reduction 0 with 6 rules applied. Total rules applied 30 place count 231 transition count 217
Applied a total of 30 rules in 32 ms. Remains 231 /246 variables (removed 15) and now considering 217/232 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 231/246 places, 217/232 transitions.
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 17 ms
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 22 ms
[2023-03-11 12:42:48] [INFO ] Input system was already deterministic with 217 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 239 transition count 225
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 239 transition count 225
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 18 place count 235 transition count 221
Iterating global reduction 0 with 4 rules applied. Total rules applied 22 place count 235 transition count 221
Applied a total of 22 rules in 58 ms. Remains 235 /246 variables (removed 11) and now considering 221/232 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58 ms. Remains : 235/246 places, 221/232 transitions.
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 30 ms
[2023-03-11 12:42:48] [INFO ] Flatten gal took : 32 ms
[2023-03-11 12:42:48] [INFO ] Input system was already deterministic with 221 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 238 transition count 224
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 238 transition count 224
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 21 place count 233 transition count 219
Iterating global reduction 0 with 5 rules applied. Total rules applied 26 place count 233 transition count 219
Applied a total of 26 rules in 58 ms. Remains 233 /246 variables (removed 13) and now considering 219/232 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58 ms. Remains : 233/246 places, 219/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 29 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 32 ms
[2023-03-11 12:42:49] [INFO ] Input system was already deterministic with 219 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 238 transition count 224
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 238 transition count 224
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 22 place count 232 transition count 218
Iterating global reduction 0 with 6 rules applied. Total rules applied 28 place count 232 transition count 218
Applied a total of 28 rules in 36 ms. Remains 232 /246 variables (removed 14) and now considering 218/232 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 232/246 places, 218/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 30 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 32 ms
[2023-03-11 12:42:49] [INFO ] Input system was already deterministic with 218 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Reduce places removed 8 places and 8 transitions.
Drop transitions removed 91 transitions
Trivial Post-agglo rules discarded 91 transitions
Performed 91 trivial Post agglomeration. Transition count delta: 91
Iterating post reduction 0 with 91 rules applied. Total rules applied 91 place count 238 transition count 133
Reduce places removed 91 places and 0 transitions.
Iterating post reduction 1 with 91 rules applied. Total rules applied 182 place count 147 transition count 133
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 191 place count 138 transition count 124
Iterating global reduction 2 with 9 rules applied. Total rules applied 200 place count 138 transition count 124
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 2 with 2 rules applied. Total rules applied 202 place count 138 transition count 122
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 204 place count 136 transition count 122
Applied a total of 204 rules in 52 ms. Remains 136 /246 variables (removed 110) and now considering 122/232 (removed 110) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 52 ms. Remains : 136/246 places, 122/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 23 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 21 ms
[2023-03-11 12:42:49] [INFO ] Input system was already deterministic with 122 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Reduce places removed 7 places and 7 transitions.
Drop transitions removed 68 transitions
Trivial Post-agglo rules discarded 68 transitions
Performed 68 trivial Post agglomeration. Transition count delta: 68
Iterating post reduction 0 with 68 rules applied. Total rules applied 68 place count 239 transition count 157
Reduce places removed 68 places and 0 transitions.
Iterating post reduction 1 with 68 rules applied. Total rules applied 136 place count 171 transition count 157
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 145 place count 162 transition count 148
Iterating global reduction 2 with 9 rules applied. Total rules applied 154 place count 162 transition count 148
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 155 place count 162 transition count 147
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 156 place count 161 transition count 147
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 158 place count 159 transition count 145
Iterating global reduction 4 with 2 rules applied. Total rules applied 160 place count 159 transition count 145
Applied a total of 160 rules in 63 ms. Remains 159 /246 variables (removed 87) and now considering 145/232 (removed 87) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 159/246 places, 145/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 7 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 9 ms
[2023-03-11 12:42:49] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 237 transition count 223
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 237 transition count 223
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 24 place count 231 transition count 217
Iterating global reduction 0 with 6 rules applied. Total rules applied 30 place count 231 transition count 217
Applied a total of 30 rules in 53 ms. Remains 231 /246 variables (removed 15) and now considering 217/232 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 231/246 places, 217/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 28 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 29 ms
[2023-03-11 12:42:49] [INFO ] Input system was already deterministic with 217 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 238 transition count 224
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 238 transition count 224
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 21 place count 233 transition count 219
Iterating global reduction 0 with 5 rules applied. Total rules applied 26 place count 233 transition count 219
Applied a total of 26 rules in 32 ms. Remains 233 /246 variables (removed 13) and now considering 219/232 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 233/246 places, 219/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 27 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 29 ms
[2023-03-11 12:42:49] [INFO ] Input system was already deterministic with 219 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 237 transition count 223
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 237 transition count 223
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 25 place count 230 transition count 216
Iterating global reduction 0 with 7 rules applied. Total rules applied 32 place count 230 transition count 216
Applied a total of 32 rules in 30 ms. Remains 230 /246 variables (removed 16) and now considering 216/232 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 230/246 places, 216/232 transitions.
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 27 ms
[2023-03-11 12:42:49] [INFO ] Flatten gal took : 28 ms
[2023-03-11 12:42:50] [INFO ] Input system was already deterministic with 216 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 238 transition count 224
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 238 transition count 224
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 21 place count 233 transition count 219
Iterating global reduction 0 with 5 rules applied. Total rules applied 26 place count 233 transition count 219
Applied a total of 26 rules in 12 ms. Remains 233 /246 variables (removed 13) and now considering 219/232 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 233/246 places, 219/232 transitions.
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 11 ms
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 27 ms
[2023-03-11 12:42:50] [INFO ] Input system was already deterministic with 219 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Reduce places removed 9 places and 9 transitions.
Drop transitions removed 89 transitions
Trivial Post-agglo rules discarded 89 transitions
Performed 89 trivial Post agglomeration. Transition count delta: 89
Iterating post reduction 0 with 89 rules applied. Total rules applied 89 place count 237 transition count 134
Reduce places removed 89 places and 0 transitions.
Iterating post reduction 1 with 89 rules applied. Total rules applied 178 place count 148 transition count 134
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 187 place count 139 transition count 125
Iterating global reduction 2 with 9 rules applied. Total rules applied 196 place count 139 transition count 125
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 2 with 2 rules applied. Total rules applied 198 place count 139 transition count 123
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 200 place count 137 transition count 123
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 201 place count 136 transition count 122
Iterating global reduction 4 with 1 rules applied. Total rules applied 202 place count 136 transition count 122
Applied a total of 202 rules in 63 ms. Remains 136 /246 variables (removed 110) and now considering 122/232 (removed 110) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 63 ms. Remains : 136/246 places, 122/232 transitions.
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 5 ms
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 6 ms
[2023-03-11 12:42:50] [INFO ] Input system was already deterministic with 122 transitions.
Finished random walk after 56 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=56 )
FORMULA HirschbergSinclair-PT-10-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 238 transition count 224
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 238 transition count 224
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 231 transition count 217
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 231 transition count 217
Applied a total of 30 rules in 28 ms. Remains 231 /246 variables (removed 15) and now considering 217/232 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 231/246 places, 217/232 transitions.
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 26 ms
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 27 ms
[2023-03-11 12:42:50] [INFO ] Input system was already deterministic with 217 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 232/232 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 238 transition count 224
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 238 transition count 224
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 22 place count 232 transition count 218
Iterating global reduction 0 with 6 rules applied. Total rules applied 28 place count 232 transition count 218
Applied a total of 28 rules in 28 ms. Remains 232 /246 variables (removed 14) and now considering 218/232 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 232/246 places, 218/232 transitions.
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 27 ms
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 11 ms
[2023-03-11 12:42:50] [INFO ] Input system was already deterministic with 218 transitions.
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 38 ms
[2023-03-11 12:42:50] [INFO ] Flatten gal took : 12 ms
[2023-03-11 12:42:50] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-11 12:42:50] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 246 places, 232 transitions and 694 arcs took 1 ms.
Total runtime 8974 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HirschbergSinclair-PT-10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA HirschbergSinclair-PT-10-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678539307724

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 7 (type EXCL) for 6 HirschbergSinclair-PT-10-CTLFireability-02
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for HirschbergSinclair-PT-10-CTLFireability-02
lola: result : false
lola: markings : 157
lola: fired transitions : 266
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 HirschbergSinclair-PT-10-CTLFireability-06
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-CTLFireability-02: CTL false CTL model checker

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16 CTL EXCL 5/299 4/32 HirschbergSinclair-PT-10-CTLFireability-06 871977 m, 174395 m/sec, 2954502 t fired, .

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HirschbergSinclair-PT-10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-10-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
HirschbergSinclair-PT-10-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-10-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-10-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-10-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
HirschbergSinclair-PT-10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 55/2929 29/32 HirschbergSinclair-PT-10-CTLFireability-07 6769980 m, 114854 m/sec, 29927475 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 60/2929 32/32 HirschbergSinclair-PT-10-CTLFireability-07 7410559 m, 128115 m/sec, 32676885 t fired, .

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-CTLFireability-00: CTL unknown AGGR
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HirschbergSinclair-PT-10-CTLFireability-02: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HirschbergSinclair-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346000434"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-10.tgz
mv HirschbergSinclair-PT-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;