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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r199-smll-167840345900430
Last Updated
May 14, 2023

About the Execution of LoLa+red for HirschbergSinclair-PT-05

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
212.092 8320.00 16524.00 526.40 FFFFFFFTFFTFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345900430.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HirschbergSinclair-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345900430
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 628K
-rw-r--r-- 1 mcc users 12K Feb 26 02:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 26 02:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 26 02:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 02:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:14 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 02:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 02:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Feb 26 02:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 26 02:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 157K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-00
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-01
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-02
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-03
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-04
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-05
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-06
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-07
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-08
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-09
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-10
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-11
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-12
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-13
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-14
FORMULA_NAME HirschbergSinclair-PT-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678538466674

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 12:41:09] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-11 12:41:09] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 12:41:10] [INFO ] Load time of PNML (sax parser for PT used): 236 ms
[2023-03-11 12:41:10] [INFO ] Transformed 124 places.
[2023-03-11 12:41:10] [INFO ] Transformed 111 transitions.
[2023-03-11 12:41:10] [INFO ] Parsed PT model containing 124 places and 111 transitions and 340 arcs in 348 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 27 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 90 resets, run finished after 1022 ms. (steps per millisecond=9 ) properties (out of 16) seen :6
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 126 ms. (steps per millisecond=79 ) properties (out of 10) seen :1
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 27 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 22 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 162 ms. (steps per millisecond=61 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 201 ms. (steps per millisecond=49 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 25 resets, run finished after 168 ms. (steps per millisecond=59 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 108 ms. (steps per millisecond=92 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 29 resets, run finished after 133 ms. (steps per millisecond=75 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 111 rows 124 cols
[2023-03-11 12:41:12] [INFO ] Computed 13 place invariants in 10 ms
[2023-03-11 12:41:13] [INFO ] After 363ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:9
[2023-03-11 12:41:13] [INFO ] [Nat]Absence check using 10 positive place invariants in 11 ms returned sat
[2023-03-11 12:41:13] [INFO ] [Nat]Absence check using 10 positive and 3 generalized place invariants in 3 ms returned sat
[2023-03-11 12:41:13] [INFO ] After 230ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :0
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 9 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 3421 ms.
starting LoLA
BK_INPUT HirschbergSinclair-PT-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-05-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678538474994

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 HirschbergSinclair-PT-05-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 31 (type CNST) for HirschbergSinclair-PT-05-ReachabilityCardinality-10
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 54 (type EXCL) for 18 HirschbergSinclair-PT-05-ReachabilityCardinality-06
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 36 HirschbergSinclair-PT-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 36 HirschbergSinclair-PT-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 36 HirschbergSinclair-PT-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 54 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-06
lola: result : false
lola: markings : 1037
lola: fired transitions : 1496
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 93 (type EXCL) for 12 HirschbergSinclair-PT-05-ReachabilityCardinality-04
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 93 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-04
lola: result : false
lola: markings : 82
lola: fired transitions : 98
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 120 (type EXCL) for 9 HirschbergSinclair-PT-05-ReachabilityCardinality-03
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 120 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-03
lola: result : false
lola: markings : 16
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 124 (type EXCL) for 24 HirschbergSinclair-PT-05-ReachabilityCardinality-08
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 124 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-08
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 117 (type EXCL) for 0 HirschbergSinclair-PT-05-ReachabilityCardinality-00
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 117 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-00
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 143 (type EXCL) for 45 HirschbergSinclair-PT-05-ReachabilityCardinality-15
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 143 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-15
lola: result : true
lola: markings : 32
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 72 (type EXCL) for 27 HirschbergSinclair-PT-05-ReachabilityCardinality-09
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 72 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-09
lola: result : false
lola: markings : 27
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 85 (type EXCL) for 3 HirschbergSinclair-PT-05-ReachabilityCardinality-01
lola: time limit : 450 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 57 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-12
lola: result : false
lola: markings : 19844
lola: fired transitions : 32856
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 49 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 96 (type FNDP) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type EQUN) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 108 (type SRCH) for 33 HirschbergSinclair-PT-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-12
lola: result : unknown
lola: FINISHED task # 48 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 20336
lola: tried executions : 545
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 96 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 100 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 108 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 127 (type FNDP) for 39 HirschbergSinclair-PT-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type EQUN) for 39 HirschbergSinclair-PT-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 136 (type SRCH) for 39 HirschbergSinclair-PT-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 100 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-11
lola: result : unknown
lola: FINISHED task # 136 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-13
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 127 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 130 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 62 (type FNDP) for 6 HirschbergSinclair-PT-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 6 HirschbergSinclair-PT-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SRCH) for 6 HirschbergSinclair-PT-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-01
lola: result : false
lola: markings : 6065
lola: fired transitions : 9073
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 134 (type EXCL) for 15 HirschbergSinclair-PT-05-ReachabilityCardinality-05
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 127 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 65 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-02
lola: result : false
lola: markings : 309
lola: fired transitions : 388
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 62 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 63 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 75 (type FNDP) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type EQUN) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SRCH) for 21 HirschbergSinclair-PT-05-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 134 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-05
lola: result : true
lola: markings : 1123
lola: fired transitions : 1624
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.lola:
rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
lola: LAUNCH task # 103 (type EXCL) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-14
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 2749
lola: tried executions : 172
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 82 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-07
lola: result : false
lola: markings : 114
lola: fired transitions : 129
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 75 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 80 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 78 (type FNDP) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 102 (type SRCH) for 42 HirschbergSinclair-PT-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 75 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 339
lola: tried executions : 9
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 102 (type SRCH) for HirschbergSinclair-PT-05-ReachabilityCardinality-14
lola: result : true
lola: markings : 17
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for HirschbergSinclair-PT-05-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 89 (type EQUN) for HirschbergSinclair-PT-05-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 103 (type EXCL) for HirschbergSinclair-PT-05-ReachabilityCardinality-14 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-05-ReachabilityCardinality-00: AG false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-02: EF false tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-03: EF false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-04: EF false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-05: AG false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-06: EF false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-07: AG true tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-08: AG false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-09: EF false tandem / relaxed
HirschbergSinclair-PT-05-ReachabilityCardinality-10: INITIAL true preprocessing
HirschbergSinclair-PT-05-ReachabilityCardinality-11: AG false findpath
HirschbergSinclair-PT-05-ReachabilityCardinality-12: EF false tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-13: EF true tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-14: AG false tandem / insertion
HirschbergSinclair-PT-05-ReachabilityCardinality-15: AG false tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HirschbergSinclair-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345900430"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-05.tgz
mv HirschbergSinclair-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;