fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r199-smll-167840345600186
Last Updated
May 14, 2023

About the Execution of LoLa+red for GlobalResAllocation-COL-07

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
273.107 15366.00 24582.00 549.40 TFTFTFTFTFFFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345600186.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GlobalResAllocation-COL-07, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345600186
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 8.2K Feb 25 16:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 80K Feb 25 16:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 25 16:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 16:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 16:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 120K Feb 25 16:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 25 16:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 16:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 28K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-00
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-01
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-02
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-03
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-04
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-05
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-06
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-07
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-08
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-09
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-10
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-11
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-12
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-13
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-14
FORMULA_NAME GlobalResAllocation-COL-07-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678488742342

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GlobalResAllocation-COL-07
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 22:52:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 22:52:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 22:52:26] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 22:52:26] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 22:52:27] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 990 ms
[2023-03-10 22:52:27] [INFO ] Imported 5 HL places and 7 HL transitions for a total of 133 PT places and 291067.0 transition bindings in 26 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
FORMULA GlobalResAllocation-COL-07-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 22:52:27] [INFO ] Built PT skeleton of HLPN with 5 places and 7 transitions 29 arcs in 7 ms.
[2023-03-10 22:52:27] [INFO ] Skeletonized 15 HLPN properties in 5 ms.
Initial state reduction rules removed 1 formulas.
FORMULA GlobalResAllocation-COL-07-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 2 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 7 steps, including 0 resets, run visited all 3 properties in 12 ms. (steps per millisecond=0 )
[2023-03-10 22:52:27] [INFO ] Flatten gal took : 25 ms
[2023-03-10 22:52:27] [INFO ] Flatten gal took : 4 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :Res
Symmetric sort wr.t. initial detected :Res
Symmetric sort wr.t. initial and guards detected :Res
Applying symmetric unfolding of full symmetric sort :Res domain size was 14
Transition release1 forces synchronizations/join behavior on parameter p of sort Proc
[2023-03-10 22:52:27] [INFO ] Unfolded HLPN to a Petri net with 29 places and 49 transitions 203 arcs in 25 ms.
[2023-03-10 22:52:27] [INFO ] Unfolded 14 HLPN properties in 1 ms.
Initial state reduction rules removed 2 formulas.
FORMULA GlobalResAllocation-COL-07-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-07-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 29 out of 29 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 49/49 transitions.
Reduce isomorphic (modulo) transitions removed 14 transitions.
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 29 transition count 42
Applied a total of 14 rules in 15 ms. Remains 29 /29 variables (removed 0) and now considering 42/49 (removed 7) transitions.
// Phase 1: matrix 42 rows 29 cols
[2023-03-10 22:52:27] [INFO ] Computed 15 place invariants in 12 ms
[2023-03-10 22:52:27] [INFO ] Dead Transitions using invariants and state equation in 354 ms found 0 transitions.
[2023-03-10 22:52:27] [INFO ] Invariant cache hit.
[2023-03-10 22:52:27] [INFO ] Implicit Places using invariants in 50 ms returned []
[2023-03-10 22:52:27] [INFO ] Invariant cache hit.
[2023-03-10 22:52:28] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 138 ms to find 0 implicit places.
[2023-03-10 22:52:28] [INFO ] Invariant cache hit.
[2023-03-10 22:52:28] [INFO ] Dead Transitions using invariants and state equation in 113 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 29/29 places, 42/49 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 676 ms. Remains : 29/29 places, 42/49 transitions.
Support contains 29 out of 29 places after structural reductions.
[2023-03-10 22:52:28] [INFO ] Flatten gal took : 22 ms
[2023-03-10 22:52:28] [INFO ] Flatten gal took : 24 ms
[2023-03-10 22:52:28] [INFO ] Input system was already deterministic with 42 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 502 ms. (steps per millisecond=19 ) properties (out of 19) seen :17
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-10 22:52:29] [INFO ] Invariant cache hit.
[2023-03-10 22:52:29] [INFO ] After 32ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 12 simplifications.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 9 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 12 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 7 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
[2023-03-10 22:52:29] [INFO ] Invariant cache hit.
[2023-03-10 22:52:29] [INFO ] Dead Transitions using invariants and state equation in 67 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 75 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 5 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 6 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Ensure Unique test removed 7 places
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 22 transition count 42
Applied a total of 7 rules in 3 ms. Remains 22 /29 variables (removed 7) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 22 cols
[2023-03-10 22:52:29] [INFO ] Computed 8 place invariants in 2 ms
[2023-03-10 22:52:29] [INFO ] Dead Transitions using invariants and state equation in 79 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 86 ms. Remains : 22/29 places, 42/42 transitions.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 7 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 8 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 29 cols
[2023-03-10 22:52:29] [INFO ] Computed 15 place invariants in 2 ms
[2023-03-10 22:52:29] [INFO ] Dead Transitions using invariants and state equation in 117 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 123 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 8 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 8 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Ensure Unique test removed 7 places
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 22 transition count 42
Applied a total of 7 rules in 2 ms. Remains 22 /29 variables (removed 7) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 22 cols
[2023-03-10 22:52:29] [INFO ] Computed 8 place invariants in 1 ms
[2023-03-10 22:52:29] [INFO ] Dead Transitions using invariants and state equation in 84 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 89 ms. Remains : 22/29 places, 42/42 transitions.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 6 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 5 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 29 cols
[2023-03-10 22:52:29] [INFO ] Computed 15 place invariants in 2 ms
[2023-03-10 22:52:29] [INFO ] Dead Transitions using invariants and state equation in 102 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 107 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
[2023-03-10 22:52:29] [INFO ] Invariant cache hit.
[2023-03-10 22:52:29] [INFO ] Dead Transitions using invariants and state equation in 57 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:29] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:29] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Ensure Unique test removed 7 places
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 22 transition count 42
Applied a total of 7 rules in 1 ms. Remains 22 /29 variables (removed 7) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 22 cols
[2023-03-10 22:52:29] [INFO ] Computed 8 place invariants in 1 ms
[2023-03-10 22:52:30] [INFO ] Dead Transitions using invariants and state equation in 52 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 22/29 places, 42/42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 2 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 29 cols
[2023-03-10 22:52:30] [INFO ] Computed 15 place invariants in 5 ms
[2023-03-10 22:52:30] [INFO ] Dead Transitions using invariants and state equation in 64 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 67 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 11 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:52:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Ensure Unique test removed 7 places
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 22 transition count 42
Applied a total of 7 rules in 2 ms. Remains 22 /29 variables (removed 7) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 22 cols
[2023-03-10 22:52:30] [INFO ] Computed 8 place invariants in 1 ms
[2023-03-10 22:52:30] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 22/29 places, 42/42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 29 cols
[2023-03-10 22:52:30] [INFO ] Computed 15 place invariants in 1 ms
[2023-03-10 22:52:30] [INFO ] Dead Transitions using invariants and state equation in 49 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 51 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
[2023-03-10 22:52:30] [INFO ] Invariant cache hit.
[2023-03-10 22:52:30] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:52:30] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 29/29 places, 42/42 transitions.
Applied a total of 0 rules in 0 ms. Remains 29 /29 variables (removed 0) and now considering 42/42 (removed 0) transitions.
[2023-03-10 22:52:30] [INFO ] Invariant cache hit.
[2023-03-10 22:52:30] [INFO ] Dead Transitions using invariants and state equation in 58 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60 ms. Remains : 29/29 places, 42/42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 5 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 5 ms
[2023-03-10 22:52:30] [INFO ] Input system was already deterministic with 42 transitions.
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 9 ms
[2023-03-10 22:52:30] [INFO ] Flatten gal took : 8 ms
[2023-03-10 22:52:30] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 12 ms.
[2023-03-10 22:52:30] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 29 places, 42 transitions and 175 arcs took 1 ms.
Total runtime 4703 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GlobalResAllocation-COL-07
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA GlobalResAllocation-COL-07-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-07-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678488757708

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 30 (type EXCL) for 29 GlobalResAllocation-COL-07-CTLFireability-10
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 30 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-10
lola: result : false
lola: markings : 125
lola: fired transitions : 431
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 43 (type EXCL) for 32 GlobalResAllocation-COL-07-CTLFireability-11
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 43 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-11
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 54 (type EXCL) for 53 GlobalResAllocation-COL-07-CTLFireability-15
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-15
lola: result : false
lola: markings : 213364
lola: fired transitions : 2334266
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 GlobalResAllocation-COL-07-CTLFireability-13
lola: time limit : 327 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-07-CTLFireability-10: CTL false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-11: CONJ false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-07-CTLFireability-00: F 0 1 0 0 1 0 0 0
GlobalResAllocation-COL-07-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-COL-07-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-COL-07-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
GlobalResAllocation-COL-07-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-COL-07-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-COL-07-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
GlobalResAllocation-COL-07-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-COL-07-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 3/327 1/32 GlobalResAllocation-COL-07-CTLFireability-13 213346 m, 42669 m/sec, 1963565 t fired, .

Time elapsed: 6 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 12
lola: FINISHED task # 51 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-13
lola: result : true
lola: markings : 213364
lola: fired transitions : 2332107
lola: time used : 3.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 GlobalResAllocation-COL-07-CTLFireability-12
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-12
lola: result : true
lola: markings : 2
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 22 GlobalResAllocation-COL-07-CTLFireability-08
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-08
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 GlobalResAllocation-COL-07-CTLFireability-07
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-07
lola: result : false
lola: markings : 65
lola: fired transitions : 127
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 GlobalResAllocation-COL-07-CTLFireability-05
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-05
lola: result : false
lola: markings : 17
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 9 GlobalResAllocation-COL-07-CTLFireability-04
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-04
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 GlobalResAllocation-COL-07-CTLFireability-02
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-02
lola: result : true
lola: markings : 28
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 GlobalResAllocation-COL-07-CTLFireability-01
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-01
lola: result : false
lola: markings : 176
lola: fired transitions : 181
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 22 GlobalResAllocation-COL-07-CTLFireability-08
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-08
lola: result : true
lola: markings : 18
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 0 GlobalResAllocation-COL-07-CTLFireability-00
lola: time limit : 3594 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for GlobalResAllocation-COL-07-CTLFireability-00
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-07-CTLFireability-00: F true state space / EG
GlobalResAllocation-COL-07-CTLFireability-01: CTL false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-02: CTL true CTL model checker
GlobalResAllocation-COL-07-CTLFireability-04: DISJ true state space /EXEF
GlobalResAllocation-COL-07-CTLFireability-05: CTL false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-07: CTL false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-08: DISJ true state space / EG
GlobalResAllocation-COL-07-CTLFireability-10: CTL false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-11: CONJ false CTL model checker
GlobalResAllocation-COL-07-CTLFireability-12: CTL true CTL model checker
GlobalResAllocation-COL-07-CTLFireability-13: CTL true CTL model checker
GlobalResAllocation-COL-07-CTLFireability-15: CTL false CTL model checker


Time elapsed: 6 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-07"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GlobalResAllocation-COL-07, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345600186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-07.tgz
mv GlobalResAllocation-COL-07 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;