Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345600178.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GlobalResAllocation-COL-06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345600178
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 9.3K Feb 25 16:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 16:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 16:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 16:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 16:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Feb 25 16:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 16:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 25 16:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 28K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-00
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-01
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-02
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-03
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-04
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-05
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-06
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-07
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-08
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-09
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-10
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-11
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-12
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-13
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-14
FORMULA_NAME GlobalResAllocation-COL-06-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678488370135

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GlobalResAllocation-COL-06
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 22:46:12] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 22:46:13] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 22:46:13] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 22:46:13] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 22:46:14] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1109 ms
[2023-03-10 22:46:14] [INFO ] Imported 5 HL places and 7 HL transitions for a total of 102 PT places and 136662.0 transition bindings in 27 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
[2023-03-10 22:46:14] [INFO ] Built PT skeleton of HLPN with 5 places and 7 transitions 29 arcs in 5 ms.
[2023-03-10 22:46:14] [INFO ] Skeletonized 16 HLPN properties in 15 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
All 16 properties of the HLPN use transition enablings in a way that makes the skeleton too coarse.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Res
Symmetric sort wr.t. initial detected :Res
Symmetric sort wr.t. initial and guards detected :Res
Applying symmetric unfolding of full symmetric sort :Res domain size was 12
Transition release1 forces synchronizations/join behavior on parameter p of sort Proc
[2023-03-10 22:46:14] [INFO ] Unfolded HLPN to a Petri net with 25 places and 42 transitions 174 arcs in 16 ms.
[2023-03-10 22:46:14] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Initial state reduction rules removed 4 formulas.
FORMULA GlobalResAllocation-COL-06-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 25 out of 25 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 42/42 transitions.
Reduce isomorphic (modulo) transitions removed 12 transitions.
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 25 transition count 36
Applied a total of 12 rules in 8 ms. Remains 25 /25 variables (removed 0) and now considering 36/42 (removed 6) transitions.
// Phase 1: matrix 36 rows 25 cols
[2023-03-10 22:46:14] [INFO ] Computed 13 place invariants in 7 ms
[2023-03-10 22:46:14] [INFO ] Dead Transitions using invariants and state equation in 224 ms found 0 transitions.
[2023-03-10 22:46:14] [INFO ] Invariant cache hit.
[2023-03-10 22:46:14] [INFO ] Implicit Places using invariants in 30 ms returned []
[2023-03-10 22:46:14] [INFO ] Invariant cache hit.
[2023-03-10 22:46:14] [INFO ] Implicit Places using invariants and state equation in 59 ms returned []
Implicit Place search using SMT with State Equation took 91 ms to find 0 implicit places.
[2023-03-10 22:46:14] [INFO ] Invariant cache hit.
[2023-03-10 22:46:14] [INFO ] Dead Transitions using invariants and state equation in 55 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 25/25 places, 36/42 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 416 ms. Remains : 25/25 places, 36/42 transitions.
Support contains 25 out of 25 places after structural reductions.
[2023-03-10 22:46:14] [INFO ] Flatten gal took : 29 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 21 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Finished random walk after 268 steps, including 0 resets, run visited all 22 properties in 57 ms. (steps per millisecond=4 )
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 12 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 19 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
[2023-03-10 22:46:15] [INFO ] Invariant cache hit.
[2023-03-10 22:46:15] [INFO ] Dead Transitions using invariants and state equation in 76 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 78 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 6 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Ensure Unique test removed 6 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 19 transition count 36
Applied a total of 6 rules in 2 ms. Remains 19 /25 variables (removed 6) and now considering 36/36 (removed 0) transitions.
// Phase 1: matrix 36 rows 19 cols
[2023-03-10 22:46:15] [INFO ] Computed 7 place invariants in 2 ms
[2023-03-10 22:46:15] [INFO ] Dead Transitions using invariants and state equation in 71 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 86 ms. Remains : 19/25 places, 36/36 transitions.
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
// Phase 1: matrix 36 rows 25 cols
[2023-03-10 22:46:15] [INFO ] Computed 13 place invariants in 1 ms
[2023-03-10 22:46:15] [INFO ] Dead Transitions using invariants and state equation in 74 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 76 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Ensure Unique test removed 6 places
Applied a total of 0 rules in 6 ms. Remains 19 /25 variables (removed 6) and now considering 36/36 (removed 0) transitions.
// Phase 1: matrix 36 rows 19 cols
[2023-03-10 22:46:15] [INFO ] Computed 7 place invariants in 2 ms
[2023-03-10 22:46:15] [INFO ] Dead Transitions using invariants and state equation in 72 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 79 ms. Remains : 19/25 places, 36/36 transitions.
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Finished random walk after 4 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=2 )
FORMULA GlobalResAllocation-COL-06-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Ensure Unique test removed 6 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 19 transition count 36
Applied a total of 6 rules in 2 ms. Remains 19 /25 variables (removed 6) and now considering 36/36 (removed 0) transitions.
[2023-03-10 22:46:15] [INFO ] Invariant cache hit.
[2023-03-10 22:46:15] [INFO ] Dead Transitions using invariants and state equation in 57 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59 ms. Remains : 19/25 places, 36/36 transitions.
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:15] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
// Phase 1: matrix 36 rows 25 cols
[2023-03-10 22:46:15] [INFO ] Computed 13 place invariants in 2 ms
[2023-03-10 22:46:15] [INFO ] Dead Transitions using invariants and state equation in 64 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 66 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:15] [INFO ] Flatten gal took : 4 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
[2023-03-10 22:46:16] [INFO ] Invariant cache hit.
[2023-03-10 22:46:16] [INFO ] Dead Transitions using invariants and state equation in 54 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
[2023-03-10 22:46:16] [INFO ] Invariant cache hit.
[2023-03-10 22:46:16] [INFO ] Dead Transitions using invariants and state equation in 51 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
[2023-03-10 22:46:16] [INFO ] Invariant cache hit.
[2023-03-10 22:46:16] [INFO ] Dead Transitions using invariants and state equation in 47 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Ensure Unique test removed 6 places
Applied a total of 0 rules in 3 ms. Remains 19 /25 variables (removed 6) and now considering 36/36 (removed 0) transitions.
// Phase 1: matrix 36 rows 19 cols
[2023-03-10 22:46:16] [INFO ] Computed 7 place invariants in 1 ms
[2023-03-10 22:46:16] [INFO ] Dead Transitions using invariants and state equation in 44 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 48 ms. Remains : 19/25 places, 36/36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 0 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
// Phase 1: matrix 36 rows 25 cols
[2023-03-10 22:46:16] [INFO ] Computed 13 place invariants in 1 ms
[2023-03-10 22:46:16] [INFO ] Dead Transitions using invariants and state equation in 54 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 56 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 2 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 36/36 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 36/36 (removed 0) transitions.
[2023-03-10 22:46:16] [INFO ] Invariant cache hit.
[2023-03-10 22:46:16] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 49 ms. Remains : 25/25 places, 36/36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 3 ms
[2023-03-10 22:46:16] [INFO ] Input system was already deterministic with 36 transitions.
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 5 ms
[2023-03-10 22:46:16] [INFO ] Flatten gal took : 5 ms
[2023-03-10 22:46:16] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 10 ms.
[2023-03-10 22:46:16] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 25 places, 36 transitions and 150 arcs took 0 ms.
Total runtime 3516 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GlobalResAllocation-COL-06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA GlobalResAllocation-COL-06-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-06-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678488379113

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 112 (type EXCL) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 69 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 110 (type FNDP) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 111 (type EQUN) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 113 (type SRCH) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 112 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-09
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 110 (type FNDP) for GlobalResAllocation-COL-06-CTLFireability-09 (obsolete)
lola: CANCELED task # 111 (type EQUN) for GlobalResAllocation-COL-06-CTLFireability-09 (obsolete)
lola: CANCELED task # 113 (type SRCH) for GlobalResAllocation-COL-06-CTLFireability-09 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 110 (type FNDP) for GlobalResAllocation-COL-06-CTLFireability-09
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 27 (type EXCL) for 20 GlobalResAllocation-COL-06-CTLFireability-06
lola: time limit : 79 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 27 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-06
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 40 (type EXCL) for 39 GlobalResAllocation-COL-06-CTLFireability-07
lola: time limit : 94 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-07
lola: result : true
lola: markings : 29
lola: fired transitions : 64
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 114 (type EXCL) for 42 GlobalResAllocation-COL-06-CTLFireability-08
lola: time limit : 99 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 114 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 115 (type EXCL) for 74 GlobalResAllocation-COL-06-CTLFireability-14
lola: time limit : 105 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 115 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-14
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH task # 10 (type EXCL) for 3 GlobalResAllocation-COL-06-CTLFireability-01
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 10 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-01
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 116 (type EXCL) for 3 GlobalResAllocation-COL-06-CTLFireability-01
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 116 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-01
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 GlobalResAllocation-COL-06-CTLFireability-00
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
sara: try reading problem file /home/mcc/execution/374/CTLFireability-111.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 117 (type FNDP) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type EQUN) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SRCH) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 117 (type FNDP) for GlobalResAllocation-COL-06-CTLFireability-09
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 118 (type EQUN) for GlobalResAllocation-COL-06-CTLFireability-09 (obsolete)
lola: CANCELED task # 120 (type SRCH) for GlobalResAllocation-COL-06-CTLFireability-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/374/CTLFireability-118.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 1 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-00
lola: result : true
lola: markings : 10679
lola: fired transitions : 32002
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 74 GlobalResAllocation-COL-06-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 79 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-14
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 72 (type EXCL) for 71 GlobalResAllocation-COL-06-CTLFireability-13
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 72 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-13
lola: result : false
lola: markings : 823
lola: fired transitions : 1505
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 49 GlobalResAllocation-COL-06-CTLFireability-09
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-09
lola: result : true
lola: markings : 19
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 42 GlobalResAllocation-COL-06-CTLFireability-08
lola: time limit : 719 sec
lola: memory limit: 32 pages

lola: FINISHED task # 118 (type EQUN) for GlobalResAllocation-COL-06-CTLFireability-09
lola: result : true
lola: FINISHED task # 45 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-08
lola: result : true
lola: markings : 35072
lola: fired transitions : 337781
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 GlobalResAllocation-COL-06-CTLFireability-05
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-05
lola: result : true
lola: markings : 109
lola: fired transitions : 161
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 14 GlobalResAllocation-COL-06-CTLFireability-02
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-02
lola: result : true
lola: markings : 28
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 12 (type EXCL) for 3 GlobalResAllocation-COL-06-CTLFireability-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-01
lola: result : false
lola: markings : 24
lola: fired transitions : 47
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 121 (type EXCL) for 68 GlobalResAllocation-COL-06-CTLFireability-12
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 121 (type EXCL) for GlobalResAllocation-COL-06-CTLFireability-12
lola: result : true
lola: markings : 35072
lola: fired transitions : 294442
lola: time used : 1.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-06-CTLFireability-00: CTL true CTL model checker
GlobalResAllocation-COL-06-CTLFireability-01: CONJ false CONJ
GlobalResAllocation-COL-06-CTLFireability-02: CTL true CTL model checker
GlobalResAllocation-COL-06-CTLFireability-05: CTL true CTL model checker
GlobalResAllocation-COL-06-CTLFireability-06: CONJ false CTL model checker
GlobalResAllocation-COL-06-CTLFireability-07: CTL true CTL model checker
GlobalResAllocation-COL-06-CTLFireability-08: CONJ true CONJ
GlobalResAllocation-COL-06-CTLFireability-09: CONJ true CONJ
GlobalResAllocation-COL-06-CTLFireability-12: EFAG false tscc_search
GlobalResAllocation-COL-06-CTLFireability-13: CTL false CTL model checker
GlobalResAllocation-COL-06-CTLFireability-14: DISJ false DISJ


Time elapsed: 2 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GlobalResAllocation-COL-06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345600178"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-06.tgz
mv GlobalResAllocation-COL-06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;