Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345600146.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GPUForwardProgress-PT-40a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345600146
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 8.8K Feb 25 14:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 104K Feb 25 14:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 14:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 25 14:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 14:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 129K Feb 25 14:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 25 14:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Feb 25 14:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 62K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-00
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-01
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-02
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-03
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-04
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-05
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-06
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-07
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-08
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-09
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-10
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-11
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-12
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-13
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-14
FORMULA_NAME GPUForwardProgress-PT-40a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678484387052

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-40a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 21:39:50] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 21:39:50] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 21:39:50] [INFO ] Load time of PNML (sax parser for PT used): 126 ms
[2023-03-10 21:39:50] [INFO ] Transformed 168 places.
[2023-03-10 21:39:50] [INFO ] Transformed 209 transitions.
[2023-03-10 21:39:50] [INFO ] Found NUPN structural information;
[2023-03-10 21:39:50] [INFO ] Parsed PT model containing 168 places and 209 transitions and 821 arcs in 276 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 42 transitions
Reduce redundant transitions removed 42 transitions.
FORMULA GPUForwardProgress-PT-40a-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GPUForwardProgress-PT-40a-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 61 out of 168 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 167/167 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 167 transition count 167
Applied a total of 1 rules in 41 ms. Remains 167 /168 variables (removed 1) and now considering 167/167 (removed 0) transitions.
// Phase 1: matrix 167 rows 167 cols
[2023-03-10 21:39:50] [INFO ] Computed 41 place invariants in 26 ms
[2023-03-10 21:39:51] [INFO ] Implicit Places using invariants in 565 ms returned []
[2023-03-10 21:39:51] [INFO ] Invariant cache hit.
[2023-03-10 21:39:51] [INFO ] State equation strengthened by 41 read => feed constraints.
[2023-03-10 21:39:51] [INFO ] Implicit Places using invariants and state equation in 492 ms returned []
Implicit Place search using SMT with State Equation took 1112 ms to find 0 implicit places.
[2023-03-10 21:39:51] [INFO ] Invariant cache hit.
[2023-03-10 21:39:52] [INFO ] Dead Transitions using invariants and state equation in 251 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 167/168 places, 167/167 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1418 ms. Remains : 167/168 places, 167/167 transitions.
Support contains 61 out of 167 places after structural reductions.
[2023-03-10 21:39:52] [INFO ] Flatten gal took : 66 ms
[2023-03-10 21:39:52] [INFO ] Flatten gal took : 28 ms
[2023-03-10 21:39:52] [INFO ] Input system was already deterministic with 167 transitions.
Incomplete random walk after 10000 steps, including 19 resets, run finished after 545 ms. (steps per millisecond=18 ) properties (out of 61) seen :58
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-10 21:39:53] [INFO ] Invariant cache hit.
[2023-03-10 21:39:53] [INFO ] [Real]Absence check using 0 positive and 41 generalized place invariants in 13 ms returned sat
[2023-03-10 21:39:53] [INFO ] After 295ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:2
[2023-03-10 21:39:53] [INFO ] [Nat]Absence check using 0 positive and 41 generalized place invariants in 14 ms returned sat
[2023-03-10 21:39:54] [INFO ] After 211ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :2
[2023-03-10 21:39:54] [INFO ] State equation strengthened by 41 read => feed constraints.
[2023-03-10 21:39:54] [INFO ] After 107ms SMT Verify possible using 41 Read/Feed constraints in natural domain returned unsat :1 sat :2
[2023-03-10 21:39:54] [INFO ] After 211ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :2
Attempting to minimize the solution found.
Minimization took 99 ms.
[2023-03-10 21:39:54] [INFO ] After 667ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :2
Fused 3 Parikh solutions to 2 different solutions.
Finished Parikh walk after 159 steps, including 0 resets, run visited all 2 properties in 12 ms. (steps per millisecond=13 )
Parikh walk visited 2 properties in 27 ms.
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 23 ms
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 25 ms
[2023-03-10 21:39:54] [INFO ] Input system was already deterministic with 167 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Graph (complete) has 536 edges and 167 vertex of which 126 are kept as prefixes of interest. Removing 41 places using SCC suffix rule.6 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Graph (complete) has 536 edges and 167 vertex of which 126 are kept as prefixes of interest. Removing 41 places using SCC suffix rule.3 ms
Discarding 41 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Performed 35 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 35 Pre rules applied. Total rules applied 1 place count 126 transition count 131
Deduced a syphon composed of 35 places in 0 ms
Reduce places removed 35 places and 0 transitions.
Iterating global reduction 0 with 70 rules applied. Total rules applied 71 place count 91 transition count 131
Applied a total of 71 rules in 40 ms. Remains 91 /167 variables (removed 76) and now considering 131/167 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 41 ms. Remains : 91/167 places, 131/167 transitions.
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 16 ms
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:39:54] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 16 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:39:54] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 14 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:39:54] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Graph (complete) has 536 edges and 167 vertex of which 126 are kept as prefixes of interest. Removing 41 places using SCC suffix rule.2 ms
Discarding 41 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Performed 39 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 39 Pre rules applied. Total rules applied 1 place count 125 transition count 126
Deduced a syphon composed of 39 places in 0 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 0 with 78 rules applied. Total rules applied 79 place count 86 transition count 126
Applied a total of 79 rules in 22 ms. Remains 86 /167 variables (removed 81) and now considering 126/167 (removed 41) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 86/167 places, 126/167 transitions.
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 11 ms
[2023-03-10 21:39:54] [INFO ] Flatten gal took : 13 ms
[2023-03-10 21:39:54] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 5 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 16 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 4 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 15 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 16 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 15 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 22 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 10 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 10 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 167/167 transitions.
Applied a total of 0 rules in 3 ms. Remains 167 /167 variables (removed 0) and now considering 167/167 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 167/167 places, 167/167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:39:55] [INFO ] Input system was already deterministic with 167 transitions.
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:39:55] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-10 21:39:55] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 167 places, 167 transitions and 735 arcs took 2 ms.
Total runtime 5317 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GPUForwardProgress-PT-40a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
CTLFireability

FORMULA GPUForwardProgress-PT-40a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678484642496

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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16 CTL EXCL 5/695 5/32 GPUForwardProgress-PT-40a-CTLFireability-05 965982 m, 193196 m/sec, 2787406 t fired, .

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16 CTL EXCL 10/695 10/32 GPUForwardProgress-PT-40a-CTLFireability-05 1881496 m, 183102 m/sec, 5507771 t fired, .

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16 CTL EXCL 15/695 14/32 GPUForwardProgress-PT-40a-CTLFireability-05 2765321 m, 176765 m/sec, 8153979 t fired, .

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16 CTL EXCL 20/695 17/32 GPUForwardProgress-PT-40a-CTLFireability-05 3633601 m, 173656 m/sec, 10787158 t fired, .

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16 CTL EXCL 25/695 21/32 GPUForwardProgress-PT-40a-CTLFireability-05 4506144 m, 174508 m/sec, 13432362 t fired, .

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16 CTL EXCL 35/695 28/32 GPUForwardProgress-PT-40a-CTLFireability-05 6211879 m, 168705 m/sec, 18695324 t fired, .

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16 CTL EXCL 40/695 32/32 GPUForwardProgress-PT-40a-CTLFireability-05 7089007 m, 175425 m/sec, 21303429 t fired, .

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7 CTL EXCL 35/1144 15/32 GPUForwardProgress-PT-40a-CTLFireability-02 3037753 m, 76263 m/sec, 17281946 t fired, .

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7 CTL EXCL 40/1144 17/32 GPUForwardProgress-PT-40a-CTLFireability-02 3474183 m, 87286 m/sec, 19863669 t fired, .

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7 CTL EXCL 45/1144 19/32 GPUForwardProgress-PT-40a-CTLFireability-02 3918768 m, 88917 m/sec, 22391032 t fired, .

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7 CTL EXCL 50/1144 21/32 GPUForwardProgress-PT-40a-CTLFireability-02 4344395 m, 85125 m/sec, 24810472 t fired, .

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7 CTL EXCL 55/1144 23/32 GPUForwardProgress-PT-40a-CTLFireability-02 4747835 m, 80688 m/sec, 27223119 t fired, .

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7 CTL EXCL 60/1144 25/32 GPUForwardProgress-PT-40a-CTLFireability-02 5157246 m, 81882 m/sec, 29594361 t fired, .

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-40a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GPUForwardProgress-PT-40a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345600146"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-40a.tgz
mv GPUForwardProgress-PT-40a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;