Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345500082.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GPUForwardProgress-PT-24a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345500082
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 7.6K Feb 25 14:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 25 14:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 14:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 14:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:11 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:11 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 25 14:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 14:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K Feb 25 14:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 38K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-00
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-01
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-02
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-03
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-04
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-05
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-06
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-07
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-08
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-09
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-10
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-11
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-12
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-13
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-14
FORMULA_NAME GPUForwardProgress-PT-24a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678471836921

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-24a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 18:10:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 18:10:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 18:10:40] [INFO ] Load time of PNML (sax parser for PT used): 98 ms
[2023-03-10 18:10:40] [INFO ] Transformed 104 places.
[2023-03-10 18:10:40] [INFO ] Transformed 129 transitions.
[2023-03-10 18:10:40] [INFO ] Found NUPN structural information;
[2023-03-10 18:10:40] [INFO ] Parsed PT model containing 104 places and 129 transitions and 501 arcs in 247 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
Ensure Unique test removed 26 transitions
Reduce redundant transitions removed 26 transitions.
Support contains 90 out of 104 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Applied a total of 0 rules in 24 ms. Remains 104 /104 variables (removed 0) and now considering 103/103 (removed 0) transitions.
// Phase 1: matrix 103 rows 104 cols
[2023-03-10 18:10:41] [INFO ] Computed 26 place invariants in 12 ms
[2023-03-10 18:10:41] [INFO ] Implicit Places using invariants in 377 ms returned []
[2023-03-10 18:10:41] [INFO ] Invariant cache hit.
[2023-03-10 18:10:41] [INFO ] State equation strengthened by 25 read => feed constraints.
[2023-03-10 18:10:41] [INFO ] Implicit Places using invariants and state equation in 237 ms returned []
Implicit Place search using SMT with State Equation took 673 ms to find 0 implicit places.
[2023-03-10 18:10:41] [INFO ] Invariant cache hit.
[2023-03-10 18:10:41] [INFO ] Dead Transitions using invariants and state equation in 236 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 937 ms. Remains : 104/104 places, 103/103 transitions.
Support contains 90 out of 104 places after structural reductions.
[2023-03-10 18:10:42] [INFO ] Flatten gal took : 64 ms
[2023-03-10 18:10:42] [INFO ] Flatten gal took : 29 ms
[2023-03-10 18:10:42] [INFO ] Input system was already deterministic with 103 transitions.
Incomplete random walk after 10000 steps, including 24 resets, run finished after 519 ms. (steps per millisecond=19 ) properties (out of 63) seen :62
Incomplete Best-First random walk after 10001 steps, including 79 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-10 18:10:43] [INFO ] Invariant cache hit.
[2023-03-10 18:10:43] [INFO ] [Real]Absence check using 0 positive and 26 generalized place invariants in 16 ms returned sat
[2023-03-10 18:10:43] [INFO ] After 87ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 18:10:43] [INFO ] State equation strengthened by 25 read => feed constraints.
[2023-03-10 18:10:43] [INFO ] After 28ms SMT Verify possible using 25 Read/Feed constraints in real domain returned unsat :0 sat :1
[2023-03-10 18:10:43] [INFO ] After 61ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 28 ms.
[2023-03-10 18:10:43] [INFO ] After 283ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 26 out of 104 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 104/104 places, 103/103 transitions.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 104 transition count 102
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 24 Pre rules applied. Total rules applied 1 place count 104 transition count 78
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 1 with 48 rules applied. Total rules applied 49 place count 80 transition count 78
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 1 with 4 rules applied. Total rules applied 53 place count 78 transition count 76
Partial Free-agglomeration rule applied 24 times.
Drop transitions removed 24 transitions
Iterating global reduction 1 with 24 rules applied. Total rules applied 77 place count 78 transition count 76
Drop transitions removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 101 place count 78 transition count 52
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 102 place count 77 transition count 51
Applied a total of 102 rules in 48 ms. Remains 77 /104 variables (removed 27) and now considering 51/103 (removed 52) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 48 ms. Remains : 77/104 places, 51/103 transitions.
Incomplete random walk after 10000 steps, including 767 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 185 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Finished probabilistic random walk after 1017 steps, run visited all 1 properties in 21 ms. (steps per millisecond=48 )
Probabilistic random walk after 1017 steps, saw 925 distinct states, run finished after 21 ms. (steps per millisecond=48 ) properties seen :1
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 11 ms
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 12 ms
[2023-03-10 18:10:43] [INFO ] Input system was already deterministic with 103 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Graph (complete) has 330 edges and 104 vertex of which 78 are kept as prefixes of interest. Removing 26 places using SCC suffix rule.3 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Graph (complete) has 330 edges and 104 vertex of which 78 are kept as prefixes of interest. Removing 26 places using SCC suffix rule.1 ms
Discarding 26 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Performed 20 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 20 Pre rules applied. Total rules applied 1 place count 78 transition count 82
Deduced a syphon composed of 20 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 0 with 40 rules applied. Total rules applied 41 place count 58 transition count 82
Applied a total of 41 rules in 18 ms. Remains 58 /104 variables (removed 46) and now considering 82/103 (removed 21) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 58/104 places, 82/103 transitions.
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 12 ms
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:43] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 9 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 14 ms
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 15 ms
[2023-03-10 18:10:43] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Applied a total of 0 rules in 5 ms. Remains 104 /104 variables (removed 0) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 104/104 places, 103/103 transitions.
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:43] [INFO ] Flatten gal took : 14 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 9 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 9 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 12 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Graph (complete) has 330 edges and 104 vertex of which 78 are kept as prefixes of interest. Removing 26 places using SCC suffix rule.1 ms
Discarding 26 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Performed 22 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 22 Pre rules applied. Total rules applied 1 place count 78 transition count 80
Deduced a syphon composed of 22 places in 0 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 0 with 44 rules applied. Total rules applied 45 place count 56 transition count 80
Applied a total of 45 rules in 18 ms. Remains 56 /104 variables (removed 48) and now considering 80/103 (removed 23) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 56/104 places, 80/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 9 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 11 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 9 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 13 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 4 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 8 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 8 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 4 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 7 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 8 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Graph (complete) has 330 edges and 104 vertex of which 78 are kept as prefixes of interest. Removing 26 places using SCC suffix rule.1 ms
Discarding 26 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Performed 22 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 22 Pre rules applied. Total rules applied 1 place count 77 transition count 79
Deduced a syphon composed of 22 places in 0 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 0 with 44 rules applied. Total rules applied 45 place count 55 transition count 79
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 47 place count 54 transition count 78
Applied a total of 47 rules in 14 ms. Remains 54 /104 variables (removed 50) and now considering 78/103 (removed 25) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 54/104 places, 78/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 4 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 5 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Graph (complete) has 330 edges and 104 vertex of which 78 are kept as prefixes of interest. Removing 26 places using SCC suffix rule.1 ms
Discarding 26 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Performed 19 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 19 Pre rules applied. Total rules applied 1 place count 78 transition count 83
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 0 with 38 rules applied. Total rules applied 39 place count 59 transition count 83
Applied a total of 39 rules in 10 ms. Remains 59 /104 variables (removed 45) and now considering 83/103 (removed 20) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 59/104 places, 83/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 7 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 7 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 83 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 2 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 7 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 2 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 2 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 7 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 103 transition count 103
Applied a total of 1 rules in 2 ms. Remains 103 /104 variables (removed 1) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 103/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 103/103 transitions.
Applied a total of 0 rules in 2 ms. Remains 104 /104 variables (removed 0) and now considering 103/103 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 104/104 places, 103/103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 5 ms
[2023-03-10 18:10:44] [INFO ] Input system was already deterministic with 103 transitions.
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 18:10:44] [INFO ] Flatten gal took : 7 ms
[2023-03-10 18:10:44] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-10 18:10:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 104 places, 103 transitions and 449 arcs took 2 ms.
Total runtime 4016 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GPUForwardProgress-PT-24a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA GPUForwardProgress-PT-24a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-24a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678472086529

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 19 (type EXCL) for 18 GPUForwardProgress-PT-24a-CTLFireability-06
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 64 (type SKEL/SRCH) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SKEL/SRCH) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type SKEL/FNDP) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 68 (type SKEL/SRCH) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 68 (type SKEL/SRCH) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 66 (type FNDP) for GPUForwardProgress-PT-24a-CTLFireability-12 (obsolete)
lola: CANCELED task # 67 (type EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12 (obsolete)
lola: LAUNCH task # 71 (type SKEL/FNDP) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/EQUN) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/SRCH) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/FNDP) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SKEL/SRCH) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for GPUForwardProgress-PT-24a-CTLFireability-12 (obsolete)
lola: CANCELED task # 72 (type EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12 (obsolete)
sara: try reading problem file /home/mcc/execution/375/CTLFireability-67.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/375/CTLFireability-72.sara.
lola: NOTDEADLOCKFREE
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.

lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 71 (type SKEL/FNDP) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 67 (type SKEL/EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: FINISHED task # 72 (type SKEL/EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 75 (type FNDP) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SRCH) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SRCH) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 75 (type FNDP) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 76 (type EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12 (obsolete)
lola: FINISHED task # 76 (type EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 79 (type FNDP) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type EQUN) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SRCH) for 40 GPUForwardProgress-PT-24a-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 82 (type SRCH) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 79 (type FNDP) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 80 (type EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12 (obsolete)
lola: FINISHED task # 80 (type EQUN) for GPUForwardProgress-PT-24a-CTLFireability-12
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-24a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-02: EXEF 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/224 5/32 GPUForwardProgress-PT-24a-CTLFireability-06 1126245 m, 225249 m/sec, 2492003 t fired, .

Time elapsed: 6 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-24a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-02: EXEF 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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22 CTL EXCL 40/356 26/32 GPUForwardProgress-PT-24a-CTLFireability-07 6107913 m, 153238 m/sec, 26856137 t fired, .

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GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

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22 CTL EXCL 45/356 29/32 GPUForwardProgress-PT-24a-CTLFireability-07 6927560 m, 163929 m/sec, 30466514 t fired, .

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22 CTL EXCL 50/356 32/32 GPUForwardProgress-PT-24a-CTLFireability-07 7729981 m, 160484 m/sec, 33990939 t fired, .

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4 CTL EXCL 5/584 4/32 GPUForwardProgress-PT-24a-CTLFireability-01 755210 m, 151042 m/sec, 3450679 t fired, .

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4 CTL EXCL 10/584 7/32 GPUForwardProgress-PT-24a-CTLFireability-01 1534998 m, 155957 m/sec, 7213542 t fired, .

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4 CTL EXCL 15/584 10/32 GPUForwardProgress-PT-24a-CTLFireability-01 2314895 m, 155979 m/sec, 11019473 t fired, .

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4 CTL EXCL 20/584 13/32 GPUForwardProgress-PT-24a-CTLFireability-01 3071779 m, 151376 m/sec, 14821686 t fired, .

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4 CTL EXCL 25/584 16/32 GPUForwardProgress-PT-24a-CTLFireability-01 3803896 m, 146423 m/sec, 18548083 t fired, .

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4 CTL EXCL 30/584 19/32 GPUForwardProgress-PT-24a-CTLFireability-01 4602664 m, 159753 m/sec, 22440165 t fired, .

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4 CTL EXCL 35/584 22/32 GPUForwardProgress-PT-24a-CTLFireability-01 5381452 m, 155757 m/sec, 26310315 t fired, .

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4 CTL EXCL 45/584 29/32 GPUForwardProgress-PT-24a-CTLFireability-01 6883570 m, 157557 m/sec, 33853654 t fired, .

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GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-24a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 70/1727 24/32 GPUForwardProgress-PT-24a-CTLFireability-05 5845054 m, 80319 m/sec, 65338387 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-24a-CTLFireability-02: EXEF true state space /EXEF
GPUForwardProgress-PT-24a-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-24a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 75/1727 26/32 GPUForwardProgress-PT-24a-CTLFireability-05 6296968 m, 90382 m/sec, 70202084 t fired, .

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GPUForwardProgress-PT-24a-CTLFireability-02: EXEF true state space /EXEF
GPUForwardProgress-PT-24a-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 80/1727 28/32 GPUForwardProgress-PT-24a-CTLFireability-05 6726045 m, 85815 m/sec, 75013446 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-24a-CTLFireability-02: EXEF true state space /EXEF
GPUForwardProgress-PT-24a-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 85/1727 30/32 GPUForwardProgress-PT-24a-CTLFireability-05 7184364 m, 91663 m/sec, 80048165 t fired, .

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GPUForwardProgress-PT-24a-CTLFireability-02: EXEF true state space /EXEF
GPUForwardProgress-PT-24a-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 90/1727 31/32 GPUForwardProgress-PT-24a-CTLFireability-05 7604081 m, 83943 m/sec, 84907506 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-24a-CTLFireability-02: EXEF true state space /EXEF
GPUForwardProgress-PT-24a-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-24a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-24a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-24a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 1 (type EXCL) for 0 GPUForwardProgress-PT-24a-CTLFireability-00
lola: time limit : 3359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for GPUForwardProgress-PT-24a-CTLFireability-00
lola: result : true
lola: markings : 703
lola: fired transitions : 1128
lola: time used : 0.000000
lola: memory pages used : 1
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-24a-CTLFireability-00: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-01: CTL unknown AGGR
GPUForwardProgress-PT-24a-CTLFireability-02: EXEF true state space /EXEF
GPUForwardProgress-PT-24a-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-05: CTL unknown AGGR
GPUForwardProgress-PT-24a-CTLFireability-06: CTL unknown AGGR
GPUForwardProgress-PT-24a-CTLFireability-07: CTL unknown AGGR
GPUForwardProgress-PT-24a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-10: CONJ false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-12: CONJ true CONJ
GPUForwardProgress-PT-24a-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-24a-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-24a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GPUForwardProgress-PT-24a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345500082"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-24a.tgz
mv GPUForwardProgress-PT-24a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;