Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345400058.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GPUForwardProgress-PT-16b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345400058
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 540K
-rw-r--r-- 1 mcc users 6.5K Feb 25 14:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 25 14:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 14:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 25 14:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:11 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:11 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 139K Feb 25 14:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 25 14:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Feb 25 14:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 84K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-00
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-01
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-02
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-03
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-04
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-05
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-06
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-07
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-08
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-09
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-10
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-11
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-12
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-13
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-14
FORMULA_NAME GPUForwardProgress-PT-16b-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678470345296

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-16b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 17:45:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 17:45:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 17:45:48] [INFO ] Load time of PNML (sax parser for PT used): 142 ms
[2023-03-10 17:45:48] [INFO ] Transformed 340 places.
[2023-03-10 17:45:48] [INFO ] Transformed 357 transitions.
[2023-03-10 17:45:48] [INFO ] Found NUPN structural information;
[2023-03-10 17:45:48] [INFO ] Parsed PT model containing 340 places and 357 transitions and 877 arcs in 292 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 18 ms.
Support contains 94 out of 340 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 340/340 places, 357/357 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 314 transition count 331
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 314 transition count 331
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 58 place count 308 transition count 325
Iterating global reduction 0 with 6 rules applied. Total rules applied 64 place count 308 transition count 325
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 70 place count 308 transition count 319
Applied a total of 70 rules in 135 ms. Remains 308 /340 variables (removed 32) and now considering 319/357 (removed 38) transitions.
// Phase 1: matrix 319 rows 308 cols
[2023-03-10 17:45:48] [INFO ] Computed 18 place invariants in 42 ms
[2023-03-10 17:45:49] [INFO ] Implicit Places using invariants in 434 ms returned []
[2023-03-10 17:45:49] [INFO ] Invariant cache hit.
[2023-03-10 17:45:49] [INFO ] Implicit Places using invariants and state equation in 508 ms returned []
Implicit Place search using SMT with State Equation took 985 ms to find 0 implicit places.
[2023-03-10 17:45:49] [INFO ] Invariant cache hit.
[2023-03-10 17:45:50] [INFO ] Dead Transitions using invariants and state equation in 525 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 308/340 places, 319/357 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1674 ms. Remains : 308/340 places, 319/357 transitions.
Support contains 94 out of 308 places after structural reductions.
[2023-03-10 17:45:50] [INFO ] Flatten gal took : 114 ms
[2023-03-10 17:45:51] [INFO ] Flatten gal took : 60 ms
[2023-03-10 17:45:51] [INFO ] Input system was already deterministic with 319 transitions.
Incomplete random walk after 10000 steps, including 69 resets, run finished after 1005 ms. (steps per millisecond=9 ) properties (out of 71) seen :57
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 14) seen :1
Incomplete Best-First random walk after 10000 steps, including 8 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 13) seen :3
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-10 17:45:52] [INFO ] Invariant cache hit.
[2023-03-10 17:45:53] [INFO ] [Real]Absence check using 0 positive and 18 generalized place invariants in 25 ms returned sat
[2023-03-10 17:45:53] [INFO ] After 411ms SMT Verify possible using state equation in real domain returned unsat :1 sat :5 real:1
[2023-03-10 17:45:53] [INFO ] After 717ms SMT Verify possible using trap constraints in real domain returned unsat :1 sat :2 real:4
Attempting to minimize the solution found.
Minimization took 78 ms.
[2023-03-10 17:45:53] [INFO ] After 1153ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :2 real:4
[2023-03-10 17:45:54] [INFO ] [Nat]Absence check using 0 positive and 18 generalized place invariants in 20 ms returned sat
[2023-03-10 17:45:54] [INFO ] After 440ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :6
[2023-03-10 17:45:54] [INFO ] After 721ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :6
Attempting to minimize the solution found.
Minimization took 112 ms.
[2023-03-10 17:45:55] [INFO ] After 1137ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :6
Fused 7 Parikh solutions to 6 different solutions.
Parikh walk visited 4 properties in 73 ms.
Support contains 19 out of 308 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 308/308 places, 319/319 transitions.
Graph (trivial) has 266 edges and 308 vertex of which 6 / 308 are part of one of the 1 SCC in 5 ms
Free SCC test removed 5 places
Drop transitions removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Drop transitions removed 153 transitions
Trivial Post-agglo rules discarded 153 transitions
Performed 153 trivial Post agglomeration. Transition count delta: 153
Iterating post reduction 0 with 153 rules applied. Total rules applied 154 place count 303 transition count 159
Reduce places removed 153 places and 0 transitions.
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 167 rules applied. Total rules applied 321 place count 150 transition count 145
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 5 rules applied. Total rules applied 326 place count 146 transition count 144
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 327 place count 145 transition count 144
Performed 33 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 33 Pre rules applied. Total rules applied 327 place count 145 transition count 111
Deduced a syphon composed of 33 places in 0 ms
Reduce places removed 33 places and 0 transitions.
Iterating global reduction 4 with 66 rules applied. Total rules applied 393 place count 112 transition count 111
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 396 place count 109 transition count 108
Iterating global reduction 4 with 3 rules applied. Total rules applied 399 place count 109 transition count 108
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 399 place count 109 transition count 106
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 403 place count 107 transition count 106
Performed 48 Post agglomeration using F-continuation condition.Transition count delta: 48
Deduced a syphon composed of 48 places in 0 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 4 with 96 rules applied. Total rules applied 499 place count 59 transition count 58
Drop transitions removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 4 with 15 rules applied. Total rules applied 514 place count 59 transition count 43
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 516 place count 58 transition count 43
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 5 with 2 rules applied. Total rules applied 518 place count 58 transition count 41
Free-agglomeration rule applied 2 times.
Iterating global reduction 5 with 2 rules applied. Total rules applied 520 place count 58 transition count 39
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 522 place count 56 transition count 39
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 6 with 1 rules applied. Total rules applied 523 place count 55 transition count 38
Applied a total of 523 rules in 64 ms. Remains 55 /308 variables (removed 253) and now considering 38/319 (removed 281) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 64 ms. Remains : 55/308 places, 38/319 transitions.
Incomplete random walk after 10000 steps, including 792 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 254 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 38 rows 55 cols
[2023-03-10 17:45:55] [INFO ] Computed 18 place invariants in 2 ms
[2023-03-10 17:45:55] [INFO ] [Real]Absence check using 0 positive and 18 generalized place invariants in 5 ms returned sat
[2023-03-10 17:45:55] [INFO ] After 28ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 17:45:55] [INFO ] After 37ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 7 ms.
[2023-03-10 17:45:55] [INFO ] After 92ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 1 ms.
Support contains 18 out of 55 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 55/55 places, 38/38 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 55 transition count 37
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 54 transition count 37
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 53 transition count 36
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 5 place count 53 transition count 35
Applied a total of 5 rules in 8 ms. Remains 53 /55 variables (removed 2) and now considering 35/38 (removed 3) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 8 ms. Remains : 53/55 places, 35/38 transitions.
Incomplete random walk after 10000 steps, including 870 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 263 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Finished probabilistic random walk after 485 steps, run visited all 1 properties in 17 ms. (steps per millisecond=28 )
Probabilistic random walk after 485 steps, saw 425 distinct states, run finished after 18 ms. (steps per millisecond=26 ) properties seen :1
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
FORMULA GPUForwardProgress-PT-16b-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 17:45:55] [INFO ] Flatten gal took : 33 ms
[2023-03-10 17:45:55] [INFO ] Flatten gal took : 37 ms
[2023-03-10 17:45:55] [INFO ] Input system was already deterministic with 319 transitions.
Computed a total of 59 stabilizing places and 59 stable transitions
Graph (complete) has 474 edges and 308 vertex of which 287 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.15 ms
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 16 place count 292 transition count 304
Iterating global reduction 1 with 15 rules applied. Total rules applied 31 place count 292 transition count 304
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 32 place count 292 transition count 303
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 42 place count 282 transition count 293
Iterating global reduction 2 with 10 rules applied. Total rules applied 52 place count 282 transition count 293
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 59 place count 282 transition count 286
Applied a total of 59 rules in 79 ms. Remains 282 /308 variables (removed 26) and now considering 286/319 (removed 33) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 79 ms. Remains : 282/308 places, 286/319 transitions.
[2023-03-10 17:45:55] [INFO ] Flatten gal took : 39 ms
[2023-03-10 17:45:55] [INFO ] Flatten gal took : 31 ms
[2023-03-10 17:45:55] [INFO ] Input system was already deterministic with 286 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 15 place count 293 transition count 305
Iterating global reduction 1 with 14 rules applied. Total rules applied 29 place count 293 transition count 305
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 32 place count 293 transition count 302
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 40 place count 285 transition count 294
Iterating global reduction 2 with 8 rules applied. Total rules applied 48 place count 285 transition count 294
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 54 place count 285 transition count 288
Applied a total of 54 rules in 40 ms. Remains 285 /308 variables (removed 23) and now considering 288/319 (removed 31) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 41 ms. Remains : 285/308 places, 288/319 transitions.
[2023-03-10 17:45:55] [INFO ] Flatten gal took : 15 ms
[2023-03-10 17:45:55] [INFO ] Flatten gal took : 16 ms
[2023-03-10 17:45:55] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Graph (trivial) has 262 edges and 308 vertex of which 6 / 308 are part of one of the 1 SCC in 1 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 468 edges and 303 vertex of which 282 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.2 ms
Discarding 21 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 148 transitions
Trivial Post-agglo rules discarded 148 transitions
Performed 148 trivial Post agglomeration. Transition count delta: 148
Iterating post reduction 0 with 148 rules applied. Total rules applied 150 place count 281 transition count 161
Reduce places removed 148 places and 0 transitions.
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 161 rules applied. Total rules applied 311 place count 133 transition count 148
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 315 place count 129 transition count 148
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 32 Pre rules applied. Total rules applied 315 place count 129 transition count 116
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 3 with 64 rules applied. Total rules applied 379 place count 97 transition count 116
Discarding 17 places :
Symmetric choice reduction at 3 with 17 rule applications. Total rules 396 place count 80 transition count 99
Iterating global reduction 3 with 17 rules applied. Total rules applied 413 place count 80 transition count 99
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 413 place count 80 transition count 98
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 415 place count 79 transition count 98
Performed 34 Post agglomeration using F-continuation condition.Transition count delta: 34
Deduced a syphon composed of 34 places in 0 ms
Reduce places removed 34 places and 0 transitions.
Iterating global reduction 3 with 68 rules applied. Total rules applied 483 place count 45 transition count 64
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 484 place count 45 transition count 64
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 485 place count 44 transition count 63
Applied a total of 485 rules in 40 ms. Remains 44 /308 variables (removed 264) and now considering 63/319 (removed 256) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 44/308 places, 63/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 3 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 3 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 292 transition count 303
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 292 transition count 303
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 34 place count 292 transition count 301
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 44 place count 282 transition count 291
Iterating global reduction 1 with 10 rules applied. Total rules applied 54 place count 282 transition count 291
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 61 place count 282 transition count 284
Applied a total of 61 rules in 28 ms. Remains 282 /308 variables (removed 26) and now considering 284/319 (removed 35) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 282/308 places, 284/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 14 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 15 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 17 place count 291 transition count 303
Iterating global reduction 1 with 16 rules applied. Total rules applied 33 place count 291 transition count 303
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 36 place count 291 transition count 300
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 46 place count 281 transition count 290
Iterating global reduction 2 with 10 rules applied. Total rules applied 56 place count 281 transition count 290
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 63 place count 281 transition count 283
Applied a total of 63 rules in 30 ms. Remains 281 /308 variables (removed 27) and now considering 283/319 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 281/308 places, 283/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 13 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 15 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 283 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 17 place count 291 transition count 303
Iterating global reduction 1 with 16 rules applied. Total rules applied 33 place count 291 transition count 303
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 36 place count 291 transition count 300
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 45 place count 282 transition count 291
Iterating global reduction 2 with 9 rules applied. Total rules applied 54 place count 282 transition count 291
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 60 place count 282 transition count 285
Applied a total of 60 rules in 31 ms. Remains 282 /308 variables (removed 26) and now considering 285/319 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 282/308 places, 285/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 14 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 15 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 285 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Graph (trivial) has 253 edges and 308 vertex of which 6 / 308 are part of one of the 1 SCC in 1 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 468 edges and 303 vertex of which 282 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.2 ms
Discarding 21 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 140 transitions
Trivial Post-agglo rules discarded 140 transitions
Performed 140 trivial Post agglomeration. Transition count delta: 140
Iterating post reduction 0 with 140 rules applied. Total rules applied 142 place count 281 transition count 169
Reduce places removed 140 places and 0 transitions.
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 154 rules applied. Total rules applied 296 place count 141 transition count 155
Reduce places removed 4 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 2 with 8 rules applied. Total rules applied 304 place count 137 transition count 151
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 308 place count 133 transition count 151
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 32 Pre rules applied. Total rules applied 308 place count 133 transition count 119
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 4 with 64 rules applied. Total rules applied 372 place count 101 transition count 119
Discarding 18 places :
Symmetric choice reduction at 4 with 18 rule applications. Total rules 390 place count 83 transition count 101
Iterating global reduction 4 with 18 rules applied. Total rules applied 408 place count 83 transition count 101
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 409 place count 83 transition count 100
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 1 Pre rules applied. Total rules applied 409 place count 83 transition count 99
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 411 place count 82 transition count 99
Performed 34 Post agglomeration using F-continuation condition.Transition count delta: 34
Deduced a syphon composed of 34 places in 0 ms
Reduce places removed 34 places and 0 transitions.
Iterating global reduction 5 with 68 rules applied. Total rules applied 479 place count 48 transition count 65
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 480 place count 47 transition count 64
Applied a total of 480 rules in 36 ms. Remains 47 /308 variables (removed 261) and now considering 64/319 (removed 255) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 47/308 places, 64/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 3 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 4 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 17 place count 291 transition count 303
Iterating global reduction 1 with 16 rules applied. Total rules applied 33 place count 291 transition count 303
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 36 place count 291 transition count 300
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 46 place count 281 transition count 290
Iterating global reduction 2 with 10 rules applied. Total rules applied 56 place count 281 transition count 290
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 63 place count 281 transition count 283
Applied a total of 63 rules in 30 ms. Remains 281 /308 variables (removed 27) and now considering 283/319 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 281/308 places, 283/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 12 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 12 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 283 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 17 place count 291 transition count 303
Iterating global reduction 1 with 16 rules applied. Total rules applied 33 place count 291 transition count 303
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 36 place count 291 transition count 300
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 45 place count 282 transition count 291
Iterating global reduction 2 with 9 rules applied. Total rules applied 54 place count 282 transition count 291
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 61 place count 282 transition count 284
Applied a total of 61 rules in 31 ms. Remains 282 /308 variables (removed 26) and now considering 284/319 (removed 35) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 282/308 places, 284/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 13 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 13 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 18 place count 290 transition count 302
Iterating global reduction 1 with 17 rules applied. Total rules applied 35 place count 290 transition count 302
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 38 place count 290 transition count 299
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 48 place count 280 transition count 289
Iterating global reduction 2 with 10 rules applied. Total rules applied 58 place count 280 transition count 289
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 65 place count 280 transition count 282
Applied a total of 65 rules in 27 ms. Remains 280 /308 variables (removed 28) and now considering 282/319 (removed 37) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 280/308 places, 282/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 12 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 11 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 18 place count 290 transition count 302
Iterating global reduction 1 with 17 rules applied. Total rules applied 35 place count 290 transition count 302
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 38 place count 290 transition count 299
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 48 place count 280 transition count 289
Iterating global reduction 2 with 10 rules applied. Total rules applied 58 place count 280 transition count 289
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 65 place count 280 transition count 282
Applied a total of 65 rules in 35 ms. Remains 280 /308 variables (removed 28) and now considering 282/319 (removed 37) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 280/308 places, 282/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 10 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 12 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 17 place count 291 transition count 303
Iterating global reduction 1 with 16 rules applied. Total rules applied 33 place count 291 transition count 303
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 36 place count 291 transition count 300
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 45 place count 282 transition count 291
Iterating global reduction 2 with 9 rules applied. Total rules applied 54 place count 282 transition count 291
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 61 place count 282 transition count 284
Applied a total of 61 rules in 27 ms. Remains 282 /308 variables (removed 26) and now considering 284/319 (removed 35) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 282/308 places, 284/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 11 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 11 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Graph (trivial) has 260 edges and 308 vertex of which 6 / 308 are part of one of the 1 SCC in 0 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 468 edges and 303 vertex of which 282 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.2 ms
Discarding 21 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 149 transitions
Trivial Post-agglo rules discarded 149 transitions
Performed 149 trivial Post agglomeration. Transition count delta: 149
Iterating post reduction 0 with 149 rules applied. Total rules applied 151 place count 281 transition count 160
Reduce places removed 149 places and 0 transitions.
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 164 rules applied. Total rules applied 315 place count 132 transition count 145
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 5 rules applied. Total rules applied 320 place count 128 transition count 144
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 321 place count 127 transition count 144
Performed 34 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 34 Pre rules applied. Total rules applied 321 place count 127 transition count 110
Deduced a syphon composed of 34 places in 0 ms
Reduce places removed 34 places and 0 transitions.
Iterating global reduction 4 with 68 rules applied. Total rules applied 389 place count 93 transition count 110
Discarding 16 places :
Symmetric choice reduction at 4 with 16 rule applications. Total rules 405 place count 77 transition count 94
Iterating global reduction 4 with 16 rules applied. Total rules applied 421 place count 77 transition count 94
Performed 35 Post agglomeration using F-continuation condition.Transition count delta: 35
Deduced a syphon composed of 35 places in 0 ms
Reduce places removed 35 places and 0 transitions.
Iterating global reduction 4 with 70 rules applied. Total rules applied 491 place count 42 transition count 59
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 492 place count 41 transition count 58
Applied a total of 492 rules in 26 ms. Remains 41 /308 variables (removed 267) and now considering 58/319 (removed 261) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 41/308 places, 58/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 2 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 2 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 58 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 18 place count 290 transition count 302
Iterating global reduction 1 with 17 rules applied. Total rules applied 35 place count 290 transition count 302
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 38 place count 290 transition count 299
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 47 place count 281 transition count 290
Iterating global reduction 2 with 9 rules applied. Total rules applied 56 place count 281 transition count 290
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 62 place count 281 transition count 284
Applied a total of 62 rules in 25 ms. Remains 281 /308 variables (removed 27) and now considering 284/319 (removed 35) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 281/308 places, 284/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 18 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 10 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in LTL mode, iteration 0 : 308/308 places, 319/319 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 307 transition count 319
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 15 place count 293 transition count 305
Iterating global reduction 1 with 14 rules applied. Total rules applied 29 place count 293 transition count 305
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 32 place count 293 transition count 302
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 39 place count 286 transition count 295
Iterating global reduction 2 with 7 rules applied. Total rules applied 46 place count 286 transition count 295
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 50 place count 286 transition count 291
Applied a total of 50 rules in 24 ms. Remains 286 /308 variables (removed 22) and now considering 291/319 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 286/308 places, 291/319 transitions.
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 10 ms
[2023-03-10 17:45:56] [INFO ] Flatten gal took : 11 ms
[2023-03-10 17:45:56] [INFO ] Input system was already deterministic with 291 transitions.
[2023-03-10 17:45:57] [INFO ] Flatten gal took : 11 ms
[2023-03-10 17:45:57] [INFO ] Flatten gal took : 12 ms
[2023-03-10 17:45:57] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-10 17:45:57] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 308 places, 319 transitions and 801 arcs took 2 ms.
Total runtime 8714 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GPUForwardProgress-PT-16b
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA GPUForwardProgress-PT-16b-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-16b-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678470429018

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 7 (type EXCL) for 6 GPUForwardProgress-PT-16b-CTLFireability-02
lola: time limit : 100 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-02
lola: result : true
lola: markings : 6
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 31 (type EXCL) for 26 GPUForwardProgress-PT-16b-CTLFireability-06
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-06
lola: result : true
lola: markings : 122
lola: fired transitions : 187
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 36 (type EXCL) for 33 GPUForwardProgress-PT-16b-CTLFireability-07
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 77 (type FNDP) for 49 GPUForwardProgress-PT-16b-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 49 GPUForwardProgress-PT-16b-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SRCH) for 49 GPUForwardProgress-PT-16b-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 83 (type SRCH) for GPUForwardProgress-PT-16b-CTLFireability-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 74 (type FNDP) for 49 GPUForwardProgress-PT-16b-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 77 (type FNDP) for GPUForwardProgress-PT-16b-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 74 (type FNDP) for GPUForwardProgress-PT-16b-CTLFireability-11 (obsolete)
lola: CANCELED task # 81 (type EQUN) for GPUForwardProgress-PT-16b-CTLFireability-11 (obsolete)
lola: LAUNCH task # 89 (type FNDP) for 15 GPUForwardProgress-PT-16b-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type EQUN) for 15 GPUForwardProgress-PT-16b-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SRCH) for 15 GPUForwardProgress-PT-16b-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 74 (type FNDP) for GPUForwardProgress-PT-16b-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/374/CTLFireability-81.sara.
lola: FINISHED task # 92 (type SRCH) for GPUForwardProgress-PT-16b-CTLFireability-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1

lola: FINISHED task # 81 (type EQUN) for GPUForwardProgress-PT-16b-CTLFireability-11
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
sara: try reading problem file /home/mcc/execution/374/CTLFireability-90.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 89 (type FNDP) for GPUForwardProgress-PT-16b-CTLFireability-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 90 (type EQUN) for GPUForwardProgress-PT-16b-CTLFireability-05 (obsolete)
lola: FINISHED task # 90 (type EQUN) for GPUForwardProgress-PT-16b-CTLFireability-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 93 (type FNDP) for 15 GPUForwardProgress-PT-16b-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 15 GPUForwardProgress-PT-16b-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SRCH) for 15 GPUForwardProgress-PT-16b-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type SRCH) for GPUForwardProgress-PT-16b-CTLFireability-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/374/CTLFireability-94.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 93 (type FNDP) for GPUForwardProgress-PT-16b-CTLFireability-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 94 (type EQUN) for GPUForwardProgress-PT-16b-CTLFireability-05 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 94 (type EQUN) for GPUForwardProgress-PT-16b-CTLFireability-05
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 1 0 2 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 5/276 5/32 GPUForwardProgress-PT-16b-CTLFireability-07 949889 m, 189977 m/sec, 1512439 t fired, .

Time elapsed: 5 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 1 0 2 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 10/276 9/32 GPUForwardProgress-PT-16b-CTLFireability-07 1965875 m, 203197 m/sec, 3249388 t fired, .

Time elapsed: 10 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 1 0 2 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 15/276 14/32 GPUForwardProgress-PT-16b-CTLFireability-07 3014469 m, 209718 m/sec, 5052491 t fired, .

Time elapsed: 15 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 1 0 2 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 20/276 19/32 GPUForwardProgress-PT-16b-CTLFireability-07 4064295 m, 209965 m/sec, 6861284 t fired, .

Time elapsed: 20 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 1 0 2 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 25/276 24/32 GPUForwardProgress-PT-16b-CTLFireability-07 5100864 m, 207313 m/sec, 8654222 t fired, .

Time elapsed: 25 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 1 0 2 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 30/276 29/32 GPUForwardProgress-PT-16b-CTLFireability-07 6141184 m, 208064 m/sec, 10449380 t fired, .

Time elapsed: 30 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 36 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ 0 1 0 0 8 0 0 8
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 35 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 71 (type EXCL) for 70 GPUForwardProgress-PT-16b-CTLFireability-15
lola: time limit : 297 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-15
lola: result : true
lola: markings : 4675
lola: fired transitions : 9415
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 68 (type EXCL) for 67 GPUForwardProgress-PT-16b-CTLFireability-14
lola: time limit : 324 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-14
lola: result : false
lola: markings : 7124
lola: fired transitions : 7616
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 49 GPUForwardProgress-PT-16b-CTLFireability-11
lola: time limit : 356 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-11
lola: result : true
lola: markings : 202
lola: fired transitions : 391
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 GPUForwardProgress-PT-16b-CTLFireability-10
lola: time limit : 396 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-10
lola: result : true
lola: markings : 152
lola: fired transitions : 152
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 GPUForwardProgress-PT-16b-CTLFireability-09
lola: time limit : 445 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-09
lola: result : false
lola: markings : 155
lola: fired transitions : 310
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 GPUForwardProgress-PT-16b-CTLFireability-08
lola: time limit : 509 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-08
lola: result : false
lola: markings : 156
lola: fired transitions : 310
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 GPUForwardProgress-PT-16b-CTLFireability-04
lola: time limit : 594 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-04
lola: result : true
lola: markings : 155
lola: fired transitions : 154
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 GPUForwardProgress-PT-16b-CTLFireability-03
lola: time limit : 712 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-03
lola: result : false
lola: markings : 41193
lola: fired transitions : 43062
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 GPUForwardProgress-PT-16b-CTLFireability-01
lola: time limit : 891 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-01
lola: result : false
lola: markings : 154
lola: fired transitions : 156
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 GPUForwardProgress-PT-16b-CTLFireability-00
lola: time limit : 1188 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 4/1188 5/32 GPUForwardProgress-PT-16b-CTLFireability-00 958729 m, 191745 m/sec, 1529049 t fired, .

Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 9/1188 10/32 GPUForwardProgress-PT-16b-CTLFireability-00 2014127 m, 211079 m/sec, 3332598 t fired, .

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 14/1188 14/32 GPUForwardProgress-PT-16b-CTLFireability-00 3055726 m, 208319 m/sec, 5124177 t fired, .

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 19/1188 19/32 GPUForwardProgress-PT-16b-CTLFireability-00 4094593 m, 207773 m/sec, 6915000 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 24/1188 24/32 GPUForwardProgress-PT-16b-CTLFireability-00 5124392 m, 205959 m/sec, 8695721 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 29/1188 28/32 GPUForwardProgress-PT-16b-CTLFireability-00 6065288 m, 188179 m/sec, 10319058 t fired, .

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 1 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-16b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ 0 1 0 0 2 0 1 0
GPUForwardProgress-PT-16b-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 38 (type EXCL) for 33 GPUForwardProgress-PT-16b-CTLFireability-07
lola: time limit : 1765 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-07
lola: result : false
lola: markings : 14
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 65 (type EXCL) for 64 GPUForwardProgress-PT-16b-CTLFireability-13
lola: time limit : 3530 sec
lola: memory limit: 32 pages
lola: FINISHED task # 65 (type EXCL) for GPUForwardProgress-PT-16b-CTLFireability-13
lola: result : false
lola: markings : 5
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 15

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-16b-CTLFireability-00: CTL unknown AGGR
GPUForwardProgress-PT-16b-CTLFireability-01: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-03: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-04: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-05: DISJ true findpath
GPUForwardProgress-PT-16b-CTLFireability-06: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-07: CONJ false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-09: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-11: DISJ true CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-13: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-14: CTL false CTL model checker
GPUForwardProgress-PT-16b-CTLFireability-15: CTL true CTL model checker


Time elapsed: 70 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-16b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GPUForwardProgress-PT-16b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345400058"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-16b.tgz
mv GPUForwardProgress-PT-16b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;