Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345400034.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GPUForwardProgress-PT-12a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345400034
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.4K Feb 25 14:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 25 14:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 14:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 14:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:11 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:11 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 14:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 153K Feb 25 14:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 25 14:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 14:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 20K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-00
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-01
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-02
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-03
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-04
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-05
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-06
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-07
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-08
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-09
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-10
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-11
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-12
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-13
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-14
FORMULA_NAME GPUForwardProgress-PT-12a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678464994574

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-12a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 16:16:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 16:16:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 16:16:38] [INFO ] Load time of PNML (sax parser for PT used): 78 ms
[2023-03-10 16:16:38] [INFO ] Transformed 56 places.
[2023-03-10 16:16:38] [INFO ] Transformed 69 transitions.
[2023-03-10 16:16:38] [INFO ] Found NUPN structural information;
[2023-03-10 16:16:38] [INFO ] Parsed PT model containing 56 places and 69 transitions and 261 arcs in 221 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 14 transitions
Reduce redundant transitions removed 14 transitions.
FORMULA GPUForwardProgress-PT-12a-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GPUForwardProgress-PT-12a-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 52 out of 56 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Applied a total of 0 rules in 23 ms. Remains 56 /56 variables (removed 0) and now considering 55/55 (removed 0) transitions.
// Phase 1: matrix 55 rows 56 cols
[2023-03-10 16:16:38] [INFO ] Computed 14 place invariants in 8 ms
[2023-03-10 16:16:38] [INFO ] Implicit Places using invariants in 314 ms returned []
[2023-03-10 16:16:38] [INFO ] Invariant cache hit.
[2023-03-10 16:16:39] [INFO ] State equation strengthened by 13 read => feed constraints.
[2023-03-10 16:16:39] [INFO ] Implicit Places using invariants and state equation in 161 ms returned []
Implicit Place search using SMT with State Equation took 542 ms to find 0 implicit places.
[2023-03-10 16:16:39] [INFO ] Invariant cache hit.
[2023-03-10 16:16:39] [INFO ] Dead Transitions using invariants and state equation in 168 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 737 ms. Remains : 56/56 places, 55/55 transitions.
Support contains 52 out of 56 places after structural reductions.
[2023-03-10 16:16:39] [INFO ] Flatten gal took : 50 ms
[2023-03-10 16:16:39] [INFO ] Flatten gal took : 21 ms
[2023-03-10 16:16:39] [INFO ] Input system was already deterministic with 55 transitions.
Incomplete random walk after 10000 steps, including 57 resets, run finished after 902 ms. (steps per millisecond=11 ) properties (out of 61) seen :56
Incomplete Best-First random walk after 10001 steps, including 86 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 109 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 54 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 55 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-10 16:16:41] [INFO ] Invariant cache hit.
[2023-03-10 16:16:41] [INFO ] [Real]Absence check using 0 positive and 14 generalized place invariants in 4 ms returned sat
[2023-03-10 16:16:41] [INFO ] After 100ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-10 16:16:41] [INFO ] [Nat]Absence check using 0 positive and 14 generalized place invariants in 4 ms returned sat
[2023-03-10 16:16:41] [INFO ] After 151ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 5 atomic propositions for a total of 14 simplifications.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 8 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 9 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Graph (complete) has 174 edges and 56 vertex of which 42 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.3 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Graph (complete) has 174 edges and 56 vertex of which 42 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.1 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 11 Pre rules applied. Total rules applied 1 place count 41 transition count 42
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 0 with 22 rules applied. Total rules applied 23 place count 30 transition count 42
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 25 place count 29 transition count 41
Applied a total of 25 rules in 35 ms. Remains 29 /56 variables (removed 27) and now considering 41/55 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 29/56 places, 41/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 4 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 7 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 3 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 7 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 3 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 3 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 2 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 2 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 3 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 3 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Graph (complete) has 174 edges and 56 vertex of which 42 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 8 Pre rules applied. Total rules applied 1 place count 42 transition count 46
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 16 rules applied. Total rules applied 17 place count 34 transition count 46
Applied a total of 17 rules in 8 ms. Remains 34 /56 variables (removed 22) and now considering 46/55 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 34/56 places, 46/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 4 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Graph (complete) has 174 edges and 56 vertex of which 42 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 11 Pre rules applied. Total rules applied 1 place count 42 transition count 43
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 0 with 22 rules applied. Total rules applied 23 place count 31 transition count 43
Applied a total of 23 rules in 8 ms. Remains 31 /56 variables (removed 25) and now considering 43/55 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 31/56 places, 43/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 4 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 4 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 2 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 13 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 55/55 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 55 transition count 55
Applied a total of 1 rules in 2 ms. Remains 55 /56 variables (removed 1) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 55/56 places, 55/55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 4 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Input system was already deterministic with 55 transitions.
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 6 ms
[2023-03-10 16:16:41] [INFO ] Flatten gal took : 5 ms
[2023-03-10 16:16:41] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-10 16:16:41] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 56 places, 55 transitions and 233 arcs took 1 ms.
Total runtime 3805 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GPUForwardProgress-PT-12a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA GPUForwardProgress-PT-12a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-12a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678465129975

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
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lola: rewrite Frontend/Parser/formula_rewrite.k:299
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lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
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lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
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lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:253
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lola: rewrite Frontend/Parser/formula_rewrite.k:325
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lola: rewrite Frontend/Parser/formula_rewrite.k:334
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lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
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lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
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lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
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lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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GPUForwardProgress-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 16/702 13/32 GPUForwardProgress-PT-12a-CTLFireability-04 3121341 m, 192212 m/sec, 17923028 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-12a-CTLFireability-03: DISJ false DISJ
GPUForwardProgress-PT-12a-CTLFireability-05: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-11: DISJ true findpath
GPUForwardProgress-PT-12a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-12a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-12a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 21/702 17/32 GPUForwardProgress-PT-12a-CTLFireability-04 4023976 m, 180527 m/sec, 23315507 t fired, .

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GPUForwardProgress-PT-12a-CTLFireability-03: DISJ false DISJ
GPUForwardProgress-PT-12a-CTLFireability-05: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-11: DISJ true findpath
GPUForwardProgress-PT-12a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-12a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-12a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 26/702 21/32 GPUForwardProgress-PT-12a-CTLFireability-04 4930214 m, 181247 m/sec, 28729068 t fired, .

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GPUForwardProgress-PT-12a-CTLFireability-03: DISJ false DISJ
GPUForwardProgress-PT-12a-CTLFireability-05: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-11: DISJ true findpath
GPUForwardProgress-PT-12a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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GPUForwardProgress-PT-12a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-12a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

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17 CTL EXCL 31/702 24/32 GPUForwardProgress-PT-12a-CTLFireability-04 5795289 m, 173015 m/sec, 33951156 t fired, .

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GPUForwardProgress-PT-12a-CTLFireability-03: DISJ false DISJ
GPUForwardProgress-PT-12a-CTLFireability-05: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-11: DISJ true findpath
GPUForwardProgress-PT-12a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-12a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-12a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
GPUForwardProgress-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 36/702 27/32 GPUForwardProgress-PT-12a-CTLFireability-04 6611591 m, 163260 m/sec, 39058227 t fired, .

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# running tasks: 1 of 4 Visible: 14
lola: FINISHED task # 17 (type EXCL) for GPUForwardProgress-PT-12a-CTLFireability-04
lola: result : false
lola: markings : 6837427
lola: fired transitions : 40584487
lola: time used : 37.000000
lola: memory pages used : 28
lola: LAUNCH task # 7 (type EXCL) for 6 GPUForwardProgress-PT-12a-CTLFireability-02
lola: time limit : 868 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for GPUForwardProgress-PT-12a-CTLFireability-02
lola: result : true
lola: markings : 41
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 65 GPUForwardProgress-PT-12a-CTLFireability-13
lola: time limit : 1158 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for GPUForwardProgress-PT-12a-CTLFireability-13
lola: result : true
lola: markings : 232
lola: fired transitions : 646
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 GPUForwardProgress-PT-12a-CTLFireability-00
lola: time limit : 1737 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for GPUForwardProgress-PT-12a-CTLFireability-00
lola: result : true
lola: markings : 276
lola: fired transitions : 843
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 63 (type EXCL) for 62 GPUForwardProgress-PT-12a-CTLFireability-12
lola: time limit : 3474 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for GPUForwardProgress-PT-12a-CTLFireability-12
lola: result : true
lola: markings : 160
lola: fired transitions : 267
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 14

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-12a-CTLFireability-00: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-01: CTL unknown AGGR
GPUForwardProgress-PT-12a-CTLFireability-02: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-03: DISJ false DISJ
GPUForwardProgress-PT-12a-CTLFireability-04: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-05: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-08: CTL false CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-09: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-11: DISJ true findpath
GPUForwardProgress-PT-12a-CTLFireability-12: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-13: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-14: CTL true CTL model checker
GPUForwardProgress-PT-12a-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-12a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GPUForwardProgress-PT-12a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345400034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-12a.tgz
mv GPUForwardProgress-PT-12a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;