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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r198-smll-167840345100438
Last Updated
May 14, 2023

About the Execution of LoLA for HirschbergSinclair-PT-10

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
459.403 26438.00 101135.00 73.20 FFFTTTTFFFFTFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r198-smll-167840345100438.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is HirschbergSinclair-PT-10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r198-smll-167840345100438
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 624K
-rw-r--r-- 1 mcc users 8.1K Feb 26 02:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 02:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 26 02:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 02:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 26 02:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Feb 26 02:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 02:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 26 02:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 136K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-00
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-01
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-02
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-03
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-04
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-05
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-06
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-07
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-08
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-09
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-10
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-11
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-12
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-13
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-14
FORMULA_NAME HirschbergSinclair-PT-10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678620980142

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-10
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT HirschbergSinclair-PT-10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678621006580

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type EXCL) for 0 HirschbergSinclair-PT-10-ReachabilityCardinality-00
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 52 (type FNDP) for 15 HirschbergSinclair-PT-10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 15 HirschbergSinclair-PT-10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 68 (type SRCH) for 15 HirschbergSinclair-PT-10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 68 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-05
lola: result : false
lola: markings : 57
lola: fired transitions : 69
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 52 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 66 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 50 (type FNDP) for 18 HirschbergSinclair-PT-10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 18 HirschbergSinclair-PT-10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 18 HirschbergSinclair-PT-10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 74 (type EXCL) for HirschbergSinclair-PT-10-ReachabilityCardinality-00
lola: result : false
lola: markings : 116
lola: fired transitions : 131
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 30 HirschbergSinclair-PT-10-ReachabilityCardinality-10
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 64 (type EXCL) for HirschbergSinclair-PT-10-ReachabilityCardinality-10
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 99 (type EXCL) for 42 HirschbergSinclair-PT-10-ReachabilityCardinality-14
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 99 (type EXCL) for HirschbergSinclair-PT-10-ReachabilityCardinality-14
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 50 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 13
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 85 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 89 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 83 (type EXCL) for 3 HirschbergSinclair-PT-10-ReachabilityCardinality-01
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type FNDP) for 9 HirschbergSinclair-PT-10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type EQUN) for 9 HirschbergSinclair-PT-10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type SRCH) for 9 HirschbergSinclair-PT-10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 83 (type EXCL) for HirschbergSinclair-PT-10-ReachabilityCardinality-01
lola: result : false
lola: markings : 139
lola: fired transitions : 186
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 88 (type EXCL) for 36 HirschbergSinclair-PT-10-ReachabilityCardinality-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 102 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-03
lola: result : false
lola: markings : 134
lola: fired transitions : 166
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 59 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 127 (type FNDP) for 45 HirschbergSinclair-PT-10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type EQUN) for 45 HirschbergSinclair-PT-10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SRCH) for 45 HirschbergSinclair-PT-10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 134 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-15
lola: result : true
lola: markings : 101
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 127 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 132 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 48 (type FNDP) for 6 HirschbergSinclair-PT-10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 6 HirschbergSinclair-PT-10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SRCH) for 6 HirschbergSinclair-PT-10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 127 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 99
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 66 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-05
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-132.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 85 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-06
lola: result : true
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-ReachabilityCardinality-00: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-03: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-05: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-06: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-10: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-14: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-10-ReachabilityCardinality-02: EF 0 2 3 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF FNDP 4/327 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 985140 t fired, 12721 attempts, .
76 EF STEQ 4/327 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 sara is running.
88 EF EXCL 4/449 1/32 HirschbergSinclair-PT-10-ReachabilityCardinality-12 192350 m, 38470 m/sec, 293176 t fired, .
108 EF SRCH 4/359 2/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 526092 m, 105218 m/sec, 936895 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-ReachabilityCardinality-00: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-03: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-05: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-06: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-10: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-14: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-10-ReachabilityCardinality-02: EF 0 2 3 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF FNDP 9/323 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 2132851 t fired, 27124 attempts, .
76 EF STEQ 9/323 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 sara is running.
88 EF EXCL 9/449 2/32 HirschbergSinclair-PT-10-ReachabilityCardinality-12 411008 m, 43731 m/sec, 638175 t fired, .
108 EF SRCH 9/355 4/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 1074365 m, 109654 m/sec, 2012472 t fired, .

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lola: FINISHED task # 59 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 108 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-ReachabilityCardinality-00: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-03: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-05: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-06: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-10: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-14: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-10-ReachabilityCardinality-02: EF 0 2 2 0 1 0 1 0
HirschbergSinclair-PT-10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF FNDP 14/315 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 3182045 t fired, 40179 attempts, .
76 EF STEQ 14/315 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-02 sara is running.
88 EF EXCL 14/449 3/32 HirschbergSinclair-PT-10-ReachabilityCardinality-12 654628 m, 48724 m/sec, 1020070 t fired, .

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lola: LAUNCH task # 107 (type FNDP) for 12 HirschbergSinclair-PT-10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 104 (type FNDP) for 21 HirschbergSinclair-PT-10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 104 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 116
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 113 (type FNDP) for 24 HirschbergSinclair-PT-10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 76 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 48 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 101 (type FNDP) for 39 HirschbergSinclair-PT-10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type EQUN) for 39 HirschbergSinclair-PT-10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 3424651
lola: tried executions : 43192
lola: time used : 15.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-ReachabilityCardinality-00: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-02: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-03: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-04: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-05: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-06: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-07: AG false findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-10: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-14: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-10-ReachabilityCardinality-08: EF 0 4 1 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-13: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
88 EF EXCL 19/719 4/32 HirschbergSinclair-PT-10-ReachabilityCardinality-12 910882 m, 51250 m/sec, 1434869 t fired, .
101 EF FNDP 4/512 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-13 495849 t fired, 11440 attempts, .
111 EF STEQ 4/512 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-13 sara is running.
113 EF FNDP 5/596 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-08 1799788 t fired, 899895 attempts, .

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lola: FINISHED task # 111 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 101 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 106 (type FNDP) for 27 HirschbergSinclair-PT-10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type EQUN) for 27 HirschbergSinclair-PT-10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 101 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 1164425
lola: tried executions : 26855
lola: time used : 9.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-ReachabilityCardinality-00: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-02: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-03: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-04: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-05: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-06: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-07: AG false findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-10: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-13: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-14: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HirschbergSinclair-PT-10-ReachabilityCardinality-08: EF 0 4 1 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-09: EF 0 3 2 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
HirschbergSinclair-PT-10-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
88 EF EXCL 24/899 5/32 HirschbergSinclair-PT-10-ReachabilityCardinality-12 1160065 m, 49836 m/sec, 1829966 t fired, .
106 EF FNDP 0/595 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-09 53518 t fired, 7617 attempts, .
113 EF FNDP 10/707 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-08 3544495 t fired, 1772249 attempts, .
118 EF STEQ 0/715 0/5 HirschbergSinclair-PT-10-ReachabilityCardinality-09 sara is running.

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lola: FINISHED task # 118 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 106 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 122 (type FNDP) for 33 HirschbergSinclair-PT-10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type EQUN) for 33 HirschbergSinclair-PT-10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 106 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 144838
lola: tried executions : 20653
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 122 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 15
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 137 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 116 (type EQUN) for 24 HirschbergSinclair-PT-10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SRCH) for 24 HirschbergSinclair-PT-10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 137 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-11
lola: result : true
lola: FINISHED task # 139 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-08
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 113 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 116 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 53 (type FNDP) for 36 HirschbergSinclair-PT-10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 36 HirschbergSinclair-PT-10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SRCH) for 36 HirschbergSinclair-PT-10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 113 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 3716461
lola: tried executions : 1858232
lola: time used : 11.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-116.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 78 (type EQUN) for HirschbergSinclair-PT-10-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 53 (type FNDP) for HirschbergSinclair-PT-10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 87 (type SRCH) for HirschbergSinclair-PT-10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 88 (type EXCL) for HirschbergSinclair-PT-10-ReachabilityCardinality-12 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-10-ReachabilityCardinality-00: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-01: EF false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-02: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-03: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-04: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-05: AG true tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-06: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-07: AG false findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-08: EF false tandem / insertion
HirschbergSinclair-PT-10-ReachabilityCardinality-09: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-10: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-11: EF true findpath
HirschbergSinclair-PT-10-ReachabilityCardinality-12: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-13: EF false state equation
HirschbergSinclair-PT-10-ReachabilityCardinality-14: AG false tandem / relaxed
HirschbergSinclair-PT-10-ReachabilityCardinality-15: AG false tandem / insertion


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is HirschbergSinclair-PT-10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r198-smll-167840345100438"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-10.tgz
mv HirschbergSinclair-PT-10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;