fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r198-smll-167840344700174
Last Updated
May 14, 2023

About the Execution of LoLA for GlobalResAllocation-COL-05

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
8611.619 54193.00 89786.00 222.80 FFTTFTTTTFTTFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r198-smll-167840344700174.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is GlobalResAllocation-COL-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r198-smll-167840344700174
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 7.3K Feb 25 19:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 19:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 18:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 18:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 00:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 26 00:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Feb 25 23:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Feb 25 23:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 28K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678518164247

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GlobalResAllocation-COL-05
Not applying reductions.
Model is COL
ReachabilityCardinality COL
starting LoLA
BK_INPUT GlobalResAllocation-COL-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678518218440

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SKEL/FNDP) for 18 GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 18 GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 18 GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 18 GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 23 (type SKEL/CNST) for 21 GlobalResAllocation-COL-05-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 23 (type SKEL/CNST) for GlobalResAllocation-COL-05-ReachabilityCardinality-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: result : false
lola: markings : 33
lola: fired transitions : 101
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 58 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 61 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 53 (type SKEL/FNDP) for 6 GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 6 GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 65 (type SKEL/FNDP) for 9 GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type SKEL/EQUN) for 9 GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 57 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 4871
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 75, Transitions: 56105
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-54.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 54 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 53 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 27 GlobalResAllocation-COL-05-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/EQUN) for 27 GlobalResAllocation-COL-05-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 7070
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: @ trans enter3
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: place or transition ordering is non-deterministic

lola: @ trans enter2
lola: @ trans enter1
lola: @ trans exit
lola: @ trans release1
lola: FINISHED task # 66 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 65 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 93 (type SKEL/FNDP) for 24 GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type SKEL/FNDP) for 45 GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 91398
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans release2
lola: @ trans enter4
lola: FINISHED task # 81 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 80 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 131 (type SKEL/FNDP) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SKEL/EQUN) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 80 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 73670
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 131 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 134 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 72 (type SKEL/FNDP) for 0 GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 0 GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-134.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic


lola: FINISHED task # 134 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
lola: FINISHED task # 58 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: result : false
lola: FINISHED task # 73 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 72 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 145 (type SKEL/FNDP) for 36 GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type SKEL/EQUN) for 36 GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 18988
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-146.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 146 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 145 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 118 (type SKEL/FNDP) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 145 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 25309
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 118 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 119 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 50 (type SKEL/FNDP) for 15 GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SKEL/EQUN) for 15 GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 88 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 50 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 108 (type SKEL/FNDP) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/EQUN) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 18223
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 108 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 109 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 87 (type SKEL/FNDP) for 42 GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/EQUN) for 42 GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.

lola: FINISHED task # 109 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 94 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 87 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 121 (type SKEL/FNDP) for 3 GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/EQUN) for 3 GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 17772
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.

lola: FINISHED task # 122 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 121 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 152 (type SKEL/FNDP) for 39 GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/EQUN) for 39 GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 121 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 11150
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-153.sara.

lola: FINISHED task # 153 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 152 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 103 (type SKEL/EQUN) for 45 GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/SRCH) for 45 GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 152 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 11521
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 105 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: result : false
lola: markings : 36
lola: fired transitions : 115
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 102 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 103 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 127 (type SKEL/EQUN) for 24 GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type SKEL/SRCH) for 24 GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SKEL/SRCH) for 24 GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 167607
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 103 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 136 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: result : false
lola: markings : 47
lola: fired transitions : 169
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 127 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 137 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-08 (obsolete)
lola: FINISHED task # 137 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: result : false
lola: markings : 47
lola: fired transitions : 166
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 93 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 223320
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 127 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 4

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 4

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 10 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 4

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 15 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 4

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 20 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16

lola: FINISHED task # 119 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 25 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 30 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 35 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 40 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 45 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-06 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-03 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-05 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-08 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-09 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-13 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-15 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-12 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-14 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 50 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 164 (type EXCL) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 1182 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 160 (type FNDP) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type EQUN) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 163 (type SRCH) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 160 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 161 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 163 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 164 (type EXCL) for GlobalResAllocation-COL-05-ReachabilityCardinality-10 (obsolete)
lola: FINISHED task # 163 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 171 (type EXCL) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 1774 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 167 (type FNDP) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type EQUN) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 170 (type SRCH) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 170 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 167 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 168 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 171 (type EXCL) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 167 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 5
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 177 (type EXCL) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 3547 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 173 (type FNDP) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 174 (type EQUN) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 176 (type SRCH) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-161.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-168.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-174.sara.
lola: FINISHED task # 177 (type EXCL) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 173 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 174 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 176 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG false tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF true findpath
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF true tandem / relaxed
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: tandem / insertion


Time elapsed: 54 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is GlobalResAllocation-COL-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r198-smll-167840344700174"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-05.tgz
mv GlobalResAllocation-COL-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;