MCC'2023- Execution of r198-smll-167840344700130

About the Execution of LoLA for GPUForwardProgress-PT-36a

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
2260.567	445517.00	434088.00	1209.60	??FT???FT?TFFTFF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r198-smll-
Waiting for the VM to be ready (probing ssh)
............................................
======================
Generated by BenchKit 2-5348
Executing tool lola
Input is GPUForwardProgress-PT-36a,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r198-smll-167840344700
============================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 572K
-rw-r--r-- 1 mcc users 7.5K Feb 25
-rw-r--r-- 1 mcc users 85K Feb 25
-rw-r--r-- 1 mcc users 6.2K Feb 25
-rw-r--r-- 1 mcc users 57K Feb 25
-rw-r--r-- 1 mcc users 3.7K Feb 25
-rw-r--r-- 1 mcc users 27K Feb 25
-rw-r--r-- 1 mcc users 2.3K Feb 25
-rw-r--r-- 1 mcc users 17K Feb 25
-rw-r--r-- 1 mcc users 15K Feb 25
-rw-r--r-- 1 mcc users 166K Feb 25
-rw-r--r-- 1 mcc users 9.2K Feb 25
-rw-r--r-- 1 mcc users 80K Feb 25
-rw-r--r-- 1 mcc users 1.7K Feb 25
-rw-r--r-- 1 mcc users 3.8K Feb 25
-rw-r--r-- 1 mcc users 6 Mar 5
-rw-r--r-- 1 mcc users 4 Mar 5
-rw-r--r-- 1 mcc users 6 Mar 5
-rw-r--r-- 1 mcc users 56K Mar 5

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi
FORMULA_NAME GPUForwardProgress-PT-36a-CTLFi

=== Now, execution of the tool begins

BK_START 1678506196937

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-36a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT GPUForwardProgress-PT-36a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lo
current directory: /home/mcc/execution
CTLFireability

FORMULA GPUForwardProgress-PT-36a-CTLFireability-15

FORMULA GPUForwardProgress-PT-36a-CTLFireability-14

FORMULA GPUForwardProgress-PT-36a-CTLFireability-13

FORMULA GPUForwardProgress-PT-36a-CTLFireability-11

FORMULA GPUForwardProgress-PT-36a-CTLFireability-10

FORMULA GPUForwardProgress-PT-36a-CTLFireability-08

FORMULA GPUForwardProgress-PT-36a-CTLFireability-07

FORMULA GPUForwardProgress-PT-36a-CTLFireability-03

FORMULA GPUForwardProgress-PT-36a-CTLFireability-02

FORMULA GPUForwardProgress-PT-36a-CTLFireability-12

BK_STOP 1678506642454

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execution/
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execu
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 60 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 7 (type EXCL)
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type SKEL/SRCH)
lola: result : true
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 7 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 27 (type EXCL)
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
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lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 68 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 71 (type SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 71 (type SRCH)
lola: result : unknown
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 64 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type FNDP)
lola: result : true
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 64 (type FNDP)
lola: CANCELED task # 69 (type EQUN)
lola: FINISHED task # 64 (type SKEL/FNDP)
lola: result : true
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
sara: try reading problem file /home/mcc/exe
sara: place or transition ordering

lola: FINISHED task # 69 (type EQUN)
lola: result : true
FINISHED FORMULA: CATEGORY
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........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=============================================== examination is CTLFireability 130 ========================= 14:37 CTLCardinality.txt 14:37 CTLCardinality.xml 14:27 CTLFireability.txt 14:27 CTLFireability.xml 16:12 LTLCardinality.txt 16:12 LTLCardinality.xml 16:12 LTLFireability.txt 16:12 LTLFireability.xml 14:44 ReachabilityCardinality.txt 14:44 ReachabilityCardinality.xml 14:40 ReachabilityFireability.txt 14:40 ReachabilityFireability.xml 16:12 UpperBounds.txt 16:12 UpperBounds.xml 18:22 equiv_col 18:22 instance 18:22 iscolored 18:22 model.pnml by BenchKit (invocation template) result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N la/bin/ FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT /model.pnml net model.pnml tion/CTLFireability.xml ite.k:388 ite.k:317 ite.k:296 ite.k:322 ite.k:331 ite.k:296 ite.k:250 ite.k:325 ite.k:331 ite.k:314 ite.k:299 ite.k:314 ite.k:325 ite.k:328 ite.k:299 ite.k:296 ite.k:550 ite.k:325 ite.k:331 ite.k:296 ite.k:317 ite.k:325 ite.k:334 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:253 ite.k:553 ite.k:553 ite.k:317 ite.k:325 ite.k:334 ite.k:322 ite.k:328 ite.k:296 ite.k:317 ite.k:325 ite.k:334 ite.k:296 ite.k:325 ite.k:334 ite.k:296 ite.k:317 ite.k:325 ite.k:334 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:253 ite.k:250 ite.k:550 ite.k:550 ite.k:445 ite.k:253 ite.k:253 ite.k:394 ite.k:250 ite.k:322 ite.k:331 ite.k:296 ite.k:322 ite.k:337 ite.k:314 ite.k:296 ite.k:317 ite.k:314 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:325 ite.k:328 ite.k:299 ite.k:317 ite.k:296 ite.k:314 ite.k:322 ite.k:334 ite.k:296 ite.k:296 ite.k:325 ite.k:334 ite.k:296 ite.k:325 ite.k:331 ite.k:296 ite.k:394 ite.k:253 ite.k:544 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:250 ite.k:314 ite.k:322 ite.k:334 ite.k:296 ite.k:314 ite.k:322 ite.k:340 ite.k:299 ite.k:299 ite.k:296 ite.k:250 ite.k:314 ite.k:322 ite.k:328 ite.k:317 ite.k:322 ite.k:334 ite.k:296 ite.k:325 ite.k:334 ite.k:296 ite.k:314 ite.k:322 ite.k:328 ite.k:296 ite.k:317 ite.k:325 ite.k:334 ite.k:299 ite.k:317 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:299 ite.k:250 ite.k:250 ite.k:250 ite.k:314 ite.k:322 ite.k:328 ite.k:296 ite.k:314 ite.k:296 ite.k:314 ite.k:322 ite.k:334 ite.k:296 ite.k:296 ite.k:317 ite.k:325 ite.k:328 ite.k:296 ite.k:325 ite.k:331 ite.k:296 ite.k:250 ite.k:314 ite.k:322 ite.k:337 ite.k:296 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:253 ite.k:550 ite.k:250 ite.k:325 ite.k:331 ite.k:296 ite.k:544 ite.k:388 places removed ite.k:807 for 47 GPUForwardProgress-PT-36a-CTLFireability-13 ite.k:730 ite.k:679 ite.k:679 ite.k:809 ite.k:806 ite.k:807 ite.k:811 for 0 GPUForwardProgress-PT-36a-CTLFireability-00 for GPUForwardProgress-PT-36a-CTLFireability-13 0.000000 1 ite.k:812 ite.k:812 ite.k:806 ite.k:812 ite.k:812 ite.k:811 ite.k:809 ite.k:808 ite.k:809 ite.k:808 ite.k:806 ite.k:812 ite.k:807 ite.k:809 for GPUForwardProgress-PT-36a-CTLFireability-00 6 6 0.000000 1 for 26 GPUForwardProgress-PT-36a-CTLFireability-06 ite.k:806 ite.k:813 ite.k:809 ite.k:813 ite.k:806 ite.k:812 ite.k:812 ite.k:812 ite.k:806 ite.k:813 ite.k:806 ite.k:813 ite.k:811 ite.k:813 ite.k:809 ite.k:813 ite.k:808 ite.k:811 ite.k:806 ite.k:807 ite.k:807 ite.k:811 ite.k:809 ite.k:809 ite.k:806 ite.k:814 ite.k:809 ite.k:807 ite.k:812 ite.k:812 ite.k:811 ite.k:812 ite.k:808 ite.k:808 ite.k:812 ite.k:806 ite.k:813 ite.k:806 ite.k:807 ite.k:813 ite.k:811 ite.k:812 ite.k:811 ite.k:813 ite.k:814 ite.k:808 ite.k:811 ite.k:811 ite.k:807 ite.k:810 ite.k:809 ite.k:813 ite.k:807 ite.k:808 ite.k:813 ite.k:807 ite.k:812 ite.k:806 ite.k:806 ite.k:812 ite.k:815 ite.k:811 ite.k:721 ite.k:787 ite.k:810 ite.k:811 ite.k:813 ite.k:808 ite.k:807 ite.k:812 ite.k:812 ite.k:811 ite.k:807 ite.k:812 ite.k:807 ite.k:813 ite.k:809 ite.k:814 ite.k:807 ite.k:806 ite.k:807 ite.k:809 ite.k:811 ite.k:809 ite.k:812 ite.k:806 ite.k:721 ite.k:787 ite.k:721 ite.k:787 ite.k:721 ite.k:787 ite.k:721 ite.k:787 for 53 GPUForwardProgress-PT-36a-CTLFireability-15 for 53 GPUForwardProgress-PT-36a-CTLFireability-15 ite.k:721 ite.k:787 for 53 GPUForwardProgress-PT-36a-CTLFireability-15 ite.k:721 ite.k:787 for GPUForwardProgress-PT-36a-CTLFireability-15 0.000000 1 for 53 GPUForwardProgress-PT-36a-CTLFireability-15 for GPUForwardProgress-PT-36a-CTLFireability-15 1 0.000000 0 for GPUForwardProgress-PT-36a-CTLFireability-15 (obsolete) for GPUForwardProgress-PT-36a-CTLFireability-15 (obsolete) for GPUForwardProgress-PT-36a-CTLFireability-15 1 1 0.000000 0 cution/CTLFireability-69.sara. is non-deterministic for GPUForwardProgress-PT-36a-CTLFireability-15 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 GPUForwardProgress-PT-36a-CTLFireability-06 918250 m, 183650 m/sec, 5085975 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 GPUForwardProgress-PT-36a-CTLFireability-06 1692881 m, 154926 m/sec, 9804012 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 GPUForwardProgress-PT-36a-CTLFireability-06 2446965 m, 150816 m/sec, 14451055 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 GPUForwardProgress-PT-36a-CTLFireability-06 3144930 m, 139593 m/sec, 19113284 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 GPUForwardProgress-PT-36a-CTLFireability-06 3963773 m, 163768 m/sec, 24080540 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 GPUForwardProgress-PT-36a-CTLFireability-06 4666981 m, 140641 m/sec, 28690892 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 GPUForwardProgress-PT-36a-CTLFireability-06 5411599 m, 148923 m/sec, 33573926 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 GPUForwardProgress-PT-36a-CTLFireability-06 6104762 m, 138632 m/sec, 38407114 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 GPUForwardProgress-PT-36a-CTLFireability-06 6909980 m, 161043 m/sec, 43493185 t fired, . VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 GPUForwardProgress-PT-36a-CTLFireability-06 7655343 m, 149072 m/sec, 48306946 t fired, . for GPUForwardProgress-PT-36a-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 50 GPUForwardProgress-PT-36a-CTLFireability-14 for GPUForwardProgress-PT-36a-CTLFireability-14 5 10 0.000000 1 for 47 GPUForwardProgress-PT-36a-CTLFireability-13 for GPUForwardProgress-PT-36a-CTLFireability-13 0.000000 1 for 41 GPUForwardProgress-PT-36a-CTLFireability-11 for GPUForwardProgress-PT-36a-CTLFireability-11 2 5 0.000000 1 for 38 GPUForwardProgress-PT-36a-CTLFireability-10 for GPUForwardProgress-PT-36a-CTLFireability-10 2 2 0.000000 1 for 35 GPUForwardProgress-PT-36a-CTLFireability-09 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 GPUForwardProgress-PT-36a-CTLFireability-09 579694 m, 115938 m/sec, 5931861 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 GPUForwardProgress-PT-36a-CTLFireability-09 1109951 m, 106051 m/sec, 12075931 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 GPUForwardProgress-PT-36a-CTLFireability-09 1605617 m, 99133 m/sec, 17832473 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 GPUForwardProgress-PT-36a-CTLFireability-09 2050513 m, 88979 m/sec, 23502119 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 GPUForwardProgress-PT-36a-CTLFireability-09 2522583 m, 94414 m/sec, 29336599 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 GPUForwardProgress-PT-36a-CTLFireability-09 2951345 m, 85752 m/sec, 35253287 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 GPUForwardProgress-PT-36a-CTLFireability-09 3439866 m, 97704 m/sec, 40812183 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 GPUForwardProgress-PT-36a-CTLFireability-09 3882030 m, 88432 m/sec, 46353300 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 GPUForwardProgress-PT-36a-CTLFireability-09 4326435 m, 88881 m/sec, 51873687 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 GPUForwardProgress-PT-36a-CTLFireability-09 4747639 m, 84240 m/sec, 57374481 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 GPUForwardProgress-PT-36a-CTLFireability-09 5165733 m, 83618 m/sec, 63042772 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 GPUForwardProgress-PT-36a-CTLFireability-09 5576991 m, 82251 m/sec, 68670618 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 GPUForwardProgress-PT-36a-CTLFireability-09 5960842 m, 76770 m/sec, 74416529 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 GPUForwardProgress-PT-36a-CTLFireability-09 6439716 m, 95774 m/sec, 79794395 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 GPUForwardProgress-PT-36a-CTLFireability-09 6870825 m, 86221 m/sec, 85207095 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 GPUForwardProgress-PT-36a-CTLFireability-09 7300751 m, 85985 m/sec, 90566798 t fired, . for GPUForwardProgress-PT-36a-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 32 GPUForwardProgress-PT-36a-CTLFireability-08 for GPUForwardProgress-PT-36a-CTLFireability-08 1 0.000000 1 for 29 GPUForwardProgress-PT-36a-CTLFireability-07 for GPUForwardProgress-PT-36a-CTLFireability-07 3225 8623 0.000000 1 for 20 GPUForwardProgress-PT-36a-CTLFireability-04 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 GPUForwardProgress-PT-36a-CTLFireability-04 904782 m, 180956 m/sec, 2935412 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 GPUForwardProgress-PT-36a-CTLFireability-04 1817673 m, 182578 m/sec, 8350633 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 GPUForwardProgress-PT-36a-CTLFireability-04 2624739 m, 161413 m/sec, 13496825 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 GPUForwardProgress-PT-36a-CTLFireability-04 3470469 m, 169146 m/sec, 18685665 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 GPUForwardProgress-PT-36a-CTLFireability-04 4217707 m, 149447 m/sec, 23607928 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 GPUForwardProgress-PT-36a-CTLFireability-04 4956811 m, 147820 m/sec, 28496629 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 GPUForwardProgress-PT-36a-CTLFireability-04 5747590 m, 158155 m/sec, 33571159 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 GPUForwardProgress-PT-36a-CTLFireability-04 6494408 m, 149363 m/sec, 38454206 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 GPUForwardProgress-PT-36a-CTLFireability-04 7219856 m, 145089 m/sec, 43339036 t fired, . for GPUForwardProgress-PT-36a-CTLFireability-04 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 17 GPUForwardProgress-PT-36a-CTLFireability-03 for GPUForwardProgress-PT-36a-CTLFireability-03 270537 335271 0.000000 2 for 14 GPUForwardProgress-PT-36a-CTLFireability-02 for GPUForwardProgress-PT-36a-CTLFireability-02 1825 3677 1.000000 1 for 11 GPUForwardProgress-PT-36a-CTLFireability-01 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 GPUForwardProgress-PT-36a-CTLFireability-01 531365 m, 106273 m/sec, 5243020 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 GPUForwardProgress-PT-36a-CTLFireability-01 1058304 m, 105387 m/sec, 10991214 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 GPUForwardProgress-PT-36a-CTLFireability-01 1551517 m, 98642 m/sec, 16636262 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 GPUForwardProgress-PT-36a-CTLFireability-01 2041173 m, 97931 m/sec, 22242836 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 GPUForwardProgress-PT-36a-CTLFireability-01 2521613 m, 96088 m/sec, 27861555 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 GPUForwardProgress-PT-36a-CTLFireability-01 3002925 m, 96262 m/sec, 33304621 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 GPUForwardProgress-PT-36a-CTLFireability-01 3451114 m, 89637 m/sec, 38593859 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 GPUForwardProgress-PT-36a-CTLFireability-01 3890650 m, 87907 m/sec, 43866024 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 GPUForwardProgress-PT-36a-CTLFireability-01 4295394 m, 80948 m/sec, 49016347 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 GPUForwardProgress-PT-36a-CTLFireability-01 4719968 m, 84914 m/sec, 54249517 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 GPUForwardProgress-PT-36a-CTLFireability-01 5138529 m, 83712 m/sec, 59508811 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 GPUForwardProgress-PT-36a-CTLFireability-01 5583429 m, 88980 m/sec, 64749912 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 GPUForwardProgress-PT-36a-CTLFireability-01 6028797 m, 89073 m/sec, 69929358 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 GPUForwardProgress-PT-36a-CTLFireability-01 6458317 m, 85904 m/sec, 75073547 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 GPUForwardProgress-PT-36a-CTLFireability-01 6871309 m, 82598 m/sec, 80253809 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 GPUForwardProgress-PT-36a-CTLFireability-01 7289739 m, 83686 m/sec, 85484127 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 GPUForwardProgress-PT-36a-CTLFireability-01 7720317 m, 86115 m/sec, 90848194 t fired, . for GPUForwardProgress-PT-36a-CTLFireability-01 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 1 0 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 0 GPUForwardProgress-PT-36a-CTLFireability-00 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 GPUForwardProgress-PT-36a-CTLFireability-00 558606 m, 111721 m/sec, 6058140 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 GPUForwardProgress-PT-36a-CTLFireability-00 1075006 m, 103280 m/sec, 12184022 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 GPUForwardProgress-PT-36a-CTLFireability-00 1544611 m, 93921 m/sec, 18155427 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 GPUForwardProgress-PT-36a-CTLFireability-00 2043462 m, 99770 m/sec, 24127641 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 GPUForwardProgress-PT-36a-CTLFireability-00 2506432 m, 92594 m/sec, 30040527 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 GPUForwardProgress-PT-36a-CTLFireability-00 2925789 m, 83871 m/sec, 35594043 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 GPUForwardProgress-PT-36a-CTLFireability-00 3381363 m, 91114 m/sec, 41427350 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 GPUForwardProgress-PT-36a-CTLFireability-00 3857294 m, 95186 m/sec, 47400369 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 GPUForwardProgress-PT-36a-CTLFireability-00 4304508 m, 89442 m/sec, 53194529 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 GPUForwardProgress-PT-36a-CTLFireability-00 4718853 m, 82869 m/sec, 58941425 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 GPUForwardProgress-PT-36a-CTLFireability-00 5172978 m, 90825 m/sec, 64750142 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 GPUForwardProgress-PT-36a-CTLFireability-00 5587908 m, 82986 m/sec, 70475932 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 GPUForwardProgress-PT-36a-CTLFireability-00 5985574 m, 79533 m/sec, 76059482 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 GPUForwardProgress-PT-36a-CTLFireability-00 6381493 m, 79183 m/sec, 81672244 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 GPUForwardProgress-PT-36a-CTLFireability-00 6880446 m, 99790 m/sec, 87766604 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 GPUForwardProgress-PT-36a-CTLFireability-00 7336979 m, 91306 m/sec, 93602726 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 1 0 4 0 0 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 GPUForwardProgress-PT-36a-CTLFireability-00 7757532 m, 84110 m/sec, 99296901 t fired, . for GPUForwardProgress-PT-36a-CTLFireability-00 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 23 GPUForwardProgress-PT-36a-CTLFireability-05 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 GPUForwardProgress-PT-36a-CTLFireability-05 647628 m, 129525 m/sec, 6632378 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 GPUForwardProgress-PT-36a-CTLFireability-05 1242149 m, 118904 m/sec, 13364031 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 GPUForwardProgress-PT-36a-CTLFireability-05 1811106 m, 113791 m/sec, 19879106 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 GPUForwardProgress-PT-36a-CTLFireability-05 2334683 m, 104715 m/sec, 26355195 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 GPUForwardProgress-PT-36a-CTLFireability-05 2896970 m, 112457 m/sec, 32716060 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 GPUForwardProgress-PT-36a-CTLFireability-05 3416641 m, 103934 m/sec, 39014035 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 GPUForwardProgress-PT-36a-CTLFireability-05 3927047 m, 102081 m/sec, 45273515 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 GPUForwardProgress-PT-36a-CTLFireability-05 4411241 m, 96838 m/sec, 51547270 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 GPUForwardProgress-PT-36a-CTLFireability-05 4905806 m, 98913 m/sec, 57757086 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 GPUForwardProgress-PT-36a-CTLFireability-05 5426763 m, 104191 m/sec, 63808544 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 GPUForwardProgress-PT-36a-CTLFireability-05 5880074 m, 90662 m/sec, 69504617 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 GPUForwardProgress-PT-36a-CTLFireability-05 6378560 m, 99697 m/sec, 75554265 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 GPUForwardProgress-PT-36a-CTLFireability-05 6841965 m, 92681 m/sec, 81575407 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 GPUForwardProgress-PT-36a-CTLFireability-05 7293324 m, 90271 m/sec, 87381527 t fired, . for GPUForwardProgress-PT-36a-CTLFireability-05 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CONJ 0 0 0 0 4 0 1 1 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 44 GPUForwardProgress-PT-36a-CTLFireability-12 for GPUForwardProgress-PT-36a-CTLFireability-12 636 1212 0.000000 1 tasks 16 VALUE PRODUCED BY CONJ unknown CONJ CTL unknown AGGR CTL false CTL model checker CTL true CTL model checker CTL unknown AGGR CTL unknown AGGR CTL unknown AGGR CTL false CTL model checker CTL true CTL model checker CTL unknown AGGR CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CONJ false findpath

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-36a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is GPUForwardProgress-PT-36a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r198-smll-167840344700130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-36a.tgz
mv GPUForwardProgress-PT-36a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;