Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r175-tall-167838864000466.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is FunctionPointer-PT-c032, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r175-tall-167838864000466
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.6M
-rw-r--r-- 1 mcc users 7.2K Feb 25 11:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 11:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 11:53 CTLFireability.txt
-rw-r--r-- 1 mcc users 36K Feb 25 11:53 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 109K Feb 25 12:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 11:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 25 11:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 4.2M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1678520742612

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=FunctionPointer-PT-c032
Not applying reductions.
Model is PT
ReachabilityDeadlock PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=/home/mcc/BenchKit/bin//../marcie/bin//ReachabilityDeadlock.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: FunctionPointer_PT_c032
(NrP: 2826 NrTr: 8960 NrArc: 36096)

parse formulas
formulas created successfully
place and transition orderings generation:0m 2.990sec

net check time: 0m 0.006sec

init dd package: 0m 2.845sec

TIME LIMIT: Killed by timeout after 1800 seconds
MemTotal: 16393916 kB
MemFree: 9175844 kB
After kill :
MemTotal: 16393916 kB
MemFree: 16231116 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
l24
l56
l2208
l214
l435
l878
l1765
l1876
l2209
p2329
l2542
l2764
l6
l15
l27
l38
l49
l61
l72
l83
l94
l105
l116
l126
l137
l148
l159
l170
l181
l203
l215
l226
l237
l258
l269
l291
l302
l313
l325
l347
l358
l369
l391
l413
l447
l768
l779
l790
l801
l812
l823
l834
l845
l856
l867
l879
l890
l1732
l1743
l1766
l1777
l1799
p1819
l1832
l1843
l1865
l1877
l1888
l1899
p1919
l1921
l1932
l1943
l1954
l1965
l2186
l2197
p2219
l2221
l2232
l2254
l2265
l2276
l2298
l2309
l2321
l2332
l2354
l2365
l2376
l2387
l2398
l2409
p2429
l2432
l2443
l2454
l2465
l2476
l2498
l2509
p2529
l2531
l2565
l2576
l2587
l2598
l2609
l2698
l2709
p2729
l2731
l2742
l2753
l2765
l2776
l2787
l2798
l2809
l814
l815
l816
l817
l818
l819
l820
l821
l822
l824
l825
l826
l827
l828
l829
l830
l831
l832
l833
l835
l836
l837
l838
l839
l840
l841
l842
l843
l844
l846
l847
s6
s7
l1
l2
l3
l4
l5
l7
l8
l9
l10
l11
l12
l13
l14
l16
l17
l18
l19
l20
l21
l22
l23
l25
l26
l28
l29
l30
l31
l32
l33
l34
l35
l36
l37
l39
l40
l41
l42
l43
l44
l45
l46
l47
l48
l50
l51
l52
l53
l54
l55
l57
l58
l59
l60
l62
l63
l65
l66
l67
l68
l69
l70
l71
l73
l74
l75
l76
l77
l78
l79
l80
l81
l82
l84
l85
l86
l87
l88
l89
l90
l91
l92
l93
l95
l96
l97
l98
l99
l100
l101
l102
l103
l104
l106
l107
l108
l109
l110
l111
l112
l113
l114
l115
l117
l118
l119
l120
l121
l122
l123
l124
l125
l127
l129
l130
l131
l132
l133
l134
l135
l136
l138
l139
l140
l141
l142
l143
l144
l145
l146
l147
l149
l150
l151
l152
l153
l154
l155
l156
l157
l158
l161
l162
l163
l164
l165
l166
l167
l168
l169
l171
l172
l173
l174
l175
l176
l177
l178
l179
l180
l182
l183
l184
l185
l186
l187
l188
l189
l190
l191
l193
l194
l195
l196
l197
l198
l199
l200
l201
l202
l204
l205
l206
l207
l209
l210
l211
l212
l213
l216
l217
l218
l219
l220
l221
l222
l223
l225
l227
l228
l229
l230
l231
l232
l233
l234
l235
l236
l238
l239
l241
l242
l243
l244
l245
l246
l247
l248
l249
l250
l251
l252
l253
l254
l255
l257
l259
l260
l261
l262
l263
l265
l266
l267
l268
l270
l271
l273
l274
l275
l276
l277
l278
l279
l281
l282
l283
l284
l285
l286
l287
l289
l290
l292
l293
l294
l295
l297
l298
l299
l300
l301
l303
l305
l306
l307
l308
l309
l310
l311
l314
l315
l316
l317
l318
l319
l321
l322
l323
l326
l327
l329
l330
l331
l333
l334
l335
l337
l338
l339
l341
l342
l343
l345
l346
l349
l350
l351
l353
l354
l355
l357
l359
l361
l362
l363
l365
l366
l367
l370
l371
l373
l374
l375
l377
l378
l379
l381
l382
l383
l385
l387
l389
l393
l395
l397
l399
l401
l403
l405
l407
l409
l411
l415
l417
l419
l421
l423
l425
l427
l429
l431
l433
l437
l439
l441
l443
l445
l769
l770
l771
l772
l773
l774
l775
l776
l777
l778
l780
l781
l782
l783
l784
l785
l786
l787
l788
l789
l791
l792
l793
l794
l795
l796
l797
l798
l799
l800
l802
l803
l804
l805
l806
l807
l808
l809
l810
l811
l813
l848
l849
l850
l851
l852
l853
l854
l855
l857
l858
l859
l860
l861
l862
l863
l864
l865
l866
l868
l869
l870
l871
l872
l873
l874
l875
l876
l877
l880
l881
l882
l883
l884
l885
l886
l887
l888
l889
l891
l892
l893
l894
l895
l1728
l1729
p1739
l1731
l1733
l1734
l1735
l1736
l1737
l1738
l1739
p1749
l1741
l1742
l1744
l1745
l1746
l1747
l1748
l1749
p1759
l1751
p1769
l1761
l1762
l1763
l1764
l1767
l1768
l1769
p1779
l1771
l1772
l1773
l1774
l1775
l1776
l1778
l1779
p1789
l1781
l1782
l1783
l1792
l1793
l1794
l1795
l1796
l1797
l1798
p1809
l1801
l1802
l1803
l1804
l1805
l1806
l1807
l1808
l1809
l1811
l1812
l1813
l1814
l1815
l1824
l1825
l1826
l1827
l1828
l1829
p1839
l1831
l1833
l1834
l1835
l1836
l1837
l1838
l1839
p1849
l1841
l1842
l1844
l1845
l1846
l1847
l1856
l1857
l1858
l1859
p1869
l1861
l1862
l1863
l1864
l1866
l1867
l1868
l1869
p1879
l1871
l1872
l1873
l1874
l1875
l1878
l1879
p1889
l1881
l1882
l1883
l1884
l1885
l1886
l1887
l1889
p1899
l1891
l1892
l1893
l1894
l1895
l1896
l1897
l1898
p1909
l1901
l1902
l1903
l1904
l1905
l1906
l1907
l1908
l1909
l1911
p1929
l1922
l1923
l1924
l1925
l1926
l1927
l1928
l1929
p1939
l1931
l1933
l1934
l1935
l1936
l1937
l1938
l1939
p1949
l1941
l1942
l1944
l1945
l1946
l1947
l1948
l1949
p1959
l1951
l1952
l1953
l1955
l1956
l1957
l1958
l1959
p1969
l1961
l1962
l1963
l1964
l1966
l1967
l1968
l1969
p1979
l1971
l1972
l1973
l1974
l1975
l2176
l2177
l2178
p2189
l2181
l2182
l2184
l2185
l2188
l2189
p2199
l2192
l2193
l2194
l2196
l2198
p2209
l2201
l2202
l2204
l2205
l2206
l2212
l2213
l2214
l2216
l2217
l2218
p2229
l2222
l2224
l2225
l2226
l2228
l2229
p2239
l2233
l2234
l2236
l2237
l2238
p2249
l2241
l2242
l2244
l2245
l2246
l2248
l2249
p2259
l2252
l2253
l2256
l2257
l2258
p2269
l2261
l2262
l2264
l2266
l2268
l2269
p2279
l2272
l2273
l2274
l2277
l2278
p2289
l2281
l2282
l2284
l2285
l2286
l2288
l2289
p2299
l2292
l2293
l2294
l2296
l2297
p2309
l2301
l2302
l2304
l2305
l2306
l2307
l2308
p2319
l2312
l2313
l2314
l2315
l2316
l2317
l2318
l2322
l2323
l2324
l2325
l2326
l2328
l2329
p2339
l2331
l2333
l2334
l2336
l2337
l2338
l2339
p2349
l2341
l2342
l2344
l2345
l2346
l2347
l2348
l2349
p2359
l2352
l2353
l2355
l2356
l2357
l2358
p2369
l2361
l2362
l2363
l2364
l2366
l2368
l2369
p2379
l2371
l2372
l2373
l2374
l2377
l2378
l2379
p2389
l2381
l2382
l2384
l2385
l2386
l2388
l2389
p2399
l2392
l2393
l2394
l2395
l2396
l2397
p2409
l2401
l2402
l2403
l2404
l2405
l2406
l2408
p2419
l2411
l2412
l2413
l2414
l2416
l2417
l2418
l2419
l2421
l2422
l2433
l2434
l2435
l2436
l2437
l2438
p2449
l2441
l2442
l2444
l2445
l2446
l2448
l2449
p2459
l2451
l2452
l2453
l2456
l2457
l2458
l2459
p2469
l2461
l2462
l2464
l2466
l2467
l2468
l2469
p2479
l2472
l2473
l2474
l2475
l2477
l2478
p2489
l2481
l2482
l2483
l2484
l2485
l2486
l2496
l2497
l2499
p2509
l2501
l2502
l2504
l2505
l2506
l2507
l2508
p2519
l2512
l2513
l2514
l2515
l2516
l2517
l2518
l2521
l2522
l2523
l2524
l2525
l2526
l2528
l2529
p2539
l2532
l2533
l2534
l2536
l2537
l2538
l2539
p2549
l2541
l2544
l2545
l2546
l2547
l2548
l2549
p2559
p2569
l2561
l2562
l2563
l2564
l2566
l2568
l2569
p2579
l2571
l2572
l2573
l2574
l2577
l2578
l2579
p2589
l2581
l2582
l2584
l2585
l2586
l2588
l2589
p2599
l2592
l2593
l2594
l2595
l2596
l2597
p2609
l2601
l2602
l2603
l2604
l2605
l2606
l2608
p2619
l2611
l2612
l2613
l2614
l2688
l2689
p2699
l2691
l2692
l2693
l2694
l2695
l2696
l2697
l2699
p2709
l2701
l2702
l2703
l2704
l2705
l2706
l2707
l2708
p2719
l2711
l2712
l2713
l2714
l2715
l2716
l2717
l2718
l2719
l2721
l2722
l2723
l2724
l2725
l2726
l2727
l2728
l2729
p2739
l2732
l2733
l2734
l2735
l2736
l2737
l2738
l2739
p2749
l2741
l2743
l2744
l2745
l2746
l2747
l2748
l2749
p2759
l2751
l2752
l2754
l2755
l2756
l2757
l2758
l2759
p2769
l2761
l2762
l2763
l2766
l2767
l2768
l2769
p2779
l2771
l2772
l2773
l2774
l2775
l2777
l2778
l2779
p2789
l2781
l2782
l2783
l2784
l2785
l2786
l2788
l2789
p2799
l2791
l2792
l2793
l2794
l2795
l2796
l2797
l2799
p2809
l2801
l2802
l2803
l2804
l2805
l2806
l2807
l2808
p2819
l2811
l2812
l2813
l2814
l2815

The net has transition(s) that can never fire:
t778
t779
t774
t775
t782
t783
t786
t787
t810
t811
t814
t815
t818
t819
t770
t771
t4109
t4110
t4111
t4112
t4113
t4114
t4115
t4116
t4117
t4118
t4119
t4120
t4121
t4122
t4123
t4124
t4125
t4126
t4127
t4128
t4129
t4130
t4131
t4132
t4133
t4134
t4135
t4136
t4137
t4138
t4139
t4140
t4141
t4142
t4143
t4144
t4145
t4146
t4147
t4148
t4149
t4150
t4151
t4152
t4153
t4154
t4155
t4156
t4157
t4158
t4159
t4160
t4161
t4162
t4163
t4164
t4165
t4166
t4167
t4168
t4169
t4170
t4171
t4172
t4173
t4174
t4175
t1152
t1153
t1154
t1155
t1156
t1157
t1158
t1159
t1160
t1161
t1162
t1163
t1164
t1165
t1166
t1167
t1168
t1169
t1170
t1171
t1172
t1173
t1174
t1175
t1176
t1177
t1178
t1179
t1180
t1181
t1182
t1183
t1184
t1185
t1186
t1187
t1188
t1189
t1190
t1191
t1192
t1193
t1194
t1195
t1196
t1197
t1198
t1199
t1200
t1201
t1202
t1203
t1204
t1205
t1206
t1207
t1208
t1209
t1210
t1211
t1212
t1213
t1214
t1215
t3778
t8320
t8321
t8323
t8324
t8325
t8326
t8328
t8329
t8330
t8331
t8332
t8333
t8334
t8336
t8337
t8338
t8339
t8340
t8341
t8342
t8344
t8345
t8346
t8347
t8348
t8349
t8350
t8352
t8353
t8354
t8355
t8356
t8357
t8358
t8360
t8361
t8362
t8363
t8364
t8365
t8366
t8368
t8369
t8370
t8371
t8372
t8373
t8374
t8384
t8385
t8386
t8387
t8388
t8389
t8390
t8392
t8393
t8394
t8395
t8396
t8397
t8398
t8400
t8401
t8402
t8403
t8404
t8405
t8406
t8408
t8409
t8410
t8411
t8412
t8413
t8414
t8416
t8417
t8418
t8419
t8420
t8421
t8422
t8424
t8425
t8426
t8427
t8428
t8429
t8430
t8432
t8433
t8434
t8435
t8436
t8437
t8438
t8578
t4354
t4355
t4356
t4357
t4226
t4227
t4100
t4101
t4102
t4103
t4104
t4105
t4106
t4107
t4108
t2528
t2529
t2530
t2531
t2532
t2533
t2534
t2535
t2536
t2537
t2538
t2539
t2540
t2541
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check for constant places
s6
s7
found 2 constant places
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.052sec

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FunctionPointer-PT-c032"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is FunctionPointer-PT-c032, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r175-tall-167838864000466"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FunctionPointer-PT-c032.tgz
mv FunctionPointer-PT-c032 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;