Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r170-tall-167838856700114.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marciexred
Input is Echo-PT-d05r03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r170-tall-167838856700114
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.8M
-rw-r--r-- 1 mcc users 6.0K Feb 25 14:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 25 14:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 14:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 14:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 25 14:12 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 173K Feb 25 14:12 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 25 14:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 25 14:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.3M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d05r03-CTLFireability-00
FORMULA_NAME Echo-PT-d05r03-CTLFireability-01
FORMULA_NAME Echo-PT-d05r03-CTLFireability-02
FORMULA_NAME Echo-PT-d05r03-CTLFireability-03
FORMULA_NAME Echo-PT-d05r03-CTLFireability-04
FORMULA_NAME Echo-PT-d05r03-CTLFireability-05
FORMULA_NAME Echo-PT-d05r03-CTLFireability-06
FORMULA_NAME Echo-PT-d05r03-CTLFireability-07
FORMULA_NAME Echo-PT-d05r03-CTLFireability-08
FORMULA_NAME Echo-PT-d05r03-CTLFireability-09
FORMULA_NAME Echo-PT-d05r03-CTLFireability-10
FORMULA_NAME Echo-PT-d05r03-CTLFireability-11
FORMULA_NAME Echo-PT-d05r03-CTLFireability-12
FORMULA_NAME Echo-PT-d05r03-CTLFireability-13
FORMULA_NAME Echo-PT-d05r03-CTLFireability-14
FORMULA_NAME Echo-PT-d05r03-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678487082112

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marciexred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d05r03
Applying reductions before tool marcie
Invoking reducer
Running Version 202303021504
[2023-03-10 22:24:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 22:24:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 22:24:43] [INFO ] Load time of PNML (sax parser for PT used): 233 ms
[2023-03-10 22:24:43] [INFO ] Transformed 3717 places.
[2023-03-10 22:24:43] [INFO ] Transformed 3222 transitions.
[2023-03-10 22:24:43] [INFO ] Found NUPN structural information;
[2023-03-10 22:24:43] [INFO ] Parsed PT model containing 3717 places and 3222 transitions and 28404 arcs in 381 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 446 out of 3717 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3717/3717 places, 3222/3222 transitions.
Reduce places removed 243 places and 0 transitions.
Iterating post reduction 0 with 243 rules applied. Total rules applied 243 place count 3474 transition count 3222
Applied a total of 243 rules in 315 ms. Remains 3474 /3717 variables (removed 243) and now considering 3222/3222 (removed 0) transitions.
// Phase 1: matrix 3222 rows 3474 cols
[2023-03-10 22:24:54] [INFO ] Invariants computation overflowed in 9663 ms
[2023-03-10 22:24:54] [INFO ] Implicit Places using invariants in 10443 ms returned []
// Phase 1: matrix 3222 rows 3474 cols
[2023-03-10 22:25:04] [INFO ] Invariants computation overflowed in 10125 ms
[2023-03-10 22:25:05] [INFO ] Implicit Places using invariants and state equation in 10876 ms returned []
Implicit Place search using SMT with State Equation took 21344 ms to find 0 implicit places.
// Phase 1: matrix 3222 rows 3474 cols
[2023-03-10 22:25:15] [INFO ] Invariants computation overflowed in 9880 ms
[2023-03-10 22:25:17] [INFO ] Dead Transitions using invariants and state equation in 11880 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 3474/3717 places, 3222/3222 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33543 ms. Remains : 3474/3717 places, 3222/3222 transitions.
Support contains 446 out of 3474 places after structural reductions.
[2023-03-10 22:25:18] [INFO ] Flatten gal took : 425 ms
[2023-03-10 22:25:18] [INFO ] Flatten gal took : 251 ms
[2023-03-10 22:25:18] [INFO ] Input system was already deterministic with 3222 transitions.
Support contains 443 out of 3474 places (down from 446) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 20 resets, run finished after 879 ms. (steps per millisecond=11 ) properties (out of 80) seen :68
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 120 ms. (steps per millisecond=83 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 107 ms. (steps per millisecond=93 ) properties (out of 12) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 3222 rows 3474 cols
[2023-03-10 22:25:30] [INFO ] Invariants computation overflowed in 9880 ms
[2023-03-10 22:25:32] [INFO ] After 1494ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:631)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-10 22:25:57] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-10 22:25:57] [INFO ] After 25043ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Fused 11 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 100 out of 3474 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Graph (complete) has 15811 edges and 3474 vertex of which 3454 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.18 ms
Discarding 20 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 10 place count 3454 transition count 3212
Applied a total of 10 rules in 296 ms. Remains 3454 /3474 variables (removed 20) and now considering 3212/3222 (removed 10) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 297 ms. Remains : 3454/3474 places, 3212/3222 transitions.
Incomplete random walk after 10000 steps, including 20 resets, run finished after 561 ms. (steps per millisecond=17 ) properties (out of 11) seen :6
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 3212 rows 3454 cols
[2023-03-10 22:26:11] [INFO ] Invariants computation overflowed in 12463 ms
[2023-03-10 22:26:36] [INFO ] After 24151ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2
[2023-03-10 22:26:36] [INFO ] After 24163ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-10 22:26:36] [INFO ] After 25042ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :2
Fused 4 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 45 out of 3454 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3454/3454 places, 3212/3212 transitions.
Applied a total of 0 rules in 232 ms. Remains 3454 /3454 variables (removed 0) and now considering 3212/3212 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 234 ms. Remains : 3454/3454 places, 3212/3212 transitions.
Incomplete random walk after 10000 steps, including 20 resets, run finished after 463 ms. (steps per millisecond=21 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 3212 rows 3454 cols
[2023-03-10 22:26:49] [INFO ] Invariants computation overflowed in 12003 ms
[2023-03-10 22:27:14] [INFO ] After 24252ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 22:27:14] [INFO ] After 24265ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1 ms.
[2023-03-10 22:27:14] [INFO ] After 25042ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Fused 3 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 37 out of 3454 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3454/3454 places, 3212/3212 transitions.
Applied a total of 0 rules in 186 ms. Remains 3454 /3454 variables (removed 0) and now considering 3212/3212 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 186 ms. Remains : 3454/3454 places, 3212/3212 transitions.
[2023-03-10 22:27:14] [INFO ] Flatten gal took : 199 ms
[2023-03-10 22:27:15] [INFO ] Flatten gal took : 206 ms
[2023-03-10 22:27:15] [INFO ] Input system was already deterministic with 3222 transitions.
Computed a total of 3474 stabilizing places and 3222 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 3474 transition count 3222
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA Echo-PT-d05r03-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 118 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 119 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:15] [INFO ] Flatten gal took : 200 ms
[2023-03-10 22:27:15] [INFO ] Flatten gal took : 190 ms
[2023-03-10 22:27:16] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Graph (complete) has 15811 edges and 3474 vertex of which 3463 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.20 ms
Discarding 11 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Applied a total of 1 rules in 343 ms. Remains 3463 /3474 variables (removed 11) and now considering 3221/3222 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 347 ms. Remains : 3463/3474 places, 3221/3222 transitions.
[2023-03-10 22:27:16] [INFO ] Flatten gal took : 212 ms
[2023-03-10 22:27:17] [INFO ] Flatten gal took : 209 ms
[2023-03-10 22:27:17] [INFO ] Input system was already deterministic with 3221 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 116 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 116 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:17] [INFO ] Flatten gal took : 179 ms
[2023-03-10 22:27:18] [INFO ] Flatten gal took : 193 ms
[2023-03-10 22:27:18] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 118 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 118 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:18] [INFO ] Flatten gal took : 187 ms
[2023-03-10 22:27:18] [INFO ] Flatten gal took : 194 ms
[2023-03-10 22:27:19] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 116 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 117 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:19] [INFO ] Flatten gal took : 177 ms
[2023-03-10 22:27:19] [INFO ] Flatten gal took : 186 ms
[2023-03-10 22:27:20] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 104 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 106 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:20] [INFO ] Flatten gal took : 177 ms
[2023-03-10 22:27:20] [INFO ] Flatten gal took : 186 ms
[2023-03-10 22:27:21] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 103 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 103 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:21] [INFO ] Flatten gal took : 175 ms
[2023-03-10 22:27:21] [INFO ] Flatten gal took : 186 ms
[2023-03-10 22:27:21] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Graph (complete) has 15811 edges and 3474 vertex of which 3463 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.8 ms
Discarding 11 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 161 ms. Remains 3462 /3474 variables (removed 12) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 162 ms. Remains : 3462/3474 places, 3220/3222 transitions.
[2023-03-10 22:27:22] [INFO ] Flatten gal took : 171 ms
[2023-03-10 22:27:22] [INFO ] Flatten gal took : 181 ms
[2023-03-10 22:27:22] [INFO ] Input system was already deterministic with 3220 transitions.
Finished random walk after 67 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=22 )
FORMULA Echo-PT-d05r03-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 104 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 105 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:23] [INFO ] Flatten gal took : 175 ms
[2023-03-10 22:27:23] [INFO ] Flatten gal took : 186 ms
[2023-03-10 22:27:23] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 107 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 107 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:24] [INFO ] Flatten gal took : 174 ms
[2023-03-10 22:27:24] [INFO ] Flatten gal took : 186 ms
[2023-03-10 22:27:24] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 106 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 106 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:24] [INFO ] Flatten gal took : 171 ms
[2023-03-10 22:27:25] [INFO ] Flatten gal took : 182 ms
[2023-03-10 22:27:25] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 108 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 108 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:25] [INFO ] Flatten gal took : 184 ms
[2023-03-10 22:27:25] [INFO ] Flatten gal took : 196 ms
[2023-03-10 22:27:26] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Graph (complete) has 15811 edges and 3474 vertex of which 3463 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.8 ms
Discarding 11 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Applied a total of 1 rules in 150 ms. Remains 3463 /3474 variables (removed 11) and now considering 3221/3222 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 150 ms. Remains : 3463/3474 places, 3221/3222 transitions.
[2023-03-10 22:27:26] [INFO ] Flatten gal took : 172 ms
[2023-03-10 22:27:26] [INFO ] Flatten gal took : 181 ms
[2023-03-10 22:27:27] [INFO ] Input system was already deterministic with 3221 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 105 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 105 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:27] [INFO ] Flatten gal took : 198 ms
[2023-03-10 22:27:27] [INFO ] Flatten gal took : 180 ms
[2023-03-10 22:27:28] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3474/3474 places, 3222/3222 transitions.
Applied a total of 0 rules in 104 ms. Remains 3474 /3474 variables (removed 0) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 104 ms. Remains : 3474/3474 places, 3222/3222 transitions.
[2023-03-10 22:27:28] [INFO ] Flatten gal took : 171 ms
[2023-03-10 22:27:28] [INFO ] Flatten gal took : 185 ms
[2023-03-10 22:27:28] [INFO ] Input system was already deterministic with 3222 transitions.
[2023-03-10 22:27:29] [INFO ] Flatten gal took : 188 ms
[2023-03-10 22:27:29] [INFO ] Flatten gal took : 189 ms
[2023-03-10 22:27:29] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2023-03-10 22:27:29] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 3474 places, 3222 transitions and 26793 arcs took 25 ms.
Total runtime 165794 ms.
There are residual formulas that ITS could not solve within timeout
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../reducer/bin//../../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: Petri
(NrP: 3474 NrTr: 3222 NrArc: 26793)

parse formulas
formulas created successfully
place and transition orderings generation:0m 2.065sec

net check time: 0m 0.003sec

init dd package: 0m 2.723sec

TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 7322216 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16095964 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
check for maximal unmarked siphon
ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.093sec

3690752

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d05r03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marciexred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marciexred"
echo " Input is Echo-PT-d05r03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r170-tall-167838856700114"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d05r03.tgz
mv Echo-PT-d05r03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;