Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838853600794.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GPPP-PT-C0001N0000001000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838853600794
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 9.4K Feb 26 10:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 26 10:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 26 10:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 10:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 16:10 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:10 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 10:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 26 10:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Feb 26 10:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 134K Feb 26 10:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 17 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1 Mar 5 18:22 large_marking
-rw-r--r-- 1 mcc users 21K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-00
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-01
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-02
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-03
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-04
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-05
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-06
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-07
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-08
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-09
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-10
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-11
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-12
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-13
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-14
FORMULA_NAME GPPP-PT-C0001N0000001000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678526237848

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPPP-PT-C0001N0000001000
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 09:17:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 09:17:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 09:17:19] [INFO ] Load time of PNML (sax parser for PT used): 24 ms
[2023-03-11 09:17:19] [INFO ] Transformed 33 places.
[2023-03-11 09:17:19] [INFO ] Transformed 22 transitions.
[2023-03-11 09:17:19] [INFO ] Parsed PT model containing 33 places and 22 transitions and 83 arcs in 78 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 33 out of 33 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 8 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
// Phase 1: matrix 22 rows 33 cols
[2023-03-11 09:17:19] [INFO ] Computed 13 place invariants in 10 ms
[2023-03-11 09:17:19] [INFO ] Dead Transitions using invariants and state equation in 166 ms found 0 transitions.
[2023-03-11 09:17:19] [INFO ] Invariant cache hit.
[2023-03-11 09:17:19] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-11 09:17:19] [INFO ] Invariant cache hit.
[2023-03-11 09:17:19] [INFO ] Implicit Places using invariants and state equation in 38 ms returned []
Implicit Place search using SMT with State Equation took 72 ms to find 0 implicit places.
[2023-03-11 09:17:19] [INFO ] Invariant cache hit.
[2023-03-11 09:17:19] [INFO ] Dead Transitions using invariants and state equation in 56 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 327 ms. Remains : 33/33 places, 22/22 transitions.
Support contains 33 out of 33 places after structural reductions.
[2023-03-11 09:17:19] [INFO ] Flatten gal took : 16 ms
[2023-03-11 09:17:19] [INFO ] Flatten gal took : 6 ms
[2023-03-11 09:17:19] [INFO ] Input system was already deterministic with 22 transitions.
Incomplete random walk after 10002 steps, including 2 resets, run finished after 309 ms. (steps per millisecond=32 ) properties (out of 44) seen :38
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 6) seen :3
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 128 ms. (steps per millisecond=78 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-11 09:17:20] [INFO ] Invariant cache hit.
[2023-03-11 09:17:20] [INFO ] [Real]Absence check using 6 positive place invariants in 2 ms returned sat
[2023-03-11 09:17:20] [INFO ] [Real]Absence check using 6 positive and 7 generalized place invariants in 4 ms returned sat
[2023-03-11 09:17:20] [INFO ] After 68ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:2
[2023-03-11 09:17:20] [INFO ] [Nat]Absence check using 6 positive place invariants in 2 ms returned sat
[2023-03-11 09:17:20] [INFO ] [Nat]Absence check using 6 positive and 7 generalized place invariants in 3 ms returned sat
[2023-03-11 09:17:20] [INFO ] After 72ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
FORMULA GPPP-PT-C0001N0000001000-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-11 09:17:20] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-11 09:17:20] [INFO ] Flatten gal took : 5 ms
FORMULA GPPP-PT-C0001N0000001000-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-11 09:17:20] [INFO ] Flatten gal took : 4 ms
[2023-03-11 09:17:20] [INFO ] Input system was already deterministic with 22 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 33 transition count 21
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 32 transition count 21
Applied a total of 2 rules in 6 ms. Remains 32 /33 variables (removed 1) and now considering 21/22 (removed 1) transitions.
// Phase 1: matrix 21 rows 32 cols
[2023-03-11 09:17:20] [INFO ] Computed 13 place invariants in 6 ms
[2023-03-11 09:17:20] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 45 ms. Remains : 32/33 places, 21/22 transitions.
[2023-03-11 09:17:20] [INFO ] Flatten gal took : 3 ms
[2023-03-11 09:17:20] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:20] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
// Phase 1: matrix 22 rows 33 cols
[2023-03-11 09:17:20] [INFO ] Computed 13 place invariants in 1 ms
[2023-03-11 09:17:20] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:20] [INFO ] Flatten gal took : 3 ms
[2023-03-11 09:17:20] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:20] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
[2023-03-11 09:17:20] [INFO ] Invariant cache hit.
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 3 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Graph (trivial) has 4 edges and 33 vertex of which 2 / 33 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 32 transition count 20
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 31 transition count 20
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 3 place count 31 transition count 19
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 30 transition count 19
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 7 place count 29 transition count 18
Applied a total of 7 rules in 9 ms. Remains 29 /33 variables (removed 4) and now considering 18/22 (removed 4) transitions.
// Phase 1: matrix 18 rows 29 cols
[2023-03-11 09:17:21] [INFO ] Computed 13 place invariants in 2 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 43 ms. Remains : 29/33 places, 18/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
// Phase 1: matrix 22 rows 33 cols
[2023-03-11 09:17:21] [INFO ] Computed 13 place invariants in 0 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
[2023-03-11 09:17:21] [INFO ] Invariant cache hit.
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 3 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 33 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 32 transition count 21
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 2 place count 32 transition count 20
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 4 place count 31 transition count 20
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 7 place count 29 transition count 19
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 10 place count 27 transition count 18
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 26 transition count 17
Applied a total of 12 rules in 7 ms. Remains 26 /33 variables (removed 7) and now considering 17/22 (removed 5) transitions.
// Phase 1: matrix 17 rows 26 cols
[2023-03-11 09:17:21] [INFO ] Computed 11 place invariants in 1 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 41 ms. Remains : 26/33 places, 17/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 17 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
// Phase 1: matrix 22 rows 33 cols
[2023-03-11 09:17:21] [INFO ] Computed 13 place invariants in 1 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
[2023-03-11 09:17:21] [INFO ] Invariant cache hit.
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
[2023-03-11 09:17:21] [INFO ] Invariant cache hit.
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 33 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 32 transition count 21
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 2 place count 32 transition count 20
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 4 place count 31 transition count 20
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 7 place count 29 transition count 19
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 10 place count 27 transition count 18
Applied a total of 10 rules in 6 ms. Remains 27 /33 variables (removed 6) and now considering 18/22 (removed 4) transitions.
// Phase 1: matrix 18 rows 27 cols
[2023-03-11 09:17:21] [INFO ] Computed 11 place invariants in 1 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 27/33 places, 18/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Graph (trivial) has 4 edges and 33 vertex of which 2 / 33 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 32 transition count 20
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 31 transition count 20
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 3 place count 31 transition count 19
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 30 transition count 19
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 7 place count 29 transition count 18
Applied a total of 7 rules in 4 ms. Remains 29 /33 variables (removed 4) and now considering 18/22 (removed 4) transitions.
// Phase 1: matrix 18 rows 29 cols
[2023-03-11 09:17:21] [INFO ] Computed 13 place invariants in 1 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 29/33 places, 18/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 3 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
// Phase 1: matrix 22 rows 33 cols
[2023-03-11 09:17:21] [INFO ] Computed 13 place invariants in 1 ms
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 3 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 22/22 (removed 0) transitions.
[2023-03-11 09:17:21] [INFO ] Invariant cache hit.
[2023-03-11 09:17:21] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 33/33 places, 22/22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 1 ms
[2023-03-11 09:17:21] [INFO ] Input system was already deterministic with 22 transitions.
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Flatten gal took : 2 ms
[2023-03-11 09:17:21] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-11 09:17:21] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 33 places, 22 transitions and 83 arcs took 0 ms.
Total runtime 2360 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GPPP-PT-C0001N0000001000
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPPP-PT-C0001N0000001000-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678526307489

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 16 (type EXCL) for 15 GPPP-PT-C0001N0000001000-CTLFireability-06
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ 0 3 0 0 3 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/211 9/32 GPPP-PT-C0001N0000001000-CTLFireability-06 1933979 m, 386795 m/sec, 10195225 t fired, .

Time elapsed: 5 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ 0 3 0 0 3 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/211 14/32 GPPP-PT-C0001N0000001000-CTLFireability-06 3205742 m, 254352 m/sec, 20279102 t fired, .

Time elapsed: 10 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ 0 3 0 0 3 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/211 19/32 GPPP-PT-C0001N0000001000-CTLFireability-06 4469037 m, 252659 m/sec, 30314308 t fired, .

Time elapsed: 15 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ 0 3 0 0 3 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/211 25/32 GPPP-PT-C0001N0000001000-CTLFireability-06 5709645 m, 248121 m/sec, 40171870 t fired, .

Time elapsed: 20 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ 0 3 0 0 3 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/211 30/32 GPPP-PT-C0001N0000001000-CTLFireability-06 6956700 m, 249411 m/sec, 50077802 t fired, .

Time elapsed: 25 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 16 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ 0 3 0 0 3 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 30 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: LAUNCH task # 52 (type EXCL) for 51 GPPP-PT-C0001N0000001000-CTLFireability-15
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 GPPP-PT-C0001N0000001000-CTLFireability-14
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-14
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 31 GPPP-PT-C0001N0000001000-CTLFireability-11
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-11
lola: result : false
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 GPPP-PT-C0001N0000001000-CTLFireability-10
lola: time limit : 324 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-10
lola: result : true
lola: markings : 38
lola: fired transitions : 113
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 GPPP-PT-C0001N0000001000-CTLFireability-09
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-09
lola: result : true
lola: markings : 6
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 GPPP-PT-C0001N0000001000-CTLFireability-04
lola: time limit : 396 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-04
lola: result : false
lola: markings : 4602
lola: fired transitions : 16167
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 GPPP-PT-C0001N0000001000-CTLFireability-02
lola: time limit : 446 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-02
lola: result : false
lola: markings : 135
lola: fired transitions : 333
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 GPPP-PT-C0001N0000001000-CTLFireability-01
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-01
lola: result : true
lola: markings : 87482
lola: fired transitions : 335857
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 GPPP-PT-C0001N0000001000-CTLFireability-12
lola: time limit : 595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-12
lola: result : true
lola: markings : 13
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 18 GPPP-PT-C0001N0000001000-CTLFireability-07
lola: time limit : 714 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 18 GPPP-PT-C0001N0000001000-CTLFireability-07
lola: time limit : 892 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-07
lola: result : true
lola: markings : 178
lola: fired transitions : 452
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 GPPP-PT-C0001N0000001000-CTLFireability-03
lola: time limit : 1190 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-03
lola: result : true
lola: markings : 71
lola: fired transitions : 234
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 GPPP-PT-C0001N0000001000-CTLFireability-13
lola: time limit : 1785 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-13
lola: result : true
lola: markings : 41
lola: fired transitions : 124
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 GPPP-PT-C0001N0000001000-CTLFireability-00
lola: time limit : 3570 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/3570 6/32 GPPP-PT-C0001N0000001000-CTLFireability-00 1303674 m, 260734 m/sec, 7355900 t fired, .

Time elapsed: 35 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3570 11/32 GPPP-PT-C0001N0000001000-CTLFireability-00 2505260 m, 240317 m/sec, 14975378 t fired, .

Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/3570 16/32 GPPP-PT-C0001N0000001000-CTLFireability-00 3684353 m, 235818 m/sec, 22536931 t fired, .

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/3570 21/32 GPPP-PT-C0001N0000001000-CTLFireability-00 4861000 m, 235329 m/sec, 30082386 t fired, .

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/3570 25/32 GPPP-PT-C0001N0000001000-CTLFireability-00 6032761 m, 234352 m/sec, 37596573 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/3570 30/32 GPPP-PT-C0001N0000001000-CTLFireability-00 7189560 m, 231359 m/sec, 45014624 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 1 (type EXCL) for GPPP-PT-C0001N0000001000-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: Portfolio finished: no open tasks 14

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPPP-PT-C0001N0000001000-CTLFireability-00: CTL unknown AGGR
GPPP-PT-C0001N0000001000-CTLFireability-01: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-02: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-03: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-04: CTL false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-06: CTL unknown AGGR
GPPP-PT-C0001N0000001000-CTLFireability-07: DISJ true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-09: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-10: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-11: CONJ false CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-12: EGEF true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-13: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-14: CTL true CTL model checker
GPPP-PT-C0001N0000001000-CTLFireability-15: CTL false CTL model checker


Time elapsed: 65 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPPP-PT-C0001N0000001000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GPPP-PT-C0001N0000001000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838853600794"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPPP-PT-C0001N0000001000.tgz
mv GPPP-PT-C0001N0000001000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;