Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838853200546.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FlexibleBarrier-PT-16b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838853200546
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 5.6K Feb 25 12:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Feb 25 12:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 12:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 12:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 25 12:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 102K Feb 25 12:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Feb 25 12:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 12:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 945K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-00
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-01
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-02
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-03
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-04
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-05
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-06
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-07
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-08
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-09
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-10
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-11
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-12
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-13
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-14
FORMULA_NAME FlexibleBarrier-PT-16b-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678488735896

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FlexibleBarrier-PT-16b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 22:52:17] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 22:52:17] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 22:52:17] [INFO ] Load time of PNML (sax parser for PT used): 140 ms
[2023-03-10 22:52:17] [INFO ] Transformed 3472 places.
[2023-03-10 22:52:17] [INFO ] Transformed 4001 transitions.
[2023-03-10 22:52:17] [INFO ] Found NUPN structural information;
[2023-03-10 22:52:17] [INFO ] Parsed PT model containing 3472 places and 4001 transitions and 10043 arcs in 233 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 142 out of 3472 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3472/3472 places, 4001/4001 transitions.
Discarding 1395 places :
Symmetric choice reduction at 0 with 1395 rule applications. Total rules 1395 place count 2077 transition count 2606
Iterating global reduction 0 with 1395 rules applied. Total rules applied 2790 place count 2077 transition count 2606
Discarding 637 places :
Symmetric choice reduction at 0 with 637 rule applications. Total rules 3427 place count 1440 transition count 1969
Iterating global reduction 0 with 637 rules applied. Total rules applied 4064 place count 1440 transition count 1969
Discarding 372 places :
Symmetric choice reduction at 0 with 372 rule applications. Total rules 4436 place count 1068 transition count 1597
Iterating global reduction 0 with 372 rules applied. Total rules applied 4808 place count 1068 transition count 1597
Ensure Unique test removed 159 transitions
Reduce isomorphic transitions removed 159 transitions.
Iterating post reduction 0 with 159 rules applied. Total rules applied 4967 place count 1068 transition count 1438
Applied a total of 4967 rules in 686 ms. Remains 1068 /3472 variables (removed 2404) and now considering 1438/4001 (removed 2563) transitions.
// Phase 1: matrix 1438 rows 1068 cols
[2023-03-10 22:52:18] [INFO ] Computed 18 place invariants in 48 ms
[2023-03-10 22:52:19] [INFO ] Implicit Places using invariants in 623 ms returned []
[2023-03-10 22:52:19] [INFO ] Invariant cache hit.
[2023-03-10 22:52:19] [INFO ] Implicit Places using invariants and state equation in 848 ms returned []
Implicit Place search using SMT with State Equation took 1495 ms to find 0 implicit places.
[2023-03-10 22:52:19] [INFO ] Invariant cache hit.
[2023-03-10 22:52:20] [INFO ] Dead Transitions using invariants and state equation in 565 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1068/3472 places, 1438/4001 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2748 ms. Remains : 1068/3472 places, 1438/4001 transitions.
Support contains 142 out of 1068 places after structural reductions.
[2023-03-10 22:52:20] [INFO ] Flatten gal took : 109 ms
[2023-03-10 22:52:20] [INFO ] Flatten gal took : 68 ms
[2023-03-10 22:52:20] [INFO ] Input system was already deterministic with 1438 transitions.
Incomplete random walk after 10000 steps, including 89 resets, run finished after 520 ms. (steps per millisecond=19 ) properties (out of 95) seen :23
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 72) seen :0
Running SMT prover for 72 properties.
[2023-03-10 22:52:21] [INFO ] Invariant cache hit.
[2023-03-10 22:52:23] [INFO ] [Real]Absence check using 18 positive place invariants in 14 ms returned sat
[2023-03-10 22:52:23] [INFO ] After 1465ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:72
[2023-03-10 22:52:24] [INFO ] [Nat]Absence check using 18 positive place invariants in 15 ms returned sat
[2023-03-10 22:52:28] [INFO ] After 3289ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :70
[2023-03-10 22:52:30] [INFO ] Deduced a trap composed of 307 places in 363 ms of which 9 ms to minimize.
[2023-03-10 22:52:30] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 450 ms
[2023-03-10 22:52:30] [INFO ] Deduced a trap composed of 308 places in 259 ms of which 1 ms to minimize.
[2023-03-10 22:52:30] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 344 ms
[2023-03-10 22:52:32] [INFO ] Deduced a trap composed of 356 places in 333 ms of which 1 ms to minimize.
[2023-03-10 22:52:33] [INFO ] Deduced a trap composed of 310 places in 279 ms of which 1 ms to minimize.
[2023-03-10 22:52:33] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 747 ms
[2023-03-10 22:52:33] [INFO ] Deduced a trap composed of 309 places in 236 ms of which 1 ms to minimize.
[2023-03-10 22:52:33] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 318 ms
[2023-03-10 22:52:34] [INFO ] Deduced a trap composed of 108 places in 83 ms of which 0 ms to minimize.
[2023-03-10 22:52:34] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 166 ms
[2023-03-10 22:52:35] [INFO ] Deduced a trap composed of 99 places in 80 ms of which 1 ms to minimize.
[2023-03-10 22:52:35] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 165 ms
[2023-03-10 22:52:36] [INFO ] Deduced a trap composed of 309 places in 250 ms of which 1 ms to minimize.
[2023-03-10 22:52:36] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 337 ms
[2023-03-10 22:52:36] [INFO ] After 10780ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :70
Attempting to minimize the solution found.
Minimization took 2856 ms.
[2023-03-10 22:52:39] [INFO ] After 16025ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :70
Fused 72 Parikh solutions to 70 different solutions.
Parikh walk visited 51 properties in 449 ms.
Support contains 29 out of 1068 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 980 edges and 1068 vertex of which 98 / 1068 are part of one of the 16 SCC in 8 ms
Free SCC test removed 82 places
Drop transitions removed 99 transitions
Reduce isomorphic transitions removed 99 transitions.
Drop transitions removed 83 transitions
Trivial Post-agglo rules discarded 83 transitions
Performed 83 trivial Post agglomeration. Transition count delta: 83
Iterating post reduction 0 with 83 rules applied. Total rules applied 84 place count 986 transition count 1256
Reduce places removed 83 places and 0 transitions.
Iterating post reduction 1 with 83 rules applied. Total rules applied 167 place count 903 transition count 1256
Performed 43 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 43 Pre rules applied. Total rules applied 167 place count 903 transition count 1213
Deduced a syphon composed of 43 places in 2 ms
Reduce places removed 43 places and 0 transitions.
Iterating global reduction 2 with 86 rules applied. Total rules applied 253 place count 860 transition count 1213
Discarding 97 places :
Symmetric choice reduction at 2 with 97 rule applications. Total rules 350 place count 763 transition count 1116
Iterating global reduction 2 with 97 rules applied. Total rules applied 447 place count 763 transition count 1116
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 461 place count 763 transition count 1102
Discarding 34 places :
Symmetric choice reduction at 3 with 34 rule applications. Total rules 495 place count 729 transition count 1068
Iterating global reduction 3 with 34 rules applied. Total rules applied 529 place count 729 transition count 1068
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Iterating post reduction 3 with 30 rules applied. Total rules applied 559 place count 729 transition count 1038
Performed 100 Post agglomeration using F-continuation condition.Transition count delta: 100
Deduced a syphon composed of 100 places in 3 ms
Reduce places removed 100 places and 0 transitions.
Iterating global reduction 4 with 200 rules applied. Total rules applied 759 place count 629 transition count 938
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 4 with 16 rules applied. Total rules applied 775 place count 629 transition count 922
Discarding 7 places :
Symmetric choice reduction at 5 with 7 rule applications. Total rules 782 place count 622 transition count 915
Iterating global reduction 5 with 7 rules applied. Total rules applied 789 place count 622 transition count 915
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 5 with 7 rules applied. Total rules applied 796 place count 622 transition count 908
Free-agglomeration rule applied 486 times.
Iterating global reduction 6 with 486 rules applied. Total rules applied 1282 place count 622 transition count 422
Reduce places removed 486 places and 0 transitions.
Drop transitions removed 176 transitions
Reduce isomorphic transitions removed 176 transitions.
Iterating post reduction 6 with 662 rules applied. Total rules applied 1944 place count 136 transition count 246
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 7 with 4 rules applied. Total rules applied 1948 place count 136 transition count 242
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 7 with 1 rules applied. Total rules applied 1949 place count 135 transition count 241
Applied a total of 1949 rules in 403 ms. Remains 135 /1068 variables (removed 933) and now considering 241/1438 (removed 1197) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 403 ms. Remains : 135/1068 places, 241/1438 transitions.
Incomplete random walk after 10000 steps, including 66 resets, run finished after 142 ms. (steps per millisecond=70 ) properties (out of 19) seen :18
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 11 ms. (steps per millisecond=909 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-10 22:52:40] [INFO ] Flow matrix only has 192 transitions (discarded 49 similar events)
// Phase 1: matrix 192 rows 135 cols
[2023-03-10 22:52:40] [INFO ] Computed 18 place invariants in 2 ms
[2023-03-10 22:52:40] [INFO ] After 39ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-10 22:52:40] [INFO ] [Nat]Absence check using 18 positive place invariants in 9 ms returned sat
[2023-03-10 22:52:40] [INFO ] After 43ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-10 22:52:40] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-10 22:52:40] [INFO ] After 33ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-10 22:52:40] [INFO ] Deduced a trap composed of 18 places in 40 ms of which 0 ms to minimize.
[2023-03-10 22:52:40] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 59 ms
[2023-03-10 22:52:40] [INFO ] After 101ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-03-10 22:52:40] [INFO ] After 197ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 1 ms.
Support contains 3 out of 135 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 135/135 places, 241/241 transitions.
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 135 transition count 234
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 14 place count 128 transition count 234
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 22 place count 120 transition count 226
Iterating global reduction 2 with 8 rules applied. Total rules applied 30 place count 120 transition count 226
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 42 place count 114 transition count 220
Drop transitions removed 9 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 52 place count 114 transition count 210
Free-agglomeration rule applied 11 times with reduction of 4 identical transitions.
Iterating global reduction 3 with 11 rules applied. Total rules applied 63 place count 114 transition count 195
Reduce places removed 12 places and 0 transitions.
Drop transitions removed 45 transitions
Reduce isomorphic transitions removed 45 transitions.
Iterating post reduction 3 with 57 rules applied. Total rules applied 120 place count 102 transition count 150
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 1 Pre rules applied. Total rules applied 120 place count 102 transition count 149
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 122 place count 101 transition count 149
Performed 15 Post agglomeration using F-continuation condition.Transition count delta: 15
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 4 with 30 rules applied. Total rules applied 152 place count 86 transition count 134
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 153 place count 86 transition count 134
Applied a total of 153 rules in 27 ms. Remains 86 /135 variables (removed 49) and now considering 134/241 (removed 107) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 27 ms. Remains : 86/135 places, 134/241 transitions.
Finished random walk after 51 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=25 )
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-10 22:52:40] [INFO ] Flatten gal took : 48 ms
[2023-03-10 22:52:40] [INFO ] Flatten gal took : 52 ms
[2023-03-10 22:52:40] [INFO ] Input system was already deterministic with 1438 transitions.
Computed a total of 20 stabilizing places and 20 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 75 places :
Symmetric choice reduction at 0 with 75 rule applications. Total rules 75 place count 993 transition count 1363
Iterating global reduction 0 with 75 rules applied. Total rules applied 150 place count 993 transition count 1363
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 165 place count 993 transition count 1348
Discarding 50 places :
Symmetric choice reduction at 1 with 50 rule applications. Total rules 215 place count 943 transition count 1298
Iterating global reduction 1 with 50 rules applied. Total rules applied 265 place count 943 transition count 1298
Ensure Unique test removed 33 transitions
Reduce isomorphic transitions removed 33 transitions.
Iterating post reduction 1 with 33 rules applied. Total rules applied 298 place count 943 transition count 1265
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 310 place count 931 transition count 1253
Iterating global reduction 2 with 12 rules applied. Total rules applied 322 place count 931 transition count 1253
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 330 place count 931 transition count 1245
Applied a total of 330 rules in 218 ms. Remains 931 /1068 variables (removed 137) and now considering 1245/1438 (removed 193) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 218 ms. Remains : 931/1068 places, 1245/1438 transitions.
[2023-03-10 22:52:41] [INFO ] Flatten gal took : 32 ms
[2023-03-10 22:52:41] [INFO ] Flatten gal took : 33 ms
[2023-03-10 22:52:41] [INFO ] Input system was already deterministic with 1245 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 86 places :
Symmetric choice reduction at 0 with 86 rule applications. Total rules 86 place count 982 transition count 1352
Iterating global reduction 0 with 86 rules applied. Total rules applied 172 place count 982 transition count 1352
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 0 with 17 rules applied. Total rules applied 189 place count 982 transition count 1335
Discarding 59 places :
Symmetric choice reduction at 1 with 59 rule applications. Total rules 248 place count 923 transition count 1276
Iterating global reduction 1 with 59 rules applied. Total rules applied 307 place count 923 transition count 1276
Ensure Unique test removed 41 transitions
Reduce isomorphic transitions removed 41 transitions.
Iterating post reduction 1 with 41 rules applied. Total rules applied 348 place count 923 transition count 1235
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 360 place count 911 transition count 1223
Iterating global reduction 2 with 12 rules applied. Total rules applied 372 place count 911 transition count 1223
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 380 place count 911 transition count 1215
Applied a total of 380 rules in 107 ms. Remains 911 /1068 variables (removed 157) and now considering 1215/1438 (removed 223) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 108 ms. Remains : 911/1068 places, 1215/1438 transitions.
[2023-03-10 22:52:41] [INFO ] Flatten gal took : 30 ms
[2023-03-10 22:52:41] [INFO ] Flatten gal took : 31 ms
[2023-03-10 22:52:41] [INFO ] Input system was already deterministic with 1215 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 80 places :
Symmetric choice reduction at 0 with 80 rule applications. Total rules 80 place count 988 transition count 1358
Iterating global reduction 0 with 80 rules applied. Total rules applied 160 place count 988 transition count 1358
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 175 place count 988 transition count 1343
Discarding 55 places :
Symmetric choice reduction at 1 with 55 rule applications. Total rules 230 place count 933 transition count 1288
Iterating global reduction 1 with 55 rules applied. Total rules applied 285 place count 933 transition count 1288
Ensure Unique test removed 37 transitions
Reduce isomorphic transitions removed 37 transitions.
Iterating post reduction 1 with 37 rules applied. Total rules applied 322 place count 933 transition count 1251
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 334 place count 921 transition count 1239
Iterating global reduction 2 with 12 rules applied. Total rules applied 346 place count 921 transition count 1239
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 353 place count 921 transition count 1232
Applied a total of 353 rules in 102 ms. Remains 921 /1068 variables (removed 147) and now considering 1232/1438 (removed 206) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 103 ms. Remains : 921/1068 places, 1232/1438 transitions.
[2023-03-10 22:52:41] [INFO ] Flatten gal took : 42 ms
[2023-03-10 22:52:41] [INFO ] Flatten gal took : 58 ms
[2023-03-10 22:52:41] [INFO ] Input system was already deterministic with 1232 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 764 edges and 1068 vertex of which 92 / 1068 are part of one of the 15 SCC in 1 ms
Free SCC test removed 77 places
Ensure Unique test removed 78 transitions
Reduce isomorphic transitions removed 78 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 86 transitions
Trivial Post-agglo rules discarded 86 transitions
Performed 86 trivial Post agglomeration. Transition count delta: 86
Iterating post reduction 0 with 86 rules applied. Total rules applied 87 place count 990 transition count 1273
Reduce places removed 86 places and 0 transitions.
Iterating post reduction 1 with 86 rules applied. Total rules applied 173 place count 904 transition count 1273
Performed 53 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 53 Pre rules applied. Total rules applied 173 place count 904 transition count 1220
Deduced a syphon composed of 53 places in 1 ms
Reduce places removed 53 places and 0 transitions.
Iterating global reduction 2 with 106 rules applied. Total rules applied 279 place count 851 transition count 1220
Discarding 109 places :
Symmetric choice reduction at 2 with 109 rule applications. Total rules 388 place count 742 transition count 1111
Iterating global reduction 2 with 109 rules applied. Total rules applied 497 place count 742 transition count 1111
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 513 place count 742 transition count 1095
Discarding 37 places :
Symmetric choice reduction at 3 with 37 rule applications. Total rules 550 place count 705 transition count 1058
Iterating global reduction 3 with 37 rules applied. Total rules applied 587 place count 705 transition count 1058
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 3 with 35 rules applied. Total rules applied 622 place count 705 transition count 1023
Performed 52 Post agglomeration using F-continuation condition.Transition count delta: 52
Deduced a syphon composed of 52 places in 0 ms
Reduce places removed 52 places and 0 transitions.
Iterating global reduction 4 with 104 rules applied. Total rules applied 726 place count 653 transition count 971
Discarding 11 places :
Symmetric choice reduction at 4 with 11 rule applications. Total rules 737 place count 642 transition count 960
Iterating global reduction 4 with 11 rules applied. Total rules applied 748 place count 642 transition count 960
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 4 with 11 rules applied. Total rules applied 759 place count 642 transition count 949
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 761 place count 640 transition count 947
Applied a total of 761 rules in 221 ms. Remains 640 /1068 variables (removed 428) and now considering 947/1438 (removed 491) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 222 ms. Remains : 640/1068 places, 947/1438 transitions.
[2023-03-10 22:52:42] [INFO ] Flatten gal took : 21 ms
[2023-03-10 22:52:42] [INFO ] Flatten gal took : 22 ms
[2023-03-10 22:52:42] [INFO ] Input system was already deterministic with 947 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 84 places :
Symmetric choice reduction at 0 with 84 rule applications. Total rules 84 place count 984 transition count 1354
Iterating global reduction 0 with 84 rules applied. Total rules applied 168 place count 984 transition count 1354
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 184 place count 984 transition count 1338
Discarding 58 places :
Symmetric choice reduction at 1 with 58 rule applications. Total rules 242 place count 926 transition count 1280
Iterating global reduction 1 with 58 rules applied. Total rules applied 300 place count 926 transition count 1280
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 340 place count 926 transition count 1240
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 351 place count 915 transition count 1229
Iterating global reduction 2 with 11 rules applied. Total rules applied 362 place count 915 transition count 1229
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 368 place count 915 transition count 1223
Applied a total of 368 rules in 71 ms. Remains 915 /1068 variables (removed 153) and now considering 1223/1438 (removed 215) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 72 ms. Remains : 915/1068 places, 1223/1438 transitions.
[2023-03-10 22:52:42] [INFO ] Flatten gal took : 27 ms
[2023-03-10 22:52:42] [INFO ] Flatten gal took : 28 ms
[2023-03-10 22:52:42] [INFO ] Input system was already deterministic with 1223 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 1016 edges and 1068 vertex of which 98 / 1068 are part of one of the 16 SCC in 1 ms
Free SCC test removed 82 places
Ensure Unique test removed 83 transitions
Reduce isomorphic transitions removed 83 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 92 transitions
Trivial Post-agglo rules discarded 92 transitions
Performed 92 trivial Post agglomeration. Transition count delta: 92
Iterating post reduction 0 with 92 rules applied. Total rules applied 93 place count 985 transition count 1262
Reduce places removed 92 places and 0 transitions.
Iterating post reduction 1 with 92 rules applied. Total rules applied 185 place count 893 transition count 1262
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 185 place count 893 transition count 1214
Deduced a syphon composed of 48 places in 0 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 281 place count 845 transition count 1214
Discarding 113 places :
Symmetric choice reduction at 2 with 113 rule applications. Total rules 394 place count 732 transition count 1101
Iterating global reduction 2 with 113 rules applied. Total rules applied 507 place count 732 transition count 1101
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 17 rules applied. Total rules applied 524 place count 732 transition count 1084
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 524 place count 732 transition count 1083
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 526 place count 731 transition count 1083
Discarding 41 places :
Symmetric choice reduction at 3 with 41 rule applications. Total rules 567 place count 690 transition count 1042
Iterating global reduction 3 with 41 rules applied. Total rules applied 608 place count 690 transition count 1042
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 3 with 40 rules applied. Total rules applied 648 place count 690 transition count 1002
Performed 49 Post agglomeration using F-continuation condition.Transition count delta: 49
Deduced a syphon composed of 49 places in 0 ms
Reduce places removed 49 places and 0 transitions.
Iterating global reduction 4 with 98 rules applied. Total rules applied 746 place count 641 transition count 953
Discarding 7 places :
Symmetric choice reduction at 4 with 7 rule applications. Total rules 753 place count 634 transition count 946
Iterating global reduction 4 with 7 rules applied. Total rules applied 760 place count 634 transition count 946
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 4 with 7 rules applied. Total rules applied 767 place count 634 transition count 939
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 783 place count 634 transition count 923
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 785 place count 632 transition count 921
Applied a total of 785 rules in 326 ms. Remains 632 /1068 variables (removed 436) and now considering 921/1438 (removed 517) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 327 ms. Remains : 632/1068 places, 921/1438 transitions.
[2023-03-10 22:52:42] [INFO ] Flatten gal took : 34 ms
[2023-03-10 22:52:42] [INFO ] Flatten gal took : 19 ms
[2023-03-10 22:52:42] [INFO ] Input system was already deterministic with 921 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 1013 edges and 1068 vertex of which 98 / 1068 are part of one of the 16 SCC in 1 ms
Free SCC test removed 82 places
Ensure Unique test removed 83 transitions
Reduce isomorphic transitions removed 83 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 91 transitions
Trivial Post-agglo rules discarded 91 transitions
Performed 91 trivial Post agglomeration. Transition count delta: 91
Iterating post reduction 0 with 91 rules applied. Total rules applied 92 place count 985 transition count 1263
Reduce places removed 91 places and 0 transitions.
Iterating post reduction 1 with 91 rules applied. Total rules applied 183 place count 894 transition count 1263
Performed 46 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 46 Pre rules applied. Total rules applied 183 place count 894 transition count 1217
Deduced a syphon composed of 46 places in 1 ms
Reduce places removed 46 places and 0 transitions.
Iterating global reduction 2 with 92 rules applied. Total rules applied 275 place count 848 transition count 1217
Discarding 114 places :
Symmetric choice reduction at 2 with 114 rule applications. Total rules 389 place count 734 transition count 1103
Iterating global reduction 2 with 114 rules applied. Total rules applied 503 place count 734 transition count 1103
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 17 rules applied. Total rules applied 520 place count 734 transition count 1086
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 520 place count 734 transition count 1085
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 522 place count 733 transition count 1085
Discarding 40 places :
Symmetric choice reduction at 3 with 40 rule applications. Total rules 562 place count 693 transition count 1045
Iterating global reduction 3 with 40 rules applied. Total rules applied 602 place count 693 transition count 1045
Ensure Unique test removed 39 transitions
Reduce isomorphic transitions removed 39 transitions.
Iterating post reduction 3 with 39 rules applied. Total rules applied 641 place count 693 transition count 1006
Performed 49 Post agglomeration using F-continuation condition.Transition count delta: 49
Deduced a syphon composed of 49 places in 0 ms
Reduce places removed 49 places and 0 transitions.
Iterating global reduction 4 with 98 rules applied. Total rules applied 739 place count 644 transition count 957
Discarding 9 places :
Symmetric choice reduction at 4 with 9 rule applications. Total rules 748 place count 635 transition count 948
Iterating global reduction 4 with 9 rules applied. Total rules applied 757 place count 635 transition count 948
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 4 with 9 rules applied. Total rules applied 766 place count 635 transition count 939
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 782 place count 635 transition count 923
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 784 place count 633 transition count 921
Applied a total of 784 rules in 259 ms. Remains 633 /1068 variables (removed 435) and now considering 921/1438 (removed 517) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 260 ms. Remains : 633/1068 places, 921/1438 transitions.
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 19 ms
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 19 ms
[2023-03-10 22:52:43] [INFO ] Input system was already deterministic with 921 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 80 places :
Symmetric choice reduction at 0 with 80 rule applications. Total rules 80 place count 988 transition count 1358
Iterating global reduction 0 with 80 rules applied. Total rules applied 160 place count 988 transition count 1358
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 175 place count 988 transition count 1343
Discarding 56 places :
Symmetric choice reduction at 1 with 56 rule applications. Total rules 231 place count 932 transition count 1287
Iterating global reduction 1 with 56 rules applied. Total rules applied 287 place count 932 transition count 1287
Ensure Unique test removed 38 transitions
Reduce isomorphic transitions removed 38 transitions.
Iterating post reduction 1 with 38 rules applied. Total rules applied 325 place count 932 transition count 1249
Discarding 13 places :
Symmetric choice reduction at 2 with 13 rule applications. Total rules 338 place count 919 transition count 1236
Iterating global reduction 2 with 13 rules applied. Total rules applied 351 place count 919 transition count 1236
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 359 place count 919 transition count 1228
Applied a total of 359 rules in 100 ms. Remains 919 /1068 variables (removed 149) and now considering 1228/1438 (removed 210) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 104 ms. Remains : 919/1068 places, 1228/1438 transitions.
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 34 ms
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 24 ms
[2023-03-10 22:52:43] [INFO ] Input system was already deterministic with 1228 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 1015 edges and 1068 vertex of which 98 / 1068 are part of one of the 16 SCC in 0 ms
Free SCC test removed 82 places
Ensure Unique test removed 83 transitions
Reduce isomorphic transitions removed 83 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 92 transitions
Trivial Post-agglo rules discarded 92 transitions
Performed 92 trivial Post agglomeration. Transition count delta: 92
Iterating post reduction 0 with 92 rules applied. Total rules applied 93 place count 985 transition count 1262
Reduce places removed 92 places and 0 transitions.
Iterating post reduction 1 with 92 rules applied. Total rules applied 185 place count 893 transition count 1262
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 185 place count 893 transition count 1214
Deduced a syphon composed of 48 places in 1 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 281 place count 845 transition count 1214
Discarding 112 places :
Symmetric choice reduction at 2 with 112 rule applications. Total rules 393 place count 733 transition count 1102
Iterating global reduction 2 with 112 rules applied. Total rules applied 505 place count 733 transition count 1102
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 17 rules applied. Total rules applied 522 place count 733 transition count 1085
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 522 place count 733 transition count 1084
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 524 place count 732 transition count 1084
Discarding 40 places :
Symmetric choice reduction at 3 with 40 rule applications. Total rules 564 place count 692 transition count 1044
Iterating global reduction 3 with 40 rules applied. Total rules applied 604 place count 692 transition count 1044
Ensure Unique test removed 39 transitions
Reduce isomorphic transitions removed 39 transitions.
Iterating post reduction 3 with 39 rules applied. Total rules applied 643 place count 692 transition count 1005
Performed 49 Post agglomeration using F-continuation condition.Transition count delta: 49
Deduced a syphon composed of 49 places in 0 ms
Reduce places removed 49 places and 0 transitions.
Iterating global reduction 4 with 98 rules applied. Total rules applied 741 place count 643 transition count 956
Discarding 7 places :
Symmetric choice reduction at 4 with 7 rule applications. Total rules 748 place count 636 transition count 949
Iterating global reduction 4 with 7 rules applied. Total rules applied 755 place count 636 transition count 949
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 4 with 7 rules applied. Total rules applied 762 place count 636 transition count 942
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 778 place count 636 transition count 926
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 780 place count 634 transition count 924
Applied a total of 780 rules in 219 ms. Remains 634 /1068 variables (removed 434) and now considering 924/1438 (removed 514) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 220 ms. Remains : 634/1068 places, 924/1438 transitions.
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 17 ms
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 18 ms
[2023-03-10 22:52:43] [INFO ] Input system was already deterministic with 924 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 87 places :
Symmetric choice reduction at 0 with 87 rule applications. Total rules 87 place count 981 transition count 1351
Iterating global reduction 0 with 87 rules applied. Total rules applied 174 place count 981 transition count 1351
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 190 place count 981 transition count 1335
Discarding 60 places :
Symmetric choice reduction at 1 with 60 rule applications. Total rules 250 place count 921 transition count 1275
Iterating global reduction 1 with 60 rules applied. Total rules applied 310 place count 921 transition count 1275
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 350 place count 921 transition count 1235
Discarding 13 places :
Symmetric choice reduction at 2 with 13 rule applications. Total rules 363 place count 908 transition count 1222
Iterating global reduction 2 with 13 rules applied. Total rules applied 376 place count 908 transition count 1222
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 384 place count 908 transition count 1214
Applied a total of 384 rules in 71 ms. Remains 908 /1068 variables (removed 160) and now considering 1214/1438 (removed 224) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 72 ms. Remains : 908/1068 places, 1214/1438 transitions.
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 41 ms
[2023-03-10 22:52:43] [INFO ] Flatten gal took : 23 ms
[2023-03-10 22:52:43] [INFO ] Input system was already deterministic with 1214 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 977 edges and 1068 vertex of which 86 / 1068 are part of one of the 14 SCC in 1 ms
Free SCC test removed 72 places
Ensure Unique test removed 73 transitions
Reduce isomorphic transitions removed 73 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 90 transitions
Trivial Post-agglo rules discarded 90 transitions
Performed 90 trivial Post agglomeration. Transition count delta: 90
Iterating post reduction 0 with 90 rules applied. Total rules applied 91 place count 995 transition count 1274
Reduce places removed 90 places and 0 transitions.
Iterating post reduction 1 with 90 rules applied. Total rules applied 181 place count 905 transition count 1274
Performed 52 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 52 Pre rules applied. Total rules applied 181 place count 905 transition count 1222
Deduced a syphon composed of 52 places in 0 ms
Reduce places removed 52 places and 0 transitions.
Iterating global reduction 2 with 104 rules applied. Total rules applied 285 place count 853 transition count 1222
Discarding 110 places :
Symmetric choice reduction at 2 with 110 rule applications. Total rules 395 place count 743 transition count 1112
Iterating global reduction 2 with 110 rules applied. Total rules applied 505 place count 743 transition count 1112
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 17 rules applied. Total rules applied 522 place count 743 transition count 1095
Discarding 40 places :
Symmetric choice reduction at 3 with 40 rule applications. Total rules 562 place count 703 transition count 1055
Iterating global reduction 3 with 40 rules applied. Total rules applied 602 place count 703 transition count 1055
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Iterating post reduction 3 with 40 rules applied. Total rules applied 642 place count 703 transition count 1015
Performed 56 Post agglomeration using F-continuation condition.Transition count delta: 56
Deduced a syphon composed of 56 places in 0 ms
Reduce places removed 56 places and 0 transitions.
Iterating global reduction 4 with 112 rules applied. Total rules applied 754 place count 647 transition count 959
Discarding 9 places :
Symmetric choice reduction at 4 with 9 rule applications. Total rules 763 place count 638 transition count 950
Iterating global reduction 4 with 9 rules applied. Total rules applied 772 place count 638 transition count 950
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 4 with 9 rules applied. Total rules applied 781 place count 638 transition count 941
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 797 place count 638 transition count 925
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 799 place count 636 transition count 923
Applied a total of 799 rules in 222 ms. Remains 636 /1068 variables (removed 432) and now considering 923/1438 (removed 515) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 224 ms. Remains : 636/1068 places, 923/1438 transitions.
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 26 ms
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 24 ms
[2023-03-10 22:52:44] [INFO ] Input system was already deterministic with 923 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 85 places :
Symmetric choice reduction at 0 with 85 rule applications. Total rules 85 place count 983 transition count 1353
Iterating global reduction 0 with 85 rules applied. Total rules applied 170 place count 983 transition count 1353
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 0 with 17 rules applied. Total rules applied 187 place count 983 transition count 1336
Discarding 58 places :
Symmetric choice reduction at 1 with 58 rule applications. Total rules 245 place count 925 transition count 1278
Iterating global reduction 1 with 58 rules applied. Total rules applied 303 place count 925 transition count 1278
Ensure Unique test removed 38 transitions
Reduce isomorphic transitions removed 38 transitions.
Iterating post reduction 1 with 38 rules applied. Total rules applied 341 place count 925 transition count 1240
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 352 place count 914 transition count 1229
Iterating global reduction 2 with 11 rules applied. Total rules applied 363 place count 914 transition count 1229
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 369 place count 914 transition count 1223
Applied a total of 369 rules in 98 ms. Remains 914 /1068 variables (removed 154) and now considering 1223/1438 (removed 215) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 99 ms. Remains : 914/1068 places, 1223/1438 transitions.
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 22 ms
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 24 ms
[2023-03-10 22:52:44] [INFO ] Input system was already deterministic with 1223 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 984 edges and 1068 vertex of which 92 / 1068 are part of one of the 15 SCC in 1 ms
Free SCC test removed 77 places
Ensure Unique test removed 78 transitions
Reduce isomorphic transitions removed 78 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 90 transitions
Trivial Post-agglo rules discarded 90 transitions
Performed 90 trivial Post agglomeration. Transition count delta: 90
Iterating post reduction 0 with 90 rules applied. Total rules applied 91 place count 990 transition count 1269
Reduce places removed 90 places and 0 transitions.
Iterating post reduction 1 with 90 rules applied. Total rules applied 181 place count 900 transition count 1269
Performed 44 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 44 Pre rules applied. Total rules applied 181 place count 900 transition count 1225
Deduced a syphon composed of 44 places in 0 ms
Reduce places removed 44 places and 0 transitions.
Iterating global reduction 2 with 88 rules applied. Total rules applied 269 place count 856 transition count 1225
Discarding 107 places :
Symmetric choice reduction at 2 with 107 rule applications. Total rules 376 place count 749 transition count 1118
Iterating global reduction 2 with 107 rules applied. Total rules applied 483 place count 749 transition count 1118
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 499 place count 749 transition count 1102
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 499 place count 749 transition count 1100
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 503 place count 747 transition count 1100
Discarding 39 places :
Symmetric choice reduction at 3 with 39 rule applications. Total rules 542 place count 708 transition count 1061
Iterating global reduction 3 with 39 rules applied. Total rules applied 581 place count 708 transition count 1061
Ensure Unique test removed 36 transitions
Reduce isomorphic transitions removed 36 transitions.
Iterating post reduction 3 with 36 rules applied. Total rules applied 617 place count 708 transition count 1025
Performed 52 Post agglomeration using F-continuation condition.Transition count delta: 52
Deduced a syphon composed of 52 places in 0 ms
Reduce places removed 52 places and 0 transitions.
Iterating global reduction 4 with 104 rules applied. Total rules applied 721 place count 656 transition count 973
Discarding 8 places :
Symmetric choice reduction at 4 with 8 rule applications. Total rules 729 place count 648 transition count 965
Iterating global reduction 4 with 8 rules applied. Total rules applied 737 place count 648 transition count 965
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 4 with 8 rules applied. Total rules applied 745 place count 648 transition count 957
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 761 place count 648 transition count 941
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 763 place count 646 transition count 939
Applied a total of 763 rules in 207 ms. Remains 646 /1068 variables (removed 422) and now considering 939/1438 (removed 499) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 210 ms. Remains : 646/1068 places, 939/1438 transitions.
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 16 ms
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 18 ms
[2023-03-10 22:52:44] [INFO ] Input system was already deterministic with 939 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 1004 edges and 1068 vertex of which 98 / 1068 are part of one of the 16 SCC in 0 ms
Free SCC test removed 82 places
Ensure Unique test removed 83 transitions
Reduce isomorphic transitions removed 83 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 88 transitions
Trivial Post-agglo rules discarded 88 transitions
Performed 88 trivial Post agglomeration. Transition count delta: 88
Iterating post reduction 0 with 88 rules applied. Total rules applied 89 place count 985 transition count 1266
Reduce places removed 88 places and 0 transitions.
Iterating post reduction 1 with 88 rules applied. Total rules applied 177 place count 897 transition count 1266
Performed 45 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 45 Pre rules applied. Total rules applied 177 place count 897 transition count 1221
Deduced a syphon composed of 45 places in 1 ms
Reduce places removed 45 places and 0 transitions.
Iterating global reduction 2 with 90 rules applied. Total rules applied 267 place count 852 transition count 1221
Discarding 106 places :
Symmetric choice reduction at 2 with 106 rule applications. Total rules 373 place count 746 transition count 1115
Iterating global reduction 2 with 106 rules applied. Total rules applied 479 place count 746 transition count 1115
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 495 place count 746 transition count 1099
Discarding 40 places :
Symmetric choice reduction at 3 with 40 rule applications. Total rules 535 place count 706 transition count 1059
Iterating global reduction 3 with 40 rules applied. Total rules applied 575 place count 706 transition count 1059
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 3 with 35 rules applied. Total rules applied 610 place count 706 transition count 1024
Performed 50 Post agglomeration using F-continuation condition.Transition count delta: 50
Deduced a syphon composed of 50 places in 0 ms
Reduce places removed 50 places and 0 transitions.
Iterating global reduction 4 with 100 rules applied. Total rules applied 710 place count 656 transition count 974
Discarding 8 places :
Symmetric choice reduction at 4 with 8 rule applications. Total rules 718 place count 648 transition count 966
Iterating global reduction 4 with 8 rules applied. Total rules applied 726 place count 648 transition count 966
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 4 with 8 rules applied. Total rules applied 734 place count 648 transition count 958
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 750 place count 648 transition count 942
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 752 place count 646 transition count 940
Applied a total of 752 rules in 172 ms. Remains 646 /1068 variables (removed 422) and now considering 940/1438 (removed 498) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 174 ms. Remains : 646/1068 places, 940/1438 transitions.
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 16 ms
[2023-03-10 22:52:44] [INFO ] Flatten gal took : 16 ms
[2023-03-10 22:52:44] [INFO ] Input system was already deterministic with 940 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Graph (trivial) has 981 edges and 1068 vertex of which 92 / 1068 are part of one of the 15 SCC in 1 ms
Free SCC test removed 77 places
Ensure Unique test removed 78 transitions
Reduce isomorphic transitions removed 78 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 91 transitions
Trivial Post-agglo rules discarded 91 transitions
Performed 91 trivial Post agglomeration. Transition count delta: 91
Iterating post reduction 0 with 91 rules applied. Total rules applied 92 place count 990 transition count 1268
Reduce places removed 91 places and 0 transitions.
Iterating post reduction 1 with 91 rules applied. Total rules applied 183 place count 899 transition count 1268
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 183 place count 899 transition count 1220
Deduced a syphon composed of 48 places in 0 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 279 place count 851 transition count 1220
Discarding 108 places :
Symmetric choice reduction at 2 with 108 rule applications. Total rules 387 place count 743 transition count 1112
Iterating global reduction 2 with 108 rules applied. Total rules applied 495 place count 743 transition count 1112
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 509 place count 743 transition count 1098
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 509 place count 743 transition count 1096
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 513 place count 741 transition count 1096
Discarding 39 places :
Symmetric choice reduction at 3 with 39 rule applications. Total rules 552 place count 702 transition count 1057
Iterating global reduction 3 with 39 rules applied. Total rules applied 591 place count 702 transition count 1057
Ensure Unique test removed 38 transitions
Reduce isomorphic transitions removed 38 transitions.
Iterating post reduction 3 with 38 rules applied. Total rules applied 629 place count 702 transition count 1019
Performed 52 Post agglomeration using F-continuation condition.Transition count delta: 52
Deduced a syphon composed of 52 places in 0 ms
Reduce places removed 52 places and 0 transitions.
Iterating global reduction 4 with 104 rules applied. Total rules applied 733 place count 650 transition count 967
Discarding 7 places :
Symmetric choice reduction at 4 with 7 rule applications. Total rules 740 place count 643 transition count 960
Iterating global reduction 4 with 7 rules applied. Total rules applied 747 place count 643 transition count 960
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 4 with 7 rules applied. Total rules applied 754 place count 643 transition count 953
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 5 with 16 rules applied. Total rules applied 770 place count 643 transition count 937
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 771 place count 643 transition count 937
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 773 place count 641 transition count 935
Applied a total of 773 rules in 210 ms. Remains 641 /1068 variables (removed 427) and now considering 935/1438 (removed 503) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 210 ms. Remains : 641/1068 places, 935/1438 transitions.
[2023-03-10 22:52:45] [INFO ] Flatten gal took : 17 ms
[2023-03-10 22:52:45] [INFO ] Flatten gal took : 17 ms
[2023-03-10 22:52:45] [INFO ] Input system was already deterministic with 935 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1068/1068 places, 1438/1438 transitions.
Discarding 83 places :
Symmetric choice reduction at 0 with 83 rule applications. Total rules 83 place count 985 transition count 1355
Iterating global reduction 0 with 83 rules applied. Total rules applied 166 place count 985 transition count 1355
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 181 place count 985 transition count 1340
Discarding 57 places :
Symmetric choice reduction at 1 with 57 rule applications. Total rules 238 place count 928 transition count 1283
Iterating global reduction 1 with 57 rules applied. Total rules applied 295 place count 928 transition count 1283
Ensure Unique test removed 38 transitions
Reduce isomorphic transitions removed 38 transitions.
Iterating post reduction 1 with 38 rules applied. Total rules applied 333 place count 928 transition count 1245
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 345 place count 916 transition count 1233
Iterating global reduction 2 with 12 rules applied. Total rules applied 357 place count 916 transition count 1233
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 365 place count 916 transition count 1225
Applied a total of 365 rules in 85 ms. Remains 916 /1068 variables (removed 152) and now considering 1225/1438 (removed 213) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 916/1068 places, 1225/1438 transitions.
[2023-03-10 22:52:45] [INFO ] Flatten gal took : 21 ms
[2023-03-10 22:52:45] [INFO ] Flatten gal took : 21 ms
[2023-03-10 22:52:45] [INFO ] Input system was already deterministic with 1225 transitions.
[2023-03-10 22:52:45] [INFO ] Flatten gal took : 25 ms
[2023-03-10 22:52:45] [INFO ] Flatten gal took : 27 ms
[2023-03-10 22:52:45] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-10 22:52:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1068 places, 1438 transitions and 4281 arcs took 6 ms.
Total runtime 28139 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FlexibleBarrier-PT-16b
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA FlexibleBarrier-PT-16b-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-16b-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678489124685

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 40 (type EXCL) for 39 FlexibleBarrier-PT-16b-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 40 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-13
lola: result : false
lola: markings : 2
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 FlexibleBarrier-PT-16b-CTLFireability-05
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-05
lola: result : false
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 FlexibleBarrier-PT-16b-CTLFireability-06
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 19 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-06
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 43 (type EXCL) for 42 FlexibleBarrier-PT-16b-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 43 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-14
lola: result : true
lola: markings : 43639
lola: fired transitions : 110613
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 FlexibleBarrier-PT-16b-CTLFireability-15
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-15
lola: result : true
lola: markings : 77
lola: fired transitions : 308
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 FlexibleBarrier-PT-16b-CTLFireability-11
lola: time limit : 326 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 4/326 1/32 FlexibleBarrier-PT-16b-CTLFireability-11 74639 m, 14927 m/sec, 594171 t fired, .

Time elapsed: 8 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 9/326 2/32 FlexibleBarrier-PT-16b-CTLFireability-11 117146 m, 8501 m/sec, 1409052 t fired, .

Time elapsed: 13 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 14/326 2/32 FlexibleBarrier-PT-16b-CTLFireability-11 158144 m, 8199 m/sec, 2229557 t fired, .

Time elapsed: 18 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 19/326 2/32 FlexibleBarrier-PT-16b-CTLFireability-11 198479 m, 8067 m/sec, 3059089 t fired, .

Time elapsed: 23 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 24/326 2/32 FlexibleBarrier-PT-16b-CTLFireability-11 236358 m, 7575 m/sec, 3885095 t fired, .

Time elapsed: 28 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 29/326 3/32 FlexibleBarrier-PT-16b-CTLFireability-11 301937 m, 13115 m/sec, 4697111 t fired, .

Time elapsed: 33 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 34/326 5/32 FlexibleBarrier-PT-16b-CTLFireability-11 435591 m, 26730 m/sec, 5473903 t fired, .

Time elapsed: 38 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 39/326 6/32 FlexibleBarrier-PT-16b-CTLFireability-11 507941 m, 14470 m/sec, 6202372 t fired, .

Time elapsed: 43 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 44/326 6/32 FlexibleBarrier-PT-16b-CTLFireability-11 512181 m, 848 m/sec, 6945492 t fired, .

Time elapsed: 48 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 49/326 8/32 FlexibleBarrier-PT-16b-CTLFireability-11 585009 m, 14565 m/sec, 7673641 t fired, .

Time elapsed: 53 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 54/326 9/32 FlexibleBarrier-PT-16b-CTLFireability-11 655540 m, 14106 m/sec, 8382276 t fired, .

Time elapsed: 58 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 59/326 9/32 FlexibleBarrier-PT-16b-CTLFireability-11 659693 m, 830 m/sec, 9109333 t fired, .

Time elapsed: 63 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 64/326 9/32 FlexibleBarrier-PT-16b-CTLFireability-11 665303 m, 1122 m/sec, 9843411 t fired, .

Time elapsed: 68 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 69/326 11/32 FlexibleBarrier-PT-16b-CTLFireability-11 760188 m, 18977 m/sec, 10557337 t fired, .

Time elapsed: 73 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 74/326 12/32 FlexibleBarrier-PT-16b-CTLFireability-11 804902 m, 8942 m/sec, 11295265 t fired, .

Time elapsed: 78 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 79/326 12/32 FlexibleBarrier-PT-16b-CTLFireability-11 809736 m, 966 m/sec, 12036419 t fired, .

Time elapsed: 83 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 84/326 13/32 FlexibleBarrier-PT-16b-CTLFireability-11 863879 m, 10828 m/sec, 12759962 t fired, .

Time elapsed: 88 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 89/326 18/32 FlexibleBarrier-PT-16b-CTLFireability-11 1159996 m, 59223 m/sec, 13467898 t fired, .

Time elapsed: 93 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 94/326 24/32 FlexibleBarrier-PT-16b-CTLFireability-11 1458863 m, 59773 m/sec, 14180845 t fired, .

Time elapsed: 98 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 99/326 30/32 FlexibleBarrier-PT-16b-CTLFireability-11 1765031 m, 61233 m/sec, 14891900 t fired, .

Time elapsed: 103 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 108 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 28 (type EXCL) for 27 FlexibleBarrier-PT-16b-CTLFireability-09
lola: time limit : 349 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-09
lola: result : false
lola: markings : 386
lola: fired transitions : 449
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 FlexibleBarrier-PT-16b-CTLFireability-07
lola: time limit : 388 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-07
lola: result : true
lola: markings : 78
lola: fired transitions : 156
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 FlexibleBarrier-PT-16b-CTLFireability-04
lola: time limit : 436 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-04
lola: result : false
lola: markings : 78
lola: fired transitions : 160
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 FlexibleBarrier-PT-16b-CTLFireability-02
lola: time limit : 498 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/498 2/32 FlexibleBarrier-PT-16b-CTLFireability-02 322010 m, 64402 m/sec, 731984 t fired, .

Time elapsed: 113 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/498 4/32 FlexibleBarrier-PT-16b-CTLFireability-02 624851 m, 60568 m/sec, 1444689 t fired, .

Time elapsed: 118 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/498 6/32 FlexibleBarrier-PT-16b-CTLFireability-02 910465 m, 57122 m/sec, 2165746 t fired, .

Time elapsed: 123 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/498 8/32 FlexibleBarrier-PT-16b-CTLFireability-02 1231337 m, 64174 m/sec, 2831435 t fired, .

Time elapsed: 128 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/498 10/32 FlexibleBarrier-PT-16b-CTLFireability-02 1558737 m, 65480 m/sec, 3493349 t fired, .

Time elapsed: 133 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/498 11/32 FlexibleBarrier-PT-16b-CTLFireability-02 1870565 m, 62365 m/sec, 4147250 t fired, .

Time elapsed: 138 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/498 13/32 FlexibleBarrier-PT-16b-CTLFireability-02 2192049 m, 64296 m/sec, 4789267 t fired, .

Time elapsed: 143 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/498 15/32 FlexibleBarrier-PT-16b-CTLFireability-02 2476188 m, 56827 m/sec, 5388580 t fired, .

Time elapsed: 148 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/498 17/32 FlexibleBarrier-PT-16b-CTLFireability-02 2670508 m, 38864 m/sec, 6002535 t fired, .

Time elapsed: 153 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/498 18/32 FlexibleBarrier-PT-16b-CTLFireability-02 2823452 m, 30588 m/sec, 6621378 t fired, .

Time elapsed: 158 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 55/498 20/32 FlexibleBarrier-PT-16b-CTLFireability-02 2948075 m, 24924 m/sec, 7248597 t fired, .

Time elapsed: 163 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 60/498 21/32 FlexibleBarrier-PT-16b-CTLFireability-02 3150969 m, 40578 m/sec, 7852987 t fired, .

Time elapsed: 168 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 65/498 23/32 FlexibleBarrier-PT-16b-CTLFireability-02 3355844 m, 40975 m/sec, 8468194 t fired, .

Time elapsed: 173 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 70/498 25/32 FlexibleBarrier-PT-16b-CTLFireability-02 3519731 m, 32777 m/sec, 9084975 t fired, .

Time elapsed: 178 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 75/498 26/32 FlexibleBarrier-PT-16b-CTLFireability-02 3642344 m, 24522 m/sec, 9726022 t fired, .

Time elapsed: 183 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 80/498 28/32 FlexibleBarrier-PT-16b-CTLFireability-02 3827661 m, 37063 m/sec, 10348330 t fired, .

Time elapsed: 188 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 85/498 30/32 FlexibleBarrier-PT-16b-CTLFireability-02 4043485 m, 43164 m/sec, 10973607 t fired, .

Time elapsed: 193 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 90/498 31/32 FlexibleBarrier-PT-16b-CTLFireability-02 4214490 m, 34201 m/sec, 11602006 t fired, .

Time elapsed: 198 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 95/498 32/32 FlexibleBarrier-PT-16b-CTLFireability-02 4337132 m, 24528 m/sec, 12243969 t fired, .

Time elapsed: 203 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 208 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 FlexibleBarrier-PT-16b-CTLFireability-01
lola: time limit : 565 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/565 1/32 FlexibleBarrier-PT-16b-CTLFireability-01 133212 m, 26642 m/sec, 848698 t fired, .

Time elapsed: 213 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/565 2/32 FlexibleBarrier-PT-16b-CTLFireability-01 253636 m, 24084 m/sec, 1689397 t fired, .

Time elapsed: 218 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/565 6/32 FlexibleBarrier-PT-16b-CTLFireability-01 470437 m, 43360 m/sec, 2457519 t fired, .

Time elapsed: 223 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/565 10/32 FlexibleBarrier-PT-16b-CTLFireability-01 654499 m, 36812 m/sec, 3220950 t fired, .

Time elapsed: 228 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/565 13/32 FlexibleBarrier-PT-16b-CTLFireability-01 839220 m, 36944 m/sec, 3964532 t fired, .

Time elapsed: 233 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/565 16/32 FlexibleBarrier-PT-16b-CTLFireability-01 1012438 m, 34643 m/sec, 4698660 t fired, .

Time elapsed: 238 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/565 19/32 FlexibleBarrier-PT-16b-CTLFireability-01 1171864 m, 31885 m/sec, 5462902 t fired, .

Time elapsed: 243 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/565 23/32 FlexibleBarrier-PT-16b-CTLFireability-01 1378935 m, 41414 m/sec, 6205859 t fired, .

Time elapsed: 248 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/565 26/32 FlexibleBarrier-PT-16b-CTLFireability-01 1543731 m, 32959 m/sec, 6940020 t fired, .

Time elapsed: 253 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/565 29/32 FlexibleBarrier-PT-16b-CTLFireability-01 1708418 m, 32937 m/sec, 7669396 t fired, .

Time elapsed: 258 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 263 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 FlexibleBarrier-PT-16b-CTLFireability-00
lola: time limit : 667 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-00
lola: result : false
lola: markings : 118
lola: fired transitions : 170
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 FlexibleBarrier-PT-16b-CTLFireability-10
lola: time limit : 834 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-10
lola: result : false
lola: markings : 13
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 FlexibleBarrier-PT-16b-CTLFireability-08
lola: time limit : 1112 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-08
lola: result : false
lola: markings : 2
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 FlexibleBarrier-PT-16b-CTLFireability-03
lola: time limit : 1668 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-03
lola: result : false
lola: markings : 67541
lola: fired transitions : 169949
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 FlexibleBarrier-PT-16b-CTLFireability-12
lola: time limit : 3336 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 4/3336 3/32 FlexibleBarrier-PT-16b-CTLFireability-12 313566 m, 62713 m/sec, 757020 t fired, .

Time elapsed: 268 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 9/3336 4/32 FlexibleBarrier-PT-16b-CTLFireability-12 577855 m, 52857 m/sec, 1636639 t fired, .

Time elapsed: 273 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 14/3336 6/32 FlexibleBarrier-PT-16b-CTLFireability-12 838558 m, 52140 m/sec, 2473813 t fired, .

Time elapsed: 278 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 19/3336 7/32 FlexibleBarrier-PT-16b-CTLFireability-12 1108017 m, 53891 m/sec, 3265902 t fired, .

Time elapsed: 283 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 24/3336 9/32 FlexibleBarrier-PT-16b-CTLFireability-12 1343594 m, 47115 m/sec, 4141081 t fired, .

Time elapsed: 288 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 29/3336 10/32 FlexibleBarrier-PT-16b-CTLFireability-12 1628315 m, 56944 m/sec, 4918599 t fired, .

Time elapsed: 293 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 34/3336 11/32 FlexibleBarrier-PT-16b-CTLFireability-12 1826855 m, 39708 m/sec, 5753332 t fired, .

Time elapsed: 298 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 39/3336 13/32 FlexibleBarrier-PT-16b-CTLFireability-12 2153694 m, 65367 m/sec, 6595796 t fired, .

Time elapsed: 303 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 44/3336 15/32 FlexibleBarrier-PT-16b-CTLFireability-12 2363501 m, 41961 m/sec, 7418509 t fired, .

Time elapsed: 308 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 49/3336 17/32 FlexibleBarrier-PT-16b-CTLFireability-12 2721764 m, 71652 m/sec, 8290870 t fired, .

Time elapsed: 313 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 54/3336 19/32 FlexibleBarrier-PT-16b-CTLFireability-12 3090781 m, 73803 m/sec, 9141595 t fired, .

Time elapsed: 318 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 59/3336 21/32 FlexibleBarrier-PT-16b-CTLFireability-12 3456891 m, 73222 m/sec, 10041368 t fired, .

Time elapsed: 323 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 64/3336 23/32 FlexibleBarrier-PT-16b-CTLFireability-12 3731442 m, 54910 m/sec, 10842918 t fired, .

Time elapsed: 328 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 69/3336 25/32 FlexibleBarrier-PT-16b-CTLFireability-12 4068282 m, 67368 m/sec, 11709434 t fired, .

Time elapsed: 333 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 74/3336 27/32 FlexibleBarrier-PT-16b-CTLFireability-12 4424313 m, 71206 m/sec, 12603026 t fired, .

Time elapsed: 338 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 79/3336 29/32 FlexibleBarrier-PT-16b-CTLFireability-12 4675679 m, 50273 m/sec, 13307906 t fired, .

Time elapsed: 343 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 84/3336 31/32 FlexibleBarrier-PT-16b-CTLFireability-12 4860955 m, 37055 m/sec, 14038470 t fired, .

Time elapsed: 348 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 89/3336 32/32 FlexibleBarrier-PT-16b-CTLFireability-12 5168280 m, 61465 m/sec, 14841359 t fired, .

Time elapsed: 353 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 37 (type EXCL) for FlexibleBarrier-PT-16b-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16b-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 358 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16b-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-01: CTL unknown AGGR
FlexibleBarrier-PT-16b-CTLFireability-02: CTL unknown AGGR
FlexibleBarrier-PT-16b-CTLFireability-03: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-04: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-05: AFAG false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-06: EG true state space / EG
FlexibleBarrier-PT-16b-CTLFireability-07: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-11: CTL unknown AGGR
FlexibleBarrier-PT-16b-CTLFireability-12: CTL unknown AGGR
FlexibleBarrier-PT-16b-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-16b-CTLFireability-15: CTL true CTL model checker


Time elapsed: 358 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-16b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FlexibleBarrier-PT-16b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838853200546"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-16b.tgz
mv FlexibleBarrier-PT-16b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;