fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r167-tall-167838853100442
Last Updated
May 14, 2023

About the Execution of LoLa+red for FlexibleBarrier-PT-04a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
266.107 4719.00 7321.00 330.70 FTTTFFTFFTFTTFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838853100442.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FlexibleBarrier-PT-04a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838853100442
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 6.7K Feb 25 12:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 12:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 12:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 25 12:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 116K Feb 25 12:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Feb 25 12:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 25 12:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 23K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-00
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-01
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-02
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-03
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-04
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-05
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-06
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-07
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-08
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-09
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-10
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-11
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-12
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-13
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-14
FORMULA_NAME FlexibleBarrier-PT-04a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678484135882

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FlexibleBarrier-PT-04a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 21:35:37] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 21:35:37] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 21:35:37] [INFO ] Load time of PNML (sax parser for PT used): 35 ms
[2023-03-10 21:35:37] [INFO ] Transformed 51 places.
[2023-03-10 21:35:37] [INFO ] Transformed 88 transitions.
[2023-03-10 21:35:37] [INFO ] Found NUPN structural information;
[2023-03-10 21:35:37] [INFO ] Parsed PT model containing 51 places and 88 transitions and 309 arcs in 99 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 10 transitions
Reduce redundant transitions removed 10 transitions.
FORMULA FlexibleBarrier-PT-04a-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FlexibleBarrier-PT-04a-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 43 out of 51 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 78/78 transitions.
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 51 transition count 74
Applied a total of 4 rules in 12 ms. Remains 51 /51 variables (removed 0) and now considering 74/78 (removed 4) transitions.
// Phase 1: matrix 74 rows 51 cols
[2023-03-10 21:35:37] [INFO ] Computed 6 place invariants in 9 ms
[2023-03-10 21:35:38] [INFO ] Implicit Places using invariants in 358 ms returned []
[2023-03-10 21:35:38] [INFO ] Invariant cache hit.
[2023-03-10 21:35:38] [INFO ] State equation strengthened by 33 read => feed constraints.
[2023-03-10 21:35:38] [INFO ] Implicit Places using invariants and state equation in 74 ms returned []
Implicit Place search using SMT with State Equation took 457 ms to find 0 implicit places.
[2023-03-10 21:35:38] [INFO ] Invariant cache hit.
[2023-03-10 21:35:38] [INFO ] Dead Transitions using invariants and state equation in 82 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 51/51 places, 74/78 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 554 ms. Remains : 51/51 places, 74/78 transitions.
Support contains 43 out of 51 places after structural reductions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 37 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 8 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Support contains 42 out of 51 places (down from 43) after GAL structural reductions.
Finished random walk after 401 steps, including 0 resets, run visited all 54 properties in 59 ms. (steps per millisecond=6 )
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 6 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Computed a total of 3 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 2 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Graph (trivial) has 34 edges and 51 vertex of which 6 / 51 are part of one of the 2 SCC in 2 ms
Free SCC test removed 4 places
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 7 place count 44 transition count 66
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 44 transition count 59
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 14 place count 44 transition count 58
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 16 place count 43 transition count 58
Applied a total of 16 rules in 19 ms. Remains 43 /51 variables (removed 8) and now considering 58/74 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 43/51 places, 58/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 58 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Graph (trivial) has 31 edges and 51 vertex of which 6 / 51 are part of one of the 2 SCC in 0 ms
Free SCC test removed 4 places
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 9 place count 43 transition count 65
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 0 with 5 rules applied. Total rules applied 14 place count 43 transition count 60
Partial Post-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 17 place count 43 transition count 60
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 18 place count 42 transition count 59
Iterating global reduction 0 with 1 rules applied. Total rules applied 19 place count 42 transition count 59
Applied a total of 19 rules in 12 ms. Remains 42 /51 variables (removed 9) and now considering 59/74 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 42/51 places, 59/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Graph (trivial) has 40 edges and 51 vertex of which 12 / 51 are part of one of the 4 SCC in 0 ms
Free SCC test removed 8 places
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 9 place count 39 transition count 59
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 15 place count 39 transition count 53
Applied a total of 15 rules in 7 ms. Remains 39 /51 variables (removed 12) and now considering 53/74 (removed 21) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 39/51 places, 53/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 53 transitions.
Finished random walk after 26 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=26 )
FORMULA FlexibleBarrier-PT-04a-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 51/51 places, 74/74 transitions.
Applied a total of 0 rules in 1 ms. Remains 51 /51 variables (removed 0) and now considering 74/74 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 51/51 places, 74/74 transitions.
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:38] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:39] [INFO ] Input system was already deterministic with 74 transitions.
[2023-03-10 21:35:39] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:35:39] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:35:39] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-10 21:35:39] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 51 places, 74 transitions and 237 arcs took 1 ms.
Total runtime 1584 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FlexibleBarrier-PT-04a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA FlexibleBarrier-PT-04a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FlexibleBarrier-PT-04a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678484140601

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 51 (type EXCL) for 6 FlexibleBarrier-PT-04a-CTLFireability-03
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 51 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-03
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 FlexibleBarrier-PT-04a-CTLFireability-05
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type FNDP) for 6 FlexibleBarrier-PT-04a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 6 FlexibleBarrier-PT-04a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SRCH) for 6 FlexibleBarrier-PT-04a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SRCH) for FlexibleBarrier-PT-04a-CTLFireability-03
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type FNDP) for 28 FlexibleBarrier-PT-04a-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 53 (type FNDP) for FlexibleBarrier-PT-04a-CTLFireability-03
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for FlexibleBarrier-PT-04a-CTLFireability-03 (obsolete)
lola: LAUNCH task # 58 (type EQUN) for 28 FlexibleBarrier-PT-04a-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SRCH) for 28 FlexibleBarrier-PT-04a-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 57 (type FNDP) for FlexibleBarrier-PT-04a-CTLFireability-09
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 58 (type EQUN) for FlexibleBarrier-PT-04a-CTLFireability-09 (obsolete)
lola: CANCELED task # 60 (type SRCH) for FlexibleBarrier-PT-04a-CTLFireability-09 (obsolete)
lola: FINISHED task # 60 (type SRCH) for FlexibleBarrier-PT-04a-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 54 (type EQUN) for FlexibleBarrier-PT-04a-CTLFireability-03
lola: result : unknown
sara: try reading problem file /home/mcc/execution/375/CTLFireability-58.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 58 (type EQUN) for FlexibleBarrier-PT-04a-CTLFireability-09
lola: result : true
lola: FINISHED task # 17 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-05
lola: result : false
lola: markings : 10557
lola: fired transitions : 114580
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 FlexibleBarrier-PT-04a-CTLFireability-15
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-15
lola: result : true
lola: markings : 708
lola: fired transitions : 2545
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 FlexibleBarrier-PT-04a-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-14
lola: result : true
lola: markings : 48
lola: fired transitions : 78
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 FlexibleBarrier-PT-04a-CTLFireability-13
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-13
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 FlexibleBarrier-PT-04a-CTLFireability-11
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-11
lola: result : true
lola: markings : 69
lola: fired transitions : 114
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 28 FlexibleBarrier-PT-04a-CTLFireability-09
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 FlexibleBarrier-PT-04a-CTLFireability-08
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-08
lola: result : false
lola: markings : 4
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 FlexibleBarrier-PT-04a-CTLFireability-07
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-07
lola: result : false
lola: markings : 20736
lola: fired transitions : 169986
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 FlexibleBarrier-PT-04a-CTLFireability-01
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-01
lola: result : true
lola: markings : 20737
lola: fired transitions : 151683
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 FlexibleBarrier-PT-04a-CTLFireability-00
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-00
lola: result : false
lola: markings : 7899
lola: fired transitions : 38441
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 28 FlexibleBarrier-PT-04a-CTLFireability-09
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 13 FlexibleBarrier-PT-04a-CTLFireability-04
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-04
lola: result : false
lola: markings : 475
lola: fired transitions : 887
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 FlexibleBarrier-PT-04a-CTLFireability-06
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for FlexibleBarrier-PT-04a-CTLFireability-06
lola: result : true
lola: markings : 877
lola: fired transitions : 1364
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-04a-CTLFireability-00: CTL false CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-01: CTL true CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-03: DISJ true findpath
FlexibleBarrier-PT-04a-CTLFireability-04: SP ACTL false LTL model checker
FlexibleBarrier-PT-04a-CTLFireability-05: CTL false CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-06: CTL true CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-07: CTL false CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-08: CTL false CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-09: DISJ true DISJ
FlexibleBarrier-PT-04a-CTLFireability-11: CTL true CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-13: CTL false CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-14: CTL true CTL model checker
FlexibleBarrier-PT-04a-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-04a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FlexibleBarrier-PT-04a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838853100442"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-04a.tgz
mv FlexibleBarrier-PT-04a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;