About the Execution of LoLa+red for FMS-PT-00100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16221.495 | 134021.00 | 229060.00 | 9032.10 | ?TTF??F??TTT?T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852700225.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FMS-PT-00100, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852700225
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 6.6K Feb 25 20:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 20:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 20:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 20:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 20:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 139K Feb 25 20:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 20:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 67K Feb 25 20:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 16K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00100-CTLCardinality-00
FORMULA_NAME FMS-PT-00100-CTLCardinality-01
FORMULA_NAME FMS-PT-00100-CTLCardinality-02
FORMULA_NAME FMS-PT-00100-CTLCardinality-03
FORMULA_NAME FMS-PT-00100-CTLCardinality-04
FORMULA_NAME FMS-PT-00100-CTLCardinality-05
FORMULA_NAME FMS-PT-00100-CTLCardinality-06
FORMULA_NAME FMS-PT-00100-CTLCardinality-07
FORMULA_NAME FMS-PT-00100-CTLCardinality-08
FORMULA_NAME FMS-PT-00100-CTLCardinality-09
FORMULA_NAME FMS-PT-00100-CTLCardinality-10
FORMULA_NAME FMS-PT-00100-CTLCardinality-11
FORMULA_NAME FMS-PT-00100-CTLCardinality-12
FORMULA_NAME FMS-PT-00100-CTLCardinality-13
FORMULA_NAME FMS-PT-00100-CTLCardinality-14
FORMULA_NAME FMS-PT-00100-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678446614914
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FMS-PT-00100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:10:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 11:10:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:10:16] [INFO ] Load time of PNML (sax parser for PT used): 22 ms
[2023-03-10 11:10:16] [INFO ] Transformed 22 places.
[2023-03-10 11:10:16] [INFO ] Transformed 20 transitions.
[2023-03-10 11:10:16] [INFO ] Parsed PT model containing 22 places and 20 transitions and 50 arcs in 76 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 11 ms.
Support contains 22 out of 22 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 7 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 22 cols
[2023-03-10 11:10:16] [INFO ] Computed 6 place invariants in 6 ms
[2023-03-10 11:10:16] [INFO ] Implicit Places using invariants in 139 ms returned []
[2023-03-10 11:10:16] [INFO ] Invariant cache hit.
[2023-03-10 11:10:16] [INFO ] Implicit Places using invariants and state equation in 41 ms returned []
Implicit Place search using SMT with State Equation took 203 ms to find 0 implicit places.
[2023-03-10 11:10:16] [INFO ] Invariant cache hit.
[2023-03-10 11:10:16] [INFO ] Dead Transitions using invariants and state equation in 48 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 261 ms. Remains : 22/22 places, 20/20 transitions.
Support contains 22 out of 22 places after structural reductions.
[2023-03-10 11:10:17] [INFO ] Flatten gal took : 17 ms
[2023-03-10 11:10:17] [INFO ] Flatten gal took : 5 ms
[2023-03-10 11:10:17] [INFO ] Input system was already deterministic with 20 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 125 ms. (steps per millisecond=80 ) properties (out of 82) seen :46
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Running SMT prover for 36 properties.
[2023-03-10 11:10:17] [INFO ] Invariant cache hit.
[2023-03-10 11:10:17] [INFO ] [Real]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-10 11:10:17] [INFO ] After 34ms SMT Verify possible using state equation in real domain returned unsat :11 sat :5 real:20
[2023-03-10 11:10:17] [INFO ] After 47ms SMT Verify possible using trap constraints in real domain returned unsat :11 sat :5 real:20
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-10 11:10:17] [INFO ] After 159ms SMT Verify possible using all constraints in real domain returned unsat :11 sat :5 real:20
[2023-03-10 11:10:17] [INFO ] [Nat]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-10 11:10:17] [INFO ] After 39ms SMT Verify possible using state equation in natural domain returned unsat :13 sat :23
[2023-03-10 11:10:17] [INFO ] After 104ms SMT Verify possible using trap constraints in natural domain returned unsat :13 sat :23
Attempting to minimize the solution found.
Minimization took 45 ms.
[2023-03-10 11:10:17] [INFO ] After 228ms SMT Verify possible using all constraints in natural domain returned unsat :13 sat :23
Fused 36 Parikh solutions to 23 different solutions.
Finished Parikh walk after 702 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=351 )
Parikh walk visited 23 properties in 463 ms.
Successfully simplified 13 atomic propositions for a total of 16 simplifications.
FORMULA FMS-PT-00100-CTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FMS-PT-00100-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 4 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 3 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 22 transition count 18
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 7 edges and 19 vertex of which 3 / 19 are part of one of the 1 SCC in 2 ms
Free SCC test removed 2 places
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 7 rules applied. Total rules applied 9 place count 17 transition count 15
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 16 place count 12 transition count 13
Applied a total of 16 rules in 8 ms. Remains 12 /22 variables (removed 10) and now considering 13/20 (removed 7) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 12/22 places, 13/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 8 places and 0 transitions.
Graph (trivial) has 12 edges and 14 vertex of which 9 / 14 are part of one of the 3 SCC in 0 ms
Free SCC test removed 6 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 11 rules applied. Total rules applied 16 place count 8 transition count 13
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 10 rules applied. Total rules applied 26 place count 5 transition count 6
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 27 place count 4 transition count 6
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 4 with 2 rules applied. Total rules applied 29 place count 4 transition count 4
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 1 Pre rules applied. Total rules applied 29 place count 4 transition count 3
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 3 rules applied. Total rules applied 32 place count 2 transition count 3
Applied a total of 32 rules in 1 ms. Remains 2 /22 variables (removed 20) and now considering 3/20 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/22 places, 3/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 8 places and 0 transitions.
Graph (trivial) has 12 edges and 14 vertex of which 9 / 14 are part of one of the 3 SCC in 0 ms
Free SCC test removed 6 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 11 rules applied. Total rules applied 16 place count 8 transition count 13
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 10 rules applied. Total rules applied 26 place count 5 transition count 6
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 27 place count 4 transition count 6
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 4 with 2 rules applied. Total rules applied 29 place count 4 transition count 4
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 1 Pre rules applied. Total rules applied 29 place count 4 transition count 3
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 3 rules applied. Total rules applied 32 place count 2 transition count 3
Applied a total of 32 rules in 2 ms. Remains 2 /22 variables (removed 20) and now considering 3/20 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 2/22 places, 3/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 101 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=101 )
FORMULA FMS-PT-00100-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 22 transition count 16
Reduce places removed 7 places and 0 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 9 rules applied. Total rules applied 13 place count 15 transition count 14
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 3 rules applied. Total rules applied 16 place count 13 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 17 place count 12 transition count 13
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 17 place count 12 transition count 11
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 21 place count 10 transition count 11
Applied a total of 21 rules in 2 ms. Remains 10 /22 variables (removed 12) and now considering 11/20 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 10/22 places, 11/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Input system was already deterministic with 20 transitions.
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:18] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:18] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-10 11:10:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 22 places, 20 transitions and 50 arcs took 0 ms.
Total runtime 2147 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FMS-PT-00100
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
FORMULA FMS-PT-00100-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00100-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00100-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00100-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00100-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678446748935
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 4 (type EXCL) for 3 FMS-PT-00100-CTLCardinality-02
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 4 (type EXCL) for FMS-PT-00100-CTLCardinality-02
lola: result : true
lola: markings : 282
lola: fired transitions : 302
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 25 (type EXCL) for 24 FMS-PT-00100-CTLCardinality-11
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 25 (type EXCL) for FMS-PT-00100-CTLCardinality-11
lola: result : true
lola: markings : 508
lola: fired transitions : 560
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 22 (type EXCL) for 21 FMS-PT-00100-CTLCardinality-10
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 41 (type FNDP) for 6 FMS-PT-00100-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 22 (type EXCL) for FMS-PT-00100-CTLCardinality-10
lola: result : true
lola: markings : 50961
lola: fired transitions : 71049
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 FMS-PT-00100-CTLCardinality-13
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for FMS-PT-00100-CTLCardinality-13
lola: result : true
lola: markings : 130446
lola: fired transitions : 186898
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 FMS-PT-00100-CTLCardinality-12
lola: time limit : 400 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 1 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/400 13/32 FMS-PT-00100-CTLCardinality-12 3010403 m, 602080 m/sec, 8181303 t fired, .
41 EF DL FNDP 5/3600 0/5 FMS-PT-00100-CTLCardinality-04 104721724 t fired, 105 attempts, .
Time elapsed: 5 secs. Pages in use: 13
# running tasks: 2 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 1 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 10/400 29/32 FMS-PT-00100-CTLCardinality-12 6725555 m, 743030 m/sec, 16983510 t fired, .
41 EF DL FNDP 10/3600 0/5 FMS-PT-00100-CTLCardinality-04 210824470 t fired, 211 attempts, .
Time elapsed: 10 secs. Pages in use: 29
# running tasks: 2 of 4 Visible: 13
lola: CANCELED task # 28 (type EXCL) for FMS-PT-00100-CTLCardinality-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 1 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 EF DL FNDP 15/3600 0/5 FMS-PT-00100-CTLCardinality-04 320248768 t fired, 321 attempts, .
Time elapsed: 15 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 13
lola: LAUNCH task # 13 (type EXCL) for 12 FMS-PT-00100-CTLCardinality-06
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for FMS-PT-00100-CTLCardinality-06
lola: result : false
lola: markings : 951
lola: fired transitions : 1054
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 FMS-PT-00100-CTLCardinality-05
lola: time limit : 512 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-06: CTL false CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 1 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/512 16/32 FMS-PT-00100-CTLCardinality-05 3592650 m, 718530 m/sec, 8514135 t fired, .
41 EF DL FNDP 20/3600 0/5 FMS-PT-00100-CTLCardinality-04 426014637 t fired, 427 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-06: CTL false CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 1 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/512 29/32 FMS-PT-00100-CTLCardinality-05 6683390 m, 618148 m/sec, 15680592 t fired, .
41 EF DL FNDP 25/3600 0/5 FMS-PT-00100-CTLCardinality-04 531353927 t fired, 532 attempts, .
Time elapsed: 25 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 13
lola: CANCELED task # 10 (type EXCL) for FMS-PT-00100-CTLCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-06: CTL false CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 1 1 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 EF DL FNDP 30/3600 0/5 FMS-PT-00100-CTLCardinality-04 638460214 t fired, 639 attempts, .
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lola: LAUNCH task # 1 (type EXCL) for 0 FMS-PT-00100-CTLCardinality-00
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1 CTL EXCL 5/595 14/32 FMS-PT-00100-CTLCardinality-00 3265684 m, 653136 m/sec, 8793810 t fired, .
41 EF DL FNDP 35/3600 0/5 FMS-PT-00100-CTLCardinality-04 745029102 t fired, 746 attempts, .
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1 CTL EXCL 10/595 26/32 FMS-PT-00100-CTLCardinality-00 6161956 m, 579254 m/sec, 17146334 t fired, .
41 EF DL FNDP 40/3600 0/5 FMS-PT-00100-CTLCardinality-04 852157969 t fired, 853 attempts, .
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41 EF DL FNDP 45/3600 0/5 FMS-PT-00100-CTLCardinality-04 959371865 t fired, 960 attempts, .
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FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
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40 EF DL EXCL 5/711 1/32 FMS-PT-00100-CTLCardinality-04 34654453 m, 6930890 m/sec, 34654455 t fired, .
41 EF DL FNDP 50/3600 0/5 FMS-PT-00100-CTLCardinality-04 1065619276 t fired, 1066 attempts, .
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40 EF DL EXCL 10/711 1/32 FMS-PT-00100-CTLCardinality-04 69285507 m, 6926210 m/sec, 69285507 t fired, .
41 EF DL FNDP 55/3600 0/5 FMS-PT-00100-CTLCardinality-04 1171773066 t fired, 1172 attempts, .
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40 EF DL EXCL 15/711 1/32 FMS-PT-00100-CTLCardinality-04 103402544 m, 6823407 m/sec, 103402544 t fired, .
41 EF DL FNDP 60/3600 0/5 FMS-PT-00100-CTLCardinality-04 1276379309 t fired, 1277 attempts, .
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40 EF DL EXCL 20/711 1/32 FMS-PT-00100-CTLCardinality-04 137615568 m, 6842604 m/sec, 137615567 t fired, .
41 EF DL FNDP 65/3600 0/5 FMS-PT-00100-CTLCardinality-04 1381025401 t fired, 1382 attempts, .
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40 EF DL EXCL 25/711 1/32 FMS-PT-00100-CTLCardinality-04 171846628 m, 6846212 m/sec, 171846629 t fired, .
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40 EF DL EXCL 30/711 1/32 FMS-PT-00100-CTLCardinality-04 206408094 m, 6912293 m/sec, 206408095 t fired, .
41 EF DL FNDP 75/3600 0/5 FMS-PT-00100-CTLCardinality-04 1591434739 t fired, 1592 attempts, .
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40 EF DL EXCL 35/711 1/32 FMS-PT-00100-CTLCardinality-04 241027831 m, 6923947 m/sec, 241027833 t fired, .
41 EF DL FNDP 80/3600 0/5 FMS-PT-00100-CTLCardinality-04 1697275245 t fired, 1698 attempts, .
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40 EF DL EXCL 40/711 1/32 FMS-PT-00100-CTLCardinality-04 275462146 m, 6886863 m/sec, 275462145 t fired, .
41 EF DL FNDP 85/3600 0/5 FMS-PT-00100-CTLCardinality-04 1802617196 t fired, 1803 attempts, .
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40 EF DL EXCL 45/711 1/32 FMS-PT-00100-CTLCardinality-04 309131132 m, 6733797 m/sec, 309131131 t fired, .
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40 EF DL EXCL 53/711 1/32 FMS-PT-00100-CTLCardinality-04 324205009 m, 3014775 m/sec, 324205008 t fired, .
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40 EF DL EXCL 58/711 1/32 FMS-PT-00100-CTLCardinality-04 336750518 m, 2509101 m/sec, 336750519 t fired, .
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40 EF DL EXCL 64/711 1/32 FMS-PT-00100-CTLCardinality-04 348691173 m, 2388131 m/sec, 348691174 t fired, .
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FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 0 2 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EF DL EXCL 69/711 1/32 FMS-PT-00100-CTLCardinality-04 362219717 m, 2705708 m/sec, 362219718 t fired, .
41 EF DL FNDP 114/3600 0/5 FMS-PT-00100-CTLCardinality-04 -1916392428 t fired, 2379 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-06: CTL false CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 0 2 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EF DL EXCL 76/711 1/32 FMS-PT-00100-CTLCardinality-04 376282707 m, 2812598 m/sec, 376282706 t fired, .
41 EF DL FNDP 121/3600 0/5 FMS-PT-00100-CTLCardinality-04 -1773167277 t fired, 2522 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLCardinality-02: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-06: CTL false CTL model checker
FMS-PT-00100-CTLCardinality-10: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-11: CTL true CTL model checker
FMS-PT-00100-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-04: AG NODL 0 0 2 0 1 0 0 0
FMS-PT-00100-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-08: EGEF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
FMS-PT-00100-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EF DL EXCL 81/711 1/32 FMS-PT-00100-CTLCardinality-04 387334130 m, 2210284 m/sec, 387334129 t fired, .
41 EF DL FNDP 126/3600 0/5 FMS-PT-00100-CTLCardinality-04 -1669622504 t fired, 2626 attempts, .
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 467 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00100"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FMS-PT-00100, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852700225"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00100.tgz
mv FMS-PT-00100 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;