Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852700201.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FMS-PT-00010, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852700201
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 6.3K Feb 25 20:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 20:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 20:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 20:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 20:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 25 20:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 20:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 25 20:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 17K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00010-CTLCardinality-00
FORMULA_NAME FMS-PT-00010-CTLCardinality-01
FORMULA_NAME FMS-PT-00010-CTLCardinality-02
FORMULA_NAME FMS-PT-00010-CTLCardinality-03
FORMULA_NAME FMS-PT-00010-CTLCardinality-04
FORMULA_NAME FMS-PT-00010-CTLCardinality-05
FORMULA_NAME FMS-PT-00010-CTLCardinality-06
FORMULA_NAME FMS-PT-00010-CTLCardinality-07
FORMULA_NAME FMS-PT-00010-CTLCardinality-08
FORMULA_NAME FMS-PT-00010-CTLCardinality-09
FORMULA_NAME FMS-PT-00010-CTLCardinality-10
FORMULA_NAME FMS-PT-00010-CTLCardinality-11
FORMULA_NAME FMS-PT-00010-CTLCardinality-12
FORMULA_NAME FMS-PT-00010-CTLCardinality-13
FORMULA_NAME FMS-PT-00010-CTLCardinality-14
FORMULA_NAME FMS-PT-00010-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678446460139

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FMS-PT-00010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:07:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 11:07:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:07:41] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-03-10 11:07:41] [INFO ] Transformed 22 places.
[2023-03-10 11:07:41] [INFO ] Transformed 20 transitions.
[2023-03-10 11:07:41] [INFO ] Parsed PT model containing 22 places and 20 transitions and 50 arcs in 76 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 12 ms.
Initial state reduction rules removed 1 formulas.
FORMULA FMS-PT-00010-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 22 out of 22 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 8 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 22 cols
[2023-03-10 11:07:41] [INFO ] Computed 6 place invariants in 7 ms
[2023-03-10 11:07:42] [INFO ] Implicit Places using invariants in 345 ms returned []
[2023-03-10 11:07:42] [INFO ] Invariant cache hit.
[2023-03-10 11:07:42] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 423 ms to find 0 implicit places.
[2023-03-10 11:07:42] [INFO ] Invariant cache hit.
[2023-03-10 11:07:42] [INFO ] Dead Transitions using invariants and state equation in 44 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 478 ms. Remains : 22/22 places, 20/20 transitions.
Support contains 22 out of 22 places after structural reductions.
[2023-03-10 11:07:42] [INFO ] Flatten gal took : 15 ms
[2023-03-10 11:07:42] [INFO ] Flatten gal took : 5 ms
[2023-03-10 11:07:42] [INFO ] Input system was already deterministic with 20 transitions.
Incomplete random walk after 10005 steps, including 2 resets, run finished after 283 ms. (steps per millisecond=35 ) properties (out of 71) seen :54
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Running SMT prover for 17 properties.
[2023-03-10 11:07:42] [INFO ] Invariant cache hit.
[2023-03-10 11:07:42] [INFO ] [Real]Absence check using 6 positive place invariants in 2 ms returned sat
[2023-03-10 11:07:42] [INFO ] After 17ms SMT Verify possible using state equation in real domain returned unsat :2 sat :1 real:14
[2023-03-10 11:07:42] [INFO ] After 22ms SMT Verify possible using trap constraints in real domain returned unsat :2 sat :1 real:14
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-10 11:07:42] [INFO ] After 115ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :1 real:14
[2023-03-10 11:07:42] [INFO ] [Nat]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-10 11:07:43] [INFO ] After 17ms SMT Verify possible using state equation in natural domain returned unsat :11 sat :6
[2023-03-10 11:07:43] [INFO ] After 39ms SMT Verify possible using trap constraints in natural domain returned unsat :11 sat :6
Attempting to minimize the solution found.
Minimization took 15 ms.
[2023-03-10 11:07:43] [INFO ] After 127ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :6
Fused 17 Parikh solutions to 6 different solutions.
Finished Parikh walk after 66 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=66 )
Parikh walk visited 6 properties in 23 ms.
Successfully simplified 11 atomic propositions for a total of 15 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA FMS-PT-00010-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FMS-PT-00010-CTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:07:43] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 4 ms
FORMULA FMS-PT-00010-CTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Support contains 20 out of 22 places (down from 22) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 8 places and 0 transitions.
Graph (trivial) has 11 edges and 14 vertex of which 6 / 14 are part of one of the 2 SCC in 2 ms
Free SCC test removed 4 places
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 12 rules applied. Total rules applied 17 place count 10 transition count 12
Reduce places removed 4 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 25 place count 6 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 25 place count 6 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 27 place count 5 transition count 7
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 28 place count 5 transition count 6
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 28 place count 5 transition count 5
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 3 rules applied. Total rules applied 31 place count 3 transition count 5
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 3 with 1 rules applied. Total rules applied 32 place count 3 transition count 4
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 33 place count 2 transition count 4
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 34 place count 2 transition count 3
Applied a total of 34 rules in 13 ms. Remains 2 /22 variables (removed 20) and now considering 3/20 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 2/22 places, 3/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 4 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 17
Reduce places removed 5 places and 0 transitions.
Graph (trivial) has 10 edges and 17 vertex of which 6 / 17 are part of one of the 2 SCC in 0 ms
Free SCC test removed 4 places
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 8 rules applied. Total rules applied 11 place count 13 transition count 15
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 18 place count 10 transition count 11
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 19 place count 10 transition count 10
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 19 place count 10 transition count 9
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 21 place count 9 transition count 9
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 22 place count 9 transition count 9
Applied a total of 22 rules in 6 ms. Remains 9 /22 variables (removed 13) and now considering 9/20 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 9/22 places, 9/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 22 transition count 16
Reduce places removed 6 places and 0 transitions.
Graph (trivial) has 10 edges and 16 vertex of which 6 / 16 are part of one of the 2 SCC in 0 ms
Free SCC test removed 4 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 9 rules applied. Total rules applied 13 place count 12 transition count 14
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 8 rules applied. Total rules applied 21 place count 9 transition count 9
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 22 place count 8 transition count 9
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 22 place count 8 transition count 7
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 4 with 5 rules applied. Total rules applied 27 place count 5 transition count 7
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 28 place count 5 transition count 6
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 1 Pre rules applied. Total rules applied 28 place count 5 transition count 5
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 3 rules applied. Total rules applied 31 place count 3 transition count 5
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 4 with 1 rules applied. Total rules applied 32 place count 3 transition count 4
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 34 place count 2 transition count 3
Applied a total of 34 rules in 4 ms. Remains 2 /22 variables (removed 20) and now considering 3/20 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 2/22 places, 3/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 5 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 7 places and 0 transitions.
Graph (trivial) has 9 edges and 15 vertex of which 6 / 15 are part of one of the 2 SCC in 0 ms
Free SCC test removed 4 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 9 rules applied. Total rules applied 14 place count 11 transition count 14
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 19 place count 10 transition count 10
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 19 place count 10 transition count 8
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 5 rules applied. Total rules applied 24 place count 7 transition count 8
Applied a total of 24 rules in 3 ms. Remains 7 /22 variables (removed 15) and now considering 8/20 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 7/22 places, 8/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 17
Reduce places removed 4 places and 0 transitions.
Graph (trivial) has 5 edges and 18 vertex of which 3 / 18 are part of one of the 1 SCC in 0 ms
Free SCC test removed 2 places
Iterating post reduction 1 with 5 rules applied. Total rules applied 8 place count 16 transition count 17
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 10 place count 16 transition count 15
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 10 place count 16 transition count 12
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 7 rules applied. Total rules applied 17 place count 12 transition count 12
Applied a total of 17 rules in 3 ms. Remains 12 /22 variables (removed 10) and now considering 12/20 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 12/22 places, 12/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:07:43] [INFO ] Input system was already deterministic with 20 transitions.
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:07:43] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-10 11:07:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 22 places, 20 transitions and 50 arcs took 0 ms.
Total runtime 1676 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FMS-PT-00010
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373

FORMULA FMS-PT-00010-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00010-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678446507898

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:463
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 1 (type EXCL) for 0 FMS-PT-00010-CTLCardinality-00
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 1 (type EXCL) for FMS-PT-00010-CTLCardinality-00
lola: result : false
lola: markings : 3783
lola: fired transitions : 6259
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 35 (type EXCL) for 34 FMS-PT-00010-CTLCardinality-12
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for FMS-PT-00010-CTLCardinality-12
lola: result : true
lola: markings : 14
lola: fired transitions : 28
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 FMS-PT-00010-CTLCardinality-09
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 26 (type EXCL) for FMS-PT-00010-CTLCardinality-09
lola: result : true
lola: markings : 2119
lola: fired transitions : 2393
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 37 FMS-PT-00010-CTLCardinality-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 40 (type EXCL) for FMS-PT-00010-CTLCardinality-15
lola: result : false
lola: markings : 3
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 FMS-PT-00010-CTLCardinality-11
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:703
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLCardinality-00: CTL false CTL model checker
FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/360 5/32 FMS-PT-00010-CTLCardinality-11 1156022 m, 231204 m/sec, 6307728 t fired, .

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FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 10/360 9/32 FMS-PT-00010-CTLCardinality-11 2192864 m, 207368 m/sec, 12175546 t fired, .

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FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 15/360 13/32 FMS-PT-00010-CTLCardinality-11 3175931 m, 196613 m/sec, 17900824 t fired, .

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FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 20/360 17/32 FMS-PT-00010-CTLCardinality-11 4142509 m, 193315 m/sec, 23545971 t fired, .

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FMS-PT-00010-CTLCardinality-00: CTL false CTL model checker
FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 25/360 21/32 FMS-PT-00010-CTLCardinality-11 5123248 m, 196147 m/sec, 29331943 t fired, .

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FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 30/360 25/32 FMS-PT-00010-CTLCardinality-11 6058726 m, 187095 m/sec, 34926254 t fired, .

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FMS-PT-00010-CTLCardinality-00: CTL false CTL model checker
FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLCardinality-01: DISJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 35/360 29/32 FMS-PT-00010-CTLCardinality-11 6990180 m, 186290 m/sec, 40453482 t fired, .

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lola: CANCELED task # 32 (type EXCL) for FMS-PT-00010-CTLCardinality-11 (memory limit exceeded)
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FMS-PT-00010-CTLCardinality-00: CTL false CTL model checker
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FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker

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FMS-PT-00010-CTLCardinality-02: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-05: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-07: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-00010-CTLCardinality-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 42 (type EXCL) for 37 FMS-PT-00010-CTLCardinality-15
lola: time limit : 395 sec
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lola: FINISHED task # 42 (type EXCL) for FMS-PT-00010-CTLCardinality-15
lola: result : false
lola: markings : 41
lola: fired transitions : 43
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 FMS-PT-00010-CTLCardinality-06
lola: time limit : 445 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for FMS-PT-00010-CTLCardinality-06
lola: result : true
lola: markings : 2207547
lola: fired transitions : 3188774
lola: time used : 3.000000
lola: memory pages used : 9
lola: LAUNCH task # 45 (type EXCL) for 3 FMS-PT-00010-CTLCardinality-01
lola: time limit : 508 sec
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lola: FINISHED task # 45 (type EXCL) for FMS-PT-00010-CTLCardinality-01
lola: result : true
lola: markings : 371
lola: fired transitions : 1572
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 FMS-PT-00010-CTLCardinality-07
lola: time limit : 592 sec
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lola: FINISHED task # 23 (type EXCL) for FMS-PT-00010-CTLCardinality-07
lola: result : true
lola: markings : 41261
lola: fired transitions : 299120
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 FMS-PT-00010-CTLCardinality-05
lola: time limit : 711 sec
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lola: FINISHED task # 17 (type EXCL) for FMS-PT-00010-CTLCardinality-05
lola: result : true
lola: markings : 38
lola: fired transitions : 120
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 3 FMS-PT-00010-CTLCardinality-01
lola: time limit : 889 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for FMS-PT-00010-CTLCardinality-01
lola: result : true
lola: markings : 5
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 FMS-PT-00010-CTLCardinality-02
lola: time limit : 1185 sec
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lola: FINISHED task # 11 (type EXCL) for FMS-PT-00010-CTLCardinality-02
lola: result : true
lola: markings : 11
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 FMS-PT-00010-CTLCardinality-10
lola: time limit : 1778 sec
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lola: FINISHED task # 29 (type EXCL) for FMS-PT-00010-CTLCardinality-10
lola: result : false
lola: markings : 143
lola: fired transitions : 449
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 FMS-PT-00010-CTLCardinality-03
lola: time limit : 3557 sec
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lola: FINISHED task # 14 (type EXCL) for FMS-PT-00010-CTLCardinality-03
lola: result : false
lola: markings : 6292
lola: fired transitions : 49173
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 12

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLCardinality-00: CTL false CTL model checker
FMS-PT-00010-CTLCardinality-01: DISJ false DISJ
FMS-PT-00010-CTLCardinality-02: AGEF true tscc_search
FMS-PT-00010-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00010-CTLCardinality-05: AGEF true tscc_search
FMS-PT-00010-CTLCardinality-06: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-07: AGEF true tscc_search
FMS-PT-00010-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-10: CTL false CTL model checker
FMS-PT-00010-CTLCardinality-11: CTL unknown AGGR
FMS-PT-00010-CTLCardinality-12: CTL true CTL model checker
FMS-PT-00010-CTLCardinality-15: DISJ false DISJ


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00010"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FMS-PT-00010, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852700201"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00010.tgz
mv FMS-PT-00010 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;