About the Execution of LoLa+red for FMS-PT-00002
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16223.392 | 93364.00 | 233860.00 | 4970.70 | TFFFF?F??TTT?T?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852600185.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FMS-PT-00002, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852600185
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 8.5K Feb 25 20:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 103K Feb 25 20:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 20:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 25 20:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 20:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 132K Feb 25 20:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 20:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 127K Feb 25 20:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 16K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00002-CTLCardinality-00
FORMULA_NAME FMS-PT-00002-CTLCardinality-01
FORMULA_NAME FMS-PT-00002-CTLCardinality-02
FORMULA_NAME FMS-PT-00002-CTLCardinality-03
FORMULA_NAME FMS-PT-00002-CTLCardinality-04
FORMULA_NAME FMS-PT-00002-CTLCardinality-05
FORMULA_NAME FMS-PT-00002-CTLCardinality-06
FORMULA_NAME FMS-PT-00002-CTLCardinality-07
FORMULA_NAME FMS-PT-00002-CTLCardinality-08
FORMULA_NAME FMS-PT-00002-CTLCardinality-09
FORMULA_NAME FMS-PT-00002-CTLCardinality-10
FORMULA_NAME FMS-PT-00002-CTLCardinality-11
FORMULA_NAME FMS-PT-00002-CTLCardinality-12
FORMULA_NAME FMS-PT-00002-CTLCardinality-13
FORMULA_NAME FMS-PT-00002-CTLCardinality-14
FORMULA_NAME FMS-PT-00002-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678446275057
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FMS-PT-00002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:04:36] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 11:04:36] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:04:36] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-03-10 11:04:36] [INFO ] Transformed 22 places.
[2023-03-10 11:04:36] [INFO ] Transformed 20 transitions.
[2023-03-10 11:04:36] [INFO ] Parsed PT model containing 22 places and 20 transitions and 50 arcs in 77 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 14 ms.
Initial state reduction rules removed 1 formulas.
FORMULA FMS-PT-00002-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 22 out of 22 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 7 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 22 cols
[2023-03-10 11:04:36] [INFO ] Computed 6 place invariants in 8 ms
[2023-03-10 11:04:36] [INFO ] Implicit Places using invariants in 135 ms returned []
[2023-03-10 11:04:36] [INFO ] Invariant cache hit.
[2023-03-10 11:04:36] [INFO ] Implicit Places using invariants and state equation in 48 ms returned []
Implicit Place search using SMT with State Equation took 206 ms to find 0 implicit places.
[2023-03-10 11:04:36] [INFO ] Invariant cache hit.
[2023-03-10 11:04:36] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 247 ms. Remains : 22/22 places, 20/20 transitions.
Support contains 22 out of 22 places after structural reductions.
[2023-03-10 11:04:37] [INFO ] Flatten gal took : 14 ms
[2023-03-10 11:04:37] [INFO ] Flatten gal took : 4 ms
[2023-03-10 11:04:37] [INFO ] Input system was already deterministic with 20 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 428 ms. (steps per millisecond=23 ) properties (out of 92) seen :63
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 29) seen :0
Running SMT prover for 29 properties.
[2023-03-10 11:04:37] [INFO ] Invariant cache hit.
[2023-03-10 11:04:38] [INFO ] [Real]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-10 11:04:38] [INFO ] After 76ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:28
[2023-03-10 11:04:38] [INFO ] [Nat]Absence check using 6 positive place invariants in 3 ms returned sat
[2023-03-10 11:04:38] [INFO ] After 74ms SMT Verify possible using all constraints in natural domain returned unsat :29 sat :0
Fused 29 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 29 atomic propositions for a total of 15 simplifications.
FORMULA FMS-PT-00002-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FMS-PT-00002-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:04:38] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 3 ms
FORMULA FMS-PT-00002-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Support contains 20 out of 22 places (down from 22) after GAL structural reductions.
FORMULA FMS-PT-00002-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 22 transition count 19
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 21 transition count 19
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 3 place count 21 transition count 19
Applied a total of 3 rules in 6 ms. Remains 21 /22 variables (removed 1) and now considering 19/20 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 21/22 places, 19/20 transitions.
[2023-03-10 11:04:38] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
FORMULA FMS-PT-00002-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 19 transitions.
Support contains 0 out of 21 places (down from 10) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 22 transition count 19
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 21 transition count 19
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 2 place count 21 transition count 17
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 5 rules applied. Total rules applied 7 place count 18 transition count 17
Applied a total of 7 rules in 3 ms. Remains 18 /22 variables (removed 4) and now considering 17/20 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 18/22 places, 17/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 17 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 7 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 7 places and 0 transitions.
Graph (trivial) has 9 edges and 15 vertex of which 6 / 15 are part of one of the 2 SCC in 1 ms
Free SCC test removed 4 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 9 rules applied. Total rules applied 14 place count 11 transition count 14
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 19 place count 10 transition count 10
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 19 place count 10 transition count 9
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 21 place count 9 transition count 9
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 23 place count 8 transition count 8
Applied a total of 23 rules in 4 ms. Remains 8 /22 variables (removed 14) and now considering 8/20 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 8/22 places, 8/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 22 transition count 16
Reduce places removed 6 places and 0 transitions.
Graph (trivial) has 11 edges and 16 vertex of which 9 / 16 are part of one of the 3 SCC in 0 ms
Free SCC test removed 6 places
Iterating post reduction 1 with 7 rules applied. Total rules applied 11 place count 10 transition count 16
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 18 place count 9 transition count 10
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 20 place count 9 transition count 8
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 20 place count 9 transition count 6
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 5 rules applied. Total rules applied 25 place count 6 transition count 6
Applied a total of 25 rules in 2 ms. Remains 6 /22 variables (removed 16) and now considering 6/20 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 6/22 places, 6/20 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:04:38] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:04:38] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:04:38] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-10 11:04:38] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 22 places, 20 transitions and 50 arcs took 1 ms.
Total runtime 1842 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FMS-PT-00002
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
FORMULA FMS-PT-00002-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00002-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00002-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00002-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00002-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678446368421
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 35 (type EXCL) for 3 FMS-PT-00002-CTLCardinality-02
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 14 (type CNST) for 9 FMS-PT-00002-CTLCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 14 (type CNST) for FMS-PT-00002-CTLCardinality-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 37 (type FNDP) for 16 FMS-PT-00002-CTLCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 35 (type EXCL) for FMS-PT-00002-CTLCardinality-02
lola: result : true
lola: markings : 3444
lola: fired transitions : 16311
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 FMS-PT-00002-CTLCardinality-13
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 40 (type FNDP) for 9 FMS-PT-00002-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 29 (type EXCL) for FMS-PT-00002-CTLCardinality-13
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 FMS-PT-00002-CTLCardinality-09
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for FMS-PT-00002-CTLCardinality-09
lola: result : true
lola: markings : 3444
lola: fired transitions : 22519
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 FMS-PT-00002-CTLCardinality-03
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for FMS-PT-00002-CTLCardinality-03
lola: result : false
lola: markings : 3444
lola: fired transitions : 53990
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 FMS-PT-00002-CTLCardinality-00
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for FMS-PT-00002-CTLCardinality-00
lola: result : true
lola: markings : 3444
lola: fired transitions : 33131
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 9 FMS-PT-00002-CTLCardinality-05
lola: time limit : 720 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00002-CTLCardinality-00: CTL true CTL model checker
FMS-PT-00002-CTLCardinality-02: SP ECTL false LTL model checker
FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00002-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00002-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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FMS-PT-00002-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 5/3600 0/5 FMS-PT-00002-CTLCardinality-07 17485152 t fired, 18 attempts, .
39 EF DL EXCL 5/720 1/32 FMS-PT-00002-CTLCardinality-05 33164589 m, 6632917 m/sec, 33164588 t fired, .
40 EF DL FNDP 5/3600 0/5 FMS-PT-00002-CTLCardinality-05 18076113 t fired, 19 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 10/3600 0/5 FMS-PT-00002-CTLCardinality-07 35103978 t fired, 36 attempts, .
39 EF DL EXCL 10/720 1/32 FMS-PT-00002-CTLCardinality-05 67229617 m, 6813005 m/sec, 67229616 t fired, .
40 EF DL FNDP 10/3600 0/5 FMS-PT-00002-CTLCardinality-05 36429948 t fired, 37 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 15/3600 0/5 FMS-PT-00002-CTLCardinality-07 52879151 t fired, 53 attempts, .
39 EF DL EXCL 15/720 1/32 FMS-PT-00002-CTLCardinality-05 101168534 m, 6787783 m/sec, 101168533 t fired, .
40 EF DL FNDP 15/3600 0/5 FMS-PT-00002-CTLCardinality-05 54619477 t fired, 55 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 20/3600 0/5 FMS-PT-00002-CTLCardinality-07 70720013 t fired, 71 attempts, .
39 EF DL EXCL 20/720 1/32 FMS-PT-00002-CTLCardinality-05 135287002 m, 6823693 m/sec, 135287001 t fired, .
40 EF DL FNDP 20/3600 0/5 FMS-PT-00002-CTLCardinality-05 72758655 t fired, 73 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00002-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00002-CTLCardinality-13: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 25/3600 0/5 FMS-PT-00002-CTLCardinality-07 88392387 t fired, 89 attempts, .
39 EF DL EXCL 25/720 1/32 FMS-PT-00002-CTLCardinality-05 169385883 m, 6819776 m/sec, 169385882 t fired, .
40 EF DL FNDP 25/3600 0/5 FMS-PT-00002-CTLCardinality-05 91118899 t fired, 92 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00002-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00002-CTLCardinality-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 30/3600 0/5 FMS-PT-00002-CTLCardinality-07 106252867 t fired, 107 attempts, .
39 EF DL EXCL 30/720 1/32 FMS-PT-00002-CTLCardinality-05 203502193 m, 6823262 m/sec, 203502192 t fired, .
40 EF DL FNDP 30/3600 0/5 FMS-PT-00002-CTLCardinality-05 109892617 t fired, 110 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00002-CTLCardinality-09: CTL true CTL model checker
FMS-PT-00002-CTLCardinality-13: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 35/3600 0/5 FMS-PT-00002-CTLCardinality-07 124103533 t fired, 125 attempts, .
39 EF DL EXCL 35/720 1/32 FMS-PT-00002-CTLCardinality-05 237578543 m, 6815270 m/sec, 237578543 t fired, .
40 EF DL FNDP 35/3600 0/5 FMS-PT-00002-CTLCardinality-05 128701998 t fired, 129 attempts, .
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37 EF DL FNDP 40/3600 0/5 FMS-PT-00002-CTLCardinality-07 142024127 t fired, 143 attempts, .
39 EF DL EXCL 40/720 1/32 FMS-PT-00002-CTLCardinality-05 271710157 m, 6826322 m/sec, 271710156 t fired, .
40 EF DL FNDP 40/3600 0/5 FMS-PT-00002-CTLCardinality-05 147488834 t fired, 148 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00002-CTLCardinality-09: CTL true CTL model checker
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37 EF DL FNDP 45/3600 0/5 FMS-PT-00002-CTLCardinality-07 159988594 t fired, 160 attempts, .
39 EF DL EXCL 45/720 1/32 FMS-PT-00002-CTLCardinality-05 305816696 m, 6821307 m/sec, 305816695 t fired, .
40 EF DL FNDP 45/3600 0/5 FMS-PT-00002-CTLCardinality-05 166225915 t fired, 167 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 EF DL FNDP 50/3600 0/5 FMS-PT-00002-CTLCardinality-07 177898886 t fired, 178 attempts, .
39 EF DL EXCL 50/720 1/32 FMS-PT-00002-CTLCardinality-05 339853505 m, 6807361 m/sec, 339853505 t fired, .
40 EF DL FNDP 50/3600 0/5 FMS-PT-00002-CTLCardinality-05 184988172 t fired, 185 attempts, .
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FMS-PT-00002-CTLCardinality-03: CTL false CTL model checker
FMS-PT-00002-CTLCardinality-09: CTL true CTL model checker
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37 EF DL FNDP 55/3600 0/5 FMS-PT-00002-CTLCardinality-07 195037265 t fired, 196 attempts, .
39 EF DL EXCL 55/720 1/32 FMS-PT-00002-CTLCardinality-05 356476664 m, 3324631 m/sec, 356476664 t fired, .
40 EF DL FNDP 55/3600 0/5 FMS-PT-00002-CTLCardinality-05 202971272 t fired, 203 attempts, .
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37 EF DL FNDP 60/3600 0/5 FMS-PT-00002-CTLCardinality-07 212379377 t fired, 213 attempts, .
39 EF DL EXCL 60/720 1/32 FMS-PT-00002-CTLCardinality-05 364740004 m, 1652668 m/sec, 364740003 t fired, .
40 EF DL FNDP 60/3600 0/5 FMS-PT-00002-CTLCardinality-05 220943642 t fired, 221 attempts, .
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37 EF DL FNDP 65/3600 0/5 FMS-PT-00002-CTLCardinality-07 229039328 t fired, 230 attempts, .
39 EF DL EXCL 65/720 1/32 FMS-PT-00002-CTLCardinality-05 377067327 m, 2465464 m/sec, 377067327 t fired, .
40 EF DL FNDP 65/3600 0/5 FMS-PT-00002-CTLCardinality-05 239718581 t fired, 240 attempts, .
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37 EF DL FNDP 70/3600 0/5 FMS-PT-00002-CTLCardinality-07 246178112 t fired, 247 attempts, .
39 EF DL EXCL 70/720 1/32 FMS-PT-00002-CTLCardinality-05 386223464 m, 1831227 m/sec, 386223463 t fired, .
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37 EF DL FNDP 75/3600 0/5 FMS-PT-00002-CTLCardinality-07 262782771 t fired, 263 attempts, .
39 EF DL EXCL 75/720 1/32 FMS-PT-00002-CTLCardinality-05 399095351 m, 2574377 m/sec, 399095351 t fired, .
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37 EF DL FNDP 80/3600 0/5 FMS-PT-00002-CTLCardinality-07 279381124 t fired, 280 attempts, .
39 EF DL EXCL 80/720 1/32 FMS-PT-00002-CTLCardinality-05 413555868 m, 2892103 m/sec, 413555867 t fired, .
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37 EF DL FNDP 85/3600 0/5 FMS-PT-00002-CTLCardinality-07 295549206 t fired, 296 attempts, .
39 EF DL EXCL 85/720 1/32 FMS-PT-00002-CTLCardinality-05 429642242 m, 3217274 m/sec, 429642241 t fired, .
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 464 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00002"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FMS-PT-00002, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852600185"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00002.tgz
mv FMS-PT-00002 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;