fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r167-tall-167838852500113
Last Updated
May 14, 2023

About the Execution of LoLa+red for Echo-PT-d05r03

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4123.844 2549314.00 2675006.00 6136.60 ?TT??F???TTTTT?T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852500113.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Echo-PT-d05r03, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852500113
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.8M
-rw-r--r-- 1 mcc users 6.0K Feb 25 14:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 25 14:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 14:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 14:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 25 14:12 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 173K Feb 25 14:12 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 25 14:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 25 14:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.3M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-00
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-01
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-02
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-03
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-04
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-05
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-06
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-07
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-08
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-09
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-10
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-11
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-12
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-13
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-14
FORMULA_NAME Echo-PT-d05r03-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678443064817

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d05r03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 10:11:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 10:11:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 10:11:06] [INFO ] Load time of PNML (sax parser for PT used): 238 ms
[2023-03-10 10:11:06] [INFO ] Transformed 3717 places.
[2023-03-10 10:11:06] [INFO ] Transformed 3222 transitions.
[2023-03-10 10:11:06] [INFO ] Found NUPN structural information;
[2023-03-10 10:11:06] [INFO ] Parsed PT model containing 3717 places and 3222 transitions and 28404 arcs in 341 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 10 ms.
Support contains 86 out of 3717 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3717/3717 places, 3222/3222 transitions.
Reduce places removed 240 places and 0 transitions.
Iterating post reduction 0 with 240 rules applied. Total rules applied 240 place count 3477 transition count 3222
Applied a total of 240 rules in 414 ms. Remains 3477 /3717 variables (removed 240) and now considering 3222/3222 (removed 0) transitions.
// Phase 1: matrix 3222 rows 3477 cols
[2023-03-10 10:11:19] [INFO ] Invariants computation overflowed in 12233 ms
[2023-03-10 10:11:22] [INFO ] Implicit Places using invariants in 15143 ms returned []
// Phase 1: matrix 3222 rows 3477 cols
[2023-03-10 10:11:34] [INFO ] Invariants computation overflowed in 12162 ms
[2023-03-10 10:11:35] [INFO ] Implicit Places using invariants and state equation in 12946 ms returned []
Implicit Place search using SMT with State Equation took 28119 ms to find 0 implicit places.
// Phase 1: matrix 3222 rows 3477 cols
[2023-03-10 10:11:47] [INFO ] Invariants computation overflowed in 12059 ms
[2023-03-10 10:11:48] [INFO ] Dead Transitions using invariants and state equation in 13798 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 3477/3717 places, 3222/3222 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42334 ms. Remains : 3477/3717 places, 3222/3222 transitions.
Support contains 86 out of 3477 places after structural reductions.
[2023-03-10 10:11:49] [INFO ] Flatten gal took : 427 ms
[2023-03-10 10:11:49] [INFO ] Flatten gal took : 244 ms
[2023-03-10 10:11:50] [INFO ] Input system was already deterministic with 3222 transitions.
Support contains 80 out of 3477 places (down from 86) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 20 resets, run finished after 663 ms. (steps per millisecond=15 ) properties (out of 53) seen :51
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 2) seen :1
Running SMT prover for 1 properties.
// Phase 1: matrix 3222 rows 3477 cols
[2023-03-10 10:12:03] [INFO ] Invariants computation overflowed in 12734 ms
[2023-03-10 10:12:28] [INFO ] After 25022ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 1 ms.
Support contains 1 out of 3477 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3453 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.19 ms
Discarding 24 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 0 with 10 rules applied. Total rules applied 11 place count 3453 transition count 3211
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 12 place count 3452 transition count 3210
Applied a total of 12 rules in 436 ms. Remains 3452 /3477 variables (removed 25) and now considering 3210/3222 (removed 12) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 437 ms. Remains : 3452/3477 places, 3210/3222 transitions.
Finished random walk after 2900 steps, including 6 resets, run visited all 1 properties in 123 ms. (steps per millisecond=23 )
[2023-03-10 10:12:29] [INFO ] Flatten gal took : 201 ms
[2023-03-10 10:12:29] [INFO ] Flatten gal took : 211 ms
[2023-03-10 10:12:30] [INFO ] Input system was already deterministic with 3222 transitions.
Computed a total of 3477 stabilizing places and 3222 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 3477 transition count 3222
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA Echo-PT-d05r03-CTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 3474 transition count 3222
Applied a total of 3 rules in 178 ms. Remains 3474 /3477 variables (removed 3) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 180 ms. Remains : 3474/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:30] [INFO ] Flatten gal took : 189 ms
[2023-03-10 10:12:30] [INFO ] Flatten gal took : 201 ms
[2023-03-10 10:12:31] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 3474 transition count 3222
Applied a total of 3 rules in 146 ms. Remains 3474 /3477 variables (removed 3) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 150 ms. Remains : 3474/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:31] [INFO ] Flatten gal took : 184 ms
[2023-03-10 10:12:31] [INFO ] Flatten gal took : 198 ms
[2023-03-10 10:12:32] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 3474 transition count 3222
Applied a total of 3 rules in 152 ms. Remains 3474 /3477 variables (removed 3) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 153 ms. Remains : 3474/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:32] [INFO ] Flatten gal took : 187 ms
[2023-03-10 10:12:32] [INFO ] Flatten gal took : 186 ms
[2023-03-10 10:12:33] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.27 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 301 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 303 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:33] [INFO ] Flatten gal took : 177 ms
[2023-03-10 10:12:33] [INFO ] Flatten gal took : 184 ms
[2023-03-10 10:12:34] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.10 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 179 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 179 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:34] [INFO ] Flatten gal took : 187 ms
[2023-03-10 10:12:34] [INFO ] Flatten gal took : 187 ms
[2023-03-10 10:12:35] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 3476 transition count 3222
Applied a total of 1 rules in 122 ms. Remains 3476 /3477 variables (removed 1) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 123 ms. Remains : 3476/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:35] [INFO ] Flatten gal took : 176 ms
[2023-03-10 10:12:35] [INFO ] Flatten gal took : 186 ms
[2023-03-10 10:12:36] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.9 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 167 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 168 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:36] [INFO ] Flatten gal took : 175 ms
[2023-03-10 10:12:36] [INFO ] Flatten gal took : 191 ms
[2023-03-10 10:12:36] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 3474 transition count 3222
Applied a total of 3 rules in 121 ms. Remains 3474 /3477 variables (removed 3) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 121 ms. Remains : 3474/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:37] [INFO ] Flatten gal took : 176 ms
[2023-03-10 10:12:37] [INFO ] Flatten gal took : 186 ms
[2023-03-10 10:12:37] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.8 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 159 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 160 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:38] [INFO ] Flatten gal took : 167 ms
[2023-03-10 10:12:38] [INFO ] Flatten gal took : 179 ms
[2023-03-10 10:12:38] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.6 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 155 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 156 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:39] [INFO ] Flatten gal took : 169 ms
[2023-03-10 10:12:39] [INFO ] Flatten gal took : 178 ms
[2023-03-10 10:12:39] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.6 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 155 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 155 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:40] [INFO ] Flatten gal took : 169 ms
[2023-03-10 10:12:40] [INFO ] Flatten gal took : 178 ms
[2023-03-10 10:12:40] [INFO ] Input system was already deterministic with 3220 transitions.
Finished random walk after 153 steps, including 0 resets, run visited all 1 properties in 10 ms. (steps per millisecond=15 )
FORMULA Echo-PT-d05r03-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.26 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 174 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 174 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:40] [INFO ] Flatten gal took : 171 ms
[2023-03-10 10:12:41] [INFO ] Flatten gal took : 181 ms
[2023-03-10 10:12:41] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Graph (complete) has 15849 edges and 3477 vertex of which 3463 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.6 ms
Discarding 14 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 186 ms. Remains 3462 /3477 variables (removed 15) and now considering 3220/3222 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 186 ms. Remains : 3462/3477 places, 3220/3222 transitions.
[2023-03-10 10:12:41] [INFO ] Flatten gal took : 186 ms
[2023-03-10 10:12:41] [INFO ] Flatten gal took : 201 ms
[2023-03-10 10:12:42] [INFO ] Input system was already deterministic with 3220 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 3474 transition count 3222
Applied a total of 3 rules in 118 ms. Remains 3474 /3477 variables (removed 3) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 118 ms. Remains : 3474/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:42] [INFO ] Flatten gal took : 176 ms
[2023-03-10 10:12:42] [INFO ] Flatten gal took : 187 ms
[2023-03-10 10:12:43] [INFO ] Input system was already deterministic with 3222 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3477/3477 places, 3222/3222 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 3475 transition count 3222
Applied a total of 2 rules in 118 ms. Remains 3475 /3477 variables (removed 2) and now considering 3222/3222 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 118 ms. Remains : 3475/3477 places, 3222/3222 transitions.
[2023-03-10 10:12:43] [INFO ] Flatten gal took : 171 ms
[2023-03-10 10:12:43] [INFO ] Flatten gal took : 181 ms
[2023-03-10 10:12:43] [INFO ] Input system was already deterministic with 3222 transitions.
[2023-03-10 10:12:44] [INFO ] Flatten gal took : 180 ms
[2023-03-10 10:12:44] [INFO ] Flatten gal took : 184 ms
[2023-03-10 10:12:44] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-10 10:12:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 3477 places, 3222 transitions and 26812 arcs took 29 ms.
Total runtime 98256 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Echo-PT-d05r03
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373

FORMULA Echo-PT-d05r03-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d05r03-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d05r03-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d05r03-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d05r03-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d05r03-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d05r03-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678445614131

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d05r03-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
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Echo-PT-d05r03-CTLCardinality-12: CTL 0 0 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-13: EFAG 0 0 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-15: CTL 0 0 0 0 1 0 0 0

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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 31 (type EXCL) for 30 Echo-PT-d05r03-CTLCardinality-12
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: FINISHED task # 31 (type EXCL) for Echo-PT-d05r03-CTLCardinality-12
lola: result : true
lola: markings : 486
lola: fired transitions : 972
lola: time used : 0.000000
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lola: rewrite Frontend/Parser/formula_rewrite.k:734
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lola: LAUNCH task # 42 (type EXCL) for 12 Echo-PT-d05r03-CTLCardinality-05
lola: time limit : 275 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:726
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: FINISHED task # 42 (type EXCL) for Echo-PT-d05r03-CTLCardinality-05
lola: result : true
lola: markings : 486
lola: fired transitions : 485
lola: time used : 0.000000
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lola: FINISHED task # 43 (type EXCL) for Echo-PT-d05r03-CTLCardinality-13
lola: result : false
lola: markings : 352
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lola: LAUNCH task # 19 (type EXCL) for 18 Echo-PT-d05r03-CTLCardinality-07
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search

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Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-15: CTL 0 0 0 0 1 0 0 0

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19 EG EXCL 1/325 1/32 Echo-PT-d05r03-CTLCardinality-07 5161 m, 1032 m/sec, 24737 t fired, .

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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search

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Echo-PT-d05r03-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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19 EG EXCL 6/325 1/32 Echo-PT-d05r03-CTLCardinality-07 62040 m, 11375 m/sec, 400372 t fired, .

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Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search

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19 EG EXCL 11/325 1/32 Echo-PT-d05r03-CTLCardinality-07 118844 m, 11360 m/sec, 799137 t fired, .

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Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search

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19 EG EXCL 16/325 1/32 Echo-PT-d05r03-CTLCardinality-07 175749 m, 11381 m/sec, 1196800 t fired, .

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Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search

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19 EG EXCL 21/325 2/32 Echo-PT-d05r03-CTLCardinality-07 231480 m, 11146 m/sec, 1592312 t fired, .

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19 EG EXCL 26/325 2/32 Echo-PT-d05r03-CTLCardinality-07 285623 m, 10828 m/sec, 1991947 t fired, .

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Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search

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19 EG EXCL 31/325 2/32 Echo-PT-d05r03-CTLCardinality-07 336062 m, 10087 m/sec, 2393207 t fired, .

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19 EG EXCL 36/325 2/32 Echo-PT-d05r03-CTLCardinality-07 385500 m, 9887 m/sec, 2792515 t fired, .

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37 CTL EXCL 190/390 26/32 Echo-PT-d05r03-CTLCardinality-14 4484922 m, 22447 m/sec, 18748227 t fired, .

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37 CTL EXCL 195/390 27/32 Echo-PT-d05r03-CTLCardinality-14 4595800 m, 22175 m/sec, 19240230 t fired, .

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37 CTL EXCL 200/390 27/32 Echo-PT-d05r03-CTLCardinality-14 4708440 m, 22528 m/sec, 19732045 t fired, .

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37 CTL EXCL 205/390 28/32 Echo-PT-d05r03-CTLCardinality-14 4816197 m, 21551 m/sec, 20220168 t fired, .

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37 CTL EXCL 210/390 28/32 Echo-PT-d05r03-CTLCardinality-14 4915836 m, 19927 m/sec, 20712485 t fired, .

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22 CTL EXCL 110/407 11/32 Echo-PT-d05r03-CTLCardinality-08 1926711 m, 18164 m/sec, 9860265 t fired, .

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16 CTL EXCL 410/416 29/32 Echo-PT-d05r03-CTLCardinality-06 5111148 m, 11184 m/sec, 40016683 t fired, .

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Echo-PT-d05r03-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-07: EG 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 565/1742 31/32 Echo-PT-d05r03-CTLCardinality-04 5589884 m, 9049 m/sec, 55316724 t fired, .

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Echo-PT-d05r03-CTLCardinality-02: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-09: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-10: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search
Echo-PT-d05r03-CTLCardinality-15: CTL true CTL model checker

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Echo-PT-d05r03-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-07: EG 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 570/1742 32/32 Echo-PT-d05r03-CTLCardinality-04 5634300 m, 8883 m/sec, 55803201 t fired, .

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Echo-PT-d05r03-CTLCardinality-02: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-09: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-10: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search
Echo-PT-d05r03-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Echo-PT-d05r03-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-07: EG 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 575/1742 32/32 Echo-PT-d05r03-CTLCardinality-04 5679615 m, 9063 m/sec, 56289588 t fired, .

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Echo-PT-d05r03-CTLCardinality-02: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-09: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-10: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search
Echo-PT-d05r03-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Echo-PT-d05r03-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-07: EG 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

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10 CTL EXCL 580/1742 32/32 Echo-PT-d05r03-CTLCardinality-04 5724546 m, 8986 m/sec, 56779529 t fired, .

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Echo-PT-d05r03-CTLCardinality-02: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-09: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-10: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search
Echo-PT-d05r03-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d05r03-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
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Echo-PT-d05r03-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
Echo-PT-d05r03-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-07: EG 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 585/1742 32/32 Echo-PT-d05r03-CTLCardinality-04 5770175 m, 9125 m/sec, 57269892 t fired, .

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Echo-PT-d05r03-CTLCardinality-02: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-09: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-10: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search
Echo-PT-d05r03-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d05r03-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
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Echo-PT-d05r03-CTLCardinality-04: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-07: EG 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
Echo-PT-d05r03-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d05r03-CTLCardinality-00: CTL unknown AGGR
Echo-PT-d05r03-CTLCardinality-02: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-03: CTL unknown AGGR
Echo-PT-d05r03-CTLCardinality-04: CTL unknown AGGR
Echo-PT-d05r03-CTLCardinality-05: AGAF false state space /EFEG
Echo-PT-d05r03-CTLCardinality-06: CTL unknown AGGR
Echo-PT-d05r03-CTLCardinality-07: EG unknown AGGR
Echo-PT-d05r03-CTLCardinality-08: CTL unknown AGGR
Echo-PT-d05r03-CTLCardinality-09: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-10: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-12: CTL true CTL model checker
Echo-PT-d05r03-CTLCardinality-13: EFAG true tscc_search
Echo-PT-d05r03-CTLCardinality-14: CTL unknown AGGR
Echo-PT-d05r03-CTLCardinality-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d05r03"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Echo-PT-d05r03, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852500113"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d05r03.tgz
mv Echo-PT-d05r03 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;