Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852500098.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Echo-PT-d03r07, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852500098
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.7M
-rw-r--r-- 1 mcc users 9.4K Feb 25 14:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 106K Feb 25 14:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 14:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 14:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 14:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 25 14:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.2M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d03r07-CTLFireability-00
FORMULA_NAME Echo-PT-d03r07-CTLFireability-01
FORMULA_NAME Echo-PT-d03r07-CTLFireability-02
FORMULA_NAME Echo-PT-d03r07-CTLFireability-03
FORMULA_NAME Echo-PT-d03r07-CTLFireability-04
FORMULA_NAME Echo-PT-d03r07-CTLFireability-05
FORMULA_NAME Echo-PT-d03r07-CTLFireability-06
FORMULA_NAME Echo-PT-d03r07-CTLFireability-07
FORMULA_NAME Echo-PT-d03r07-CTLFireability-08
FORMULA_NAME Echo-PT-d03r07-CTLFireability-09
FORMULA_NAME Echo-PT-d03r07-CTLFireability-10
FORMULA_NAME Echo-PT-d03r07-CTLFireability-11
FORMULA_NAME Echo-PT-d03r07-CTLFireability-12
FORMULA_NAME Echo-PT-d03r07-CTLFireability-13
FORMULA_NAME Echo-PT-d03r07-CTLFireability-14
FORMULA_NAME Echo-PT-d03r07-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678440056077

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d03r07
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 09:20:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 09:20:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 09:20:57] [INFO ] Load time of PNML (sax parser for PT used): 230 ms
[2023-03-10 09:20:57] [INFO ] Transformed 4209 places.
[2023-03-10 09:20:58] [INFO ] Transformed 3518 transitions.
[2023-03-10 09:20:58] [INFO ] Found NUPN structural information;
[2023-03-10 09:20:58] [INFO ] Parsed PT model containing 4209 places and 3518 transitions and 25540 arcs in 521 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 349 out of 4209 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4209/4209 places, 3518/3518 transitions.
Reduce places removed 343 places and 0 transitions.
Iterating post reduction 0 with 343 rules applied. Total rules applied 343 place count 3866 transition count 3518
Applied a total of 343 rules in 391 ms. Remains 3866 /4209 variables (removed 343) and now considering 3518/3518 (removed 0) transitions.
// Phase 1: matrix 3518 rows 3866 cols
[2023-03-10 09:21:05] [INFO ] Invariants computation overflowed in 7123 ms
[2023-03-10 09:21:06] [INFO ] Implicit Places using invariants in 7769 ms returned []
// Phase 1: matrix 3518 rows 3866 cols
[2023-03-10 09:21:12] [INFO ] Invariants computation overflowed in 6515 ms
[2023-03-10 09:21:13] [INFO ] Implicit Places using invariants and state equation in 7362 ms returned []
Implicit Place search using SMT with State Equation took 15156 ms to find 0 implicit places.
// Phase 1: matrix 3518 rows 3866 cols
[2023-03-10 09:21:20] [INFO ] Invariants computation overflowed in 6403 ms
[2023-03-10 09:21:22] [INFO ] Dead Transitions using invariants and state equation in 8601 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 3866/4209 places, 3518/3518 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24153 ms. Remains : 3866/4209 places, 3518/3518 transitions.
Support contains 349 out of 3866 places after structural reductions.
[2023-03-10 09:21:22] [INFO ] Flatten gal took : 354 ms
[2023-03-10 09:21:23] [INFO ] Flatten gal took : 233 ms
[2023-03-10 09:21:23] [INFO ] Input system was already deterministic with 3518 transitions.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 739 ms. (steps per millisecond=13 ) properties (out of 76) seen :62
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 14) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 12) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 3518 rows 3866 cols
[2023-03-10 09:21:32] [INFO ] Invariants computation overflowed in 7087 ms
[2023-03-10 09:21:57] [INFO ] After 23242ms SMT Verify possible using state equation in real domain returned unsat :0 sat :9 real:1
[2023-03-10 09:21:57] [INFO ] After 23264ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :9 real:1
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-10 09:21:57] [INFO ] After 25042ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :9 real:1
[2023-03-10 09:22:22] [INFO ] After 23423ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2023-03-10 09:22:22] [INFO ] After 23427ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :10
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-03-10 09:22:22] [INFO ] After 25053ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :10
Fused 11 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 92 ms.
Support contains 86 out of 3866 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3853 are kept as prefixes of interest. Removing 13 places using SCC suffix rule.15 ms
Discarding 13 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 7 place count 3853 transition count 3511
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 8 place count 3852 transition count 3510
Applied a total of 8 rules in 483 ms. Remains 3852 /3866 variables (removed 14) and now considering 3510/3518 (removed 8) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 484 ms. Remains : 3852/3866 places, 3510/3518 transitions.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 668 ms. (steps per millisecond=14 ) properties (out of 11) seen :4
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 111 ms. (steps per millisecond=90 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 3510 rows 3852 cols
[2023-03-10 09:22:30] [INFO ] Invariants computation overflowed in 6288 ms
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:631)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-10 09:22:55] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-10 09:22:55] [INFO ] After 25032ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 6 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 61 out of 3852 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3852/3852 places, 3510/3510 transitions.
Applied a total of 0 rules in 199 ms. Remains 3852 /3852 variables (removed 0) and now considering 3510/3510 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 200 ms. Remains : 3852/3852 places, 3510/3510 transitions.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 564 ms. (steps per millisecond=17 ) properties (out of 6) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 3510 rows 3852 cols
[2023-03-10 09:23:03] [INFO ] Invariants computation overflowed in 6238 ms
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:631)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-10 09:23:28] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-10 09:23:28] [INFO ] After 25045ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 4 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 50 out of 3852 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3852/3852 places, 3510/3510 transitions.
Applied a total of 0 rules in 206 ms. Remains 3852 /3852 variables (removed 0) and now considering 3510/3510 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 206 ms. Remains : 3852/3852 places, 3510/3510 transitions.
[2023-03-10 09:23:28] [INFO ] Flatten gal took : 206 ms
[2023-03-10 09:23:28] [INFO ] Flatten gal took : 187 ms
[2023-03-10 09:23:29] [INFO ] Input system was already deterministic with 3518 transitions.
Computed a total of 3866 stabilizing places and 3518 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 3866 transition count 3518
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 4 formulas.
FORMULA Echo-PT-d03r07-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 160 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 163 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:29] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:23:29] [INFO ] Flatten gal took : 170 ms
[2023-03-10 09:23:30] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.18 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 306 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 309 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:30] [INFO ] Flatten gal took : 152 ms
[2023-03-10 09:23:30] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:23:31] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.10 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 206 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 207 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:31] [INFO ] Flatten gal took : 152 ms
[2023-03-10 09:23:31] [INFO ] Flatten gal took : 162 ms
[2023-03-10 09:23:32] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 159 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 160 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:32] [INFO ] Flatten gal took : 157 ms
[2023-03-10 09:23:32] [INFO ] Flatten gal took : 169 ms
[2023-03-10 09:23:32] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.8 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 222 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 224 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:33] [INFO ] Flatten gal took : 150 ms
[2023-03-10 09:23:33] [INFO ] Flatten gal took : 166 ms
[2023-03-10 09:23:33] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 157 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 157 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:34] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:23:34] [INFO ] Flatten gal took : 183 ms
[2023-03-10 09:23:34] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.8 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 199 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 200 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:35] [INFO ] Flatten gal took : 157 ms
[2023-03-10 09:23:35] [INFO ] Flatten gal took : 163 ms
[2023-03-10 09:23:35] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 152 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 153 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:36] [INFO ] Flatten gal took : 153 ms
[2023-03-10 09:23:36] [INFO ] Flatten gal took : 162 ms
[2023-03-10 09:23:36] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.6 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 197 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 198 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:36] [INFO ] Flatten gal took : 154 ms
[2023-03-10 09:23:37] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:23:37] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.5 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 194 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 195 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:37] [INFO ] Flatten gal took : 148 ms
[2023-03-10 09:23:38] [INFO ] Flatten gal took : 158 ms
[2023-03-10 09:23:38] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 156 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 156 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:38] [INFO ] Flatten gal took : 150 ms
[2023-03-10 09:23:38] [INFO ] Flatten gal took : 161 ms
[2023-03-10 09:23:39] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 154 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 154 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:39] [INFO ] Flatten gal took : 145 ms
[2023-03-10 09:23:39] [INFO ] Flatten gal took : 159 ms
[2023-03-10 09:23:40] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 151 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 151 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:40] [INFO ] Flatten gal took : 143 ms
[2023-03-10 09:23:40] [INFO ] Flatten gal took : 155 ms
[2023-03-10 09:23:40] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Graph (complete) has 14527 edges and 3866 vertex of which 3859 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.5 ms
Discarding 7 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 187 ms. Remains 3858 /3866 variables (removed 8) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 190 ms. Remains : 3858/3866 places, 3516/3518 transitions.
[2023-03-10 09:23:41] [INFO ] Flatten gal took : 142 ms
[2023-03-10 09:23:41] [INFO ] Flatten gal took : 156 ms
[2023-03-10 09:23:41] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3866/3866 places, 3518/3518 transitions.
Applied a total of 0 rules in 169 ms. Remains 3866 /3866 variables (removed 0) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 169 ms. Remains : 3866/3866 places, 3518/3518 transitions.
[2023-03-10 09:23:42] [INFO ] Flatten gal took : 141 ms
[2023-03-10 09:23:42] [INFO ] Flatten gal took : 154 ms
[2023-03-10 09:23:42] [INFO ] Input system was already deterministic with 3518 transitions.
[2023-03-10 09:23:42] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:23:42] [INFO ] Flatten gal took : 164 ms
[2023-03-10 09:23:43] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-10 09:23:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 3866 places, 3518 transitions and 23781 arcs took 24 ms.
Total runtime 165555 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Echo-PT-d03r07
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Echo-PT-d03r07-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d03r07-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 11705452 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16100548 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type CNST) for 42 Echo-PT-d03r07-CTLFireability-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 43 (type CNST) for Echo-PT-d03r07-CTLFireability-15
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d03r07-CTLFireability-15: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d03r07-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-02: EG 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-03: AXAG 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-04: EG 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-09: EFAG 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-14: EG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 45 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
lola: LAUNCH task # 40 (type EXCL) for 39 Echo-PT-d03r07-CTLFireability-14
lola: time limit : 253 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 40 (type EXCL) for Echo-PT-d03r07-CTLFireability-14
lola: result : true
lola: markings : 686
lola: fired transitions : 685
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 37 (type EXCL) for 36 Echo-PT-d03r07-CTLFireability-13
lola: time limit : 273 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 37 (type EXCL) for Echo-PT-d03r07-CTLFireability-13
lola: result : false
lola: markings : 687
lola: fired transitions : 1248
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 34 (type EXCL) for 33 Echo-PT-d03r07-CTLFireability-12
lola: time limit : 296 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:788
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d03r07-CTLFireability-13: CTL false CTL model checker
Echo-PT-d03r07-CTLFireability-14: EG true state space / EG
Echo-PT-d03r07-CTLFireability-15: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d03r07-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-02: EG 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-03: AXAG 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-04: EG 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-09: EFAG 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Echo-PT-d03r07-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 3/296 1/32 Echo-PT-d03r07-CTLFireability-12 48061 m, 9612 m/sec, 223472 t fired, .

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34 CTL EXCL 78/296 9/32 Echo-PT-d03r07-CTLFireability-12 1082296 m, 13266 m/sec, 6554458 t fired, .

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31 CTL EXCL 120/321 11/32 Echo-PT-d03r07-CTLFireability-11 1437620 m, 11584 m/sec, 10210369 t fired, .

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Echo-PT-d03r07-CTLFireability-09: EFAG true tscc_search
Echo-PT-d03r07-CTLFireability-13: CTL false CTL model checker
Echo-PT-d03r07-CTLFireability-14: EG true state space / EG
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Echo-PT-d03r07-CTLFireability-13: CTL false CTL model checker
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