About the Execution of LoLa+red for Echo-PT-d03r07
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
4638.575 | 2801454.00 | 2935120.00 | 6894.00 | ?FT?F??F?F??TF?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852500097.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Echo-PT-d03r07, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852500097
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.7M
-rw-r--r-- 1 mcc users 9.4K Feb 25 14:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 106K Feb 25 14:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 14:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 14:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 14:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 25 14:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.2M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-00
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-01
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-02
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-03
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-04
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-05
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-06
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-07
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-08
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-09
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-10
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-11
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-12
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-13
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-14
FORMULA_NAME Echo-PT-d03r07-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678439972131
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d03r07
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 09:19:33] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 09:19:33] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 09:19:34] [INFO ] Load time of PNML (sax parser for PT used): 353 ms
[2023-03-10 09:19:34] [INFO ] Transformed 4209 places.
[2023-03-10 09:19:34] [INFO ] Transformed 3518 transitions.
[2023-03-10 09:19:34] [INFO ] Found NUPN structural information;
[2023-03-10 09:19:34] [INFO ] Parsed PT model containing 4209 places and 3518 transitions and 25540 arcs in 491 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 25 ms.
FORMULA Echo-PT-d03r07-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Echo-PT-d03r07-CTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 178 out of 4209 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4209/4209 places, 3518/3518 transitions.
Reduce places removed 327 places and 0 transitions.
Iterating post reduction 0 with 327 rules applied. Total rules applied 327 place count 3882 transition count 3518
Applied a total of 327 rules in 461 ms. Remains 3882 /4209 variables (removed 327) and now considering 3518/3518 (removed 0) transitions.
// Phase 1: matrix 3518 rows 3882 cols
[2023-03-10 09:19:42] [INFO ] Invariants computation overflowed in 7873 ms
[2023-03-10 09:19:43] [INFO ] Implicit Places using invariants in 8511 ms returned []
// Phase 1: matrix 3518 rows 3882 cols
[2023-03-10 09:19:50] [INFO ] Invariants computation overflowed in 7627 ms
[2023-03-10 09:19:51] [INFO ] Implicit Places using invariants and state equation in 8600 ms returned []
Implicit Place search using SMT with State Equation took 17141 ms to find 0 implicit places.
// Phase 1: matrix 3518 rows 3882 cols
[2023-03-10 09:19:59] [INFO ] Invariants computation overflowed in 7450 ms
[2023-03-10 09:20:01] [INFO ] Dead Transitions using invariants and state equation in 9767 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 3882/4209 places, 3518/3518 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27376 ms. Remains : 3882/4209 places, 3518/3518 transitions.
Support contains 178 out of 3882 places after structural reductions.
[2023-03-10 09:20:02] [INFO ] Flatten gal took : 376 ms
[2023-03-10 09:20:02] [INFO ] Flatten gal took : 231 ms
[2023-03-10 09:20:02] [INFO ] Input system was already deterministic with 3518 transitions.
Support contains 171 out of 3882 places (down from 178) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 687 ms. (steps per millisecond=14 ) properties (out of 94) seen :90
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 102 ms. (steps per millisecond=98 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 3518 rows 3882 cols
[2023-03-10 09:20:11] [INFO ] Invariants computation overflowed in 7759 ms
[2023-03-10 09:20:36] [INFO ] After 23971ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 09:20:36] [INFO ] After 23979ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1 ms.
[2023-03-10 09:20:36] [INFO ] After 25037ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Fused 4 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 7 out of 3882 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Graph (complete) has 14699 edges and 3882 vertex of which 3853 are kept as prefixes of interest. Removing 29 places using SCC suffix rule.16 ms
Discarding 29 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 7 place count 3853 transition count 3511
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 8 place count 3852 transition count 3510
Applied a total of 8 rules in 514 ms. Remains 3852 /3882 variables (removed 30) and now considering 3510/3518 (removed 8) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 517 ms. Remains : 3852/3882 places, 3510/3518 transitions.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 523 ms. (steps per millisecond=19 ) properties (out of 4) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 108 ms. (steps per millisecond=92 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 3510 rows 3852 cols
[2023-03-10 09:20:44] [INFO ] Invariants computation overflowed in 6223 ms
[2023-03-10 09:21:09] [INFO ] After 24252ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 09:21:09] [INFO ] After 24267ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-10 09:21:09] [INFO ] After 25042ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 3 out of 3852 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3852/3852 places, 3510/3510 transitions.
Applied a total of 0 rules in 180 ms. Remains 3852 /3852 variables (removed 0) and now considering 3510/3510 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 181 ms. Remains : 3852/3852 places, 3510/3510 transitions.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 423 ms. (steps per millisecond=23 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 3510 rows 3852 cols
[2023-03-10 09:21:16] [INFO ] Invariants computation overflowed in 6383 ms
[2023-03-10 09:21:19] [INFO ] After 1994ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 09:21:19] [INFO ] After 2216ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 127 ms.
[2023-03-10 09:21:19] [INFO ] After 3002ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 1 out of 3852 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3852/3852 places, 3510/3510 transitions.
Applied a total of 0 rules in 176 ms. Remains 3852 /3852 variables (removed 0) and now considering 3510/3510 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 176 ms. Remains : 3852/3852 places, 3510/3510 transitions.
Finished random walk after 8427 steps, including 12 resets, run visited all 1 properties in 301 ms. (steps per millisecond=27 )
[2023-03-10 09:21:20] [INFO ] Flatten gal took : 174 ms
[2023-03-10 09:21:20] [INFO ] Flatten gal took : 186 ms
[2023-03-10 09:21:20] [INFO ] Input system was already deterministic with 3518 transitions.
Computed a total of 3882 stabilizing places and 3518 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 3882 transition count 3518
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 4 formulas.
FORMULA Echo-PT-d03r07-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Graph (complete) has 14699 edges and 3882 vertex of which 3860 are kept as prefixes of interest. Removing 22 places using SCC suffix rule.18 ms
Discarding 22 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 317 ms. Remains 3859 /3882 variables (removed 23) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 318 ms. Remains : 3859/3882 places, 3516/3518 transitions.
[2023-03-10 09:21:21] [INFO ] Flatten gal took : 155 ms
[2023-03-10 09:21:21] [INFO ] Flatten gal took : 168 ms
[2023-03-10 09:21:21] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 3867 transition count 3518
Applied a total of 15 rules in 172 ms. Remains 3867 /3882 variables (removed 15) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 173 ms. Remains : 3867/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:22] [INFO ] Flatten gal took : 173 ms
[2023-03-10 09:21:22] [INFO ] Flatten gal took : 186 ms
[2023-03-10 09:21:22] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 3866 transition count 3518
Applied a total of 16 rules in 173 ms. Remains 3866 /3882 variables (removed 16) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 174 ms. Remains : 3866/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:23] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:21:23] [INFO ] Flatten gal took : 178 ms
[2023-03-10 09:21:23] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 3867 transition count 3518
Applied a total of 15 rules in 176 ms. Remains 3867 /3882 variables (removed 15) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 176 ms. Remains : 3867/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:24] [INFO ] Flatten gal took : 166 ms
[2023-03-10 09:21:24] [INFO ] Flatten gal took : 178 ms
[2023-03-10 09:21:24] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Graph (complete) has 14699 edges and 3882 vertex of which 3859 are kept as prefixes of interest. Removing 23 places using SCC suffix rule.11 ms
Discarding 23 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 221 ms. Remains 3858 /3882 variables (removed 24) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 224 ms. Remains : 3858/3882 places, 3516/3518 transitions.
[2023-03-10 09:21:25] [INFO ] Flatten gal took : 152 ms
[2023-03-10 09:21:25] [INFO ] Flatten gal took : 183 ms
[2023-03-10 09:21:25] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 3866 transition count 3518
Applied a total of 16 rules in 168 ms. Remains 3866 /3882 variables (removed 16) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 168 ms. Remains : 3866/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:25] [INFO ] Flatten gal took : 191 ms
[2023-03-10 09:21:26] [INFO ] Flatten gal took : 187 ms
[2023-03-10 09:21:26] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Graph (complete) has 14699 edges and 3882 vertex of which 3862 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.8 ms
Discarding 20 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 216 ms. Remains 3861 /3882 variables (removed 21) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 218 ms. Remains : 3861/3882 places, 3516/3518 transitions.
[2023-03-10 09:21:26] [INFO ] Flatten gal took : 169 ms
[2023-03-10 09:21:27] [INFO ] Flatten gal took : 177 ms
[2023-03-10 09:21:27] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 3870 transition count 3518
Applied a total of 12 rules in 174 ms. Remains 3870 /3882 variables (removed 12) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 174 ms. Remains : 3870/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:27] [INFO ] Flatten gal took : 158 ms
[2023-03-10 09:21:27] [INFO ] Flatten gal took : 174 ms
[2023-03-10 09:21:28] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Graph (complete) has 14699 edges and 3882 vertex of which 3860 are kept as prefixes of interest. Removing 22 places using SCC suffix rule.6 ms
Discarding 22 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 187 ms. Remains 3859 /3882 variables (removed 23) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 187 ms. Remains : 3859/3882 places, 3516/3518 transitions.
[2023-03-10 09:21:28] [INFO ] Flatten gal took : 161 ms
[2023-03-10 09:21:28] [INFO ] Flatten gal took : 179 ms
[2023-03-10 09:21:29] [INFO ] Input system was already deterministic with 3516 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Graph (complete) has 14699 edges and 3882 vertex of which 3862 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.6 ms
Discarding 20 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 187 ms. Remains 3861 /3882 variables (removed 21) and now considering 3516/3518 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 187 ms. Remains : 3861/3882 places, 3516/3518 transitions.
[2023-03-10 09:21:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 09:21:29] [INFO ] Flatten gal took : 153 ms
FORMULA Echo-PT-d03r07-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 09:21:29] [INFO ] Flatten gal took : 173 ms
[2023-03-10 09:21:30] [INFO ] Input system was already deterministic with 3516 transitions.
Support contains 0 out of 3861 places (down from 12) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 3866 transition count 3518
Applied a total of 16 rules in 171 ms. Remains 3866 /3882 variables (removed 16) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 172 ms. Remains : 3866/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:30] [INFO ] Flatten gal took : 168 ms
[2023-03-10 09:21:30] [INFO ] Flatten gal took : 180 ms
[2023-03-10 09:21:31] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 3866 transition count 3518
Applied a total of 16 rules in 192 ms. Remains 3866 /3882 variables (removed 16) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 193 ms. Remains : 3866/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:31] [INFO ] Flatten gal took : 147 ms
[2023-03-10 09:21:31] [INFO ] Flatten gal took : 160 ms
[2023-03-10 09:21:31] [INFO ] Input system was already deterministic with 3518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 3882/3882 places, 3518/3518 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 3866 transition count 3518
Applied a total of 16 rules in 150 ms. Remains 3866 /3882 variables (removed 16) and now considering 3518/3518 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 151 ms. Remains : 3866/3882 places, 3518/3518 transitions.
[2023-03-10 09:21:32] [INFO ] Flatten gal took : 166 ms
[2023-03-10 09:21:32] [INFO ] Flatten gal took : 178 ms
[2023-03-10 09:21:32] [INFO ] Input system was already deterministic with 3518 transitions.
[2023-03-10 09:21:33] [INFO ] Flatten gal took : 172 ms
[2023-03-10 09:21:33] [INFO ] Flatten gal took : 168 ms
[2023-03-10 09:21:33] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-10 09:21:33] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 3882 places, 3518 transitions and 23867 arcs took 25 ms.
Total runtime 119734 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Echo-PT-d03r07
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
FORMULA Echo-PT-d03r07-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Echo-PT-d03r07-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Echo-PT-d03r07-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678442773585
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
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lola: Rule S: 0 transitions removed,0 places removed
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Echo-PT-d03r07-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLCardinality-07: DISJ 0 0 0 0 2 0 0 0
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Echo-PT-d03r07-CTLCardinality-10: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLCardinality-11: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLCardinality-13: CONJ 0 0 0 0 2 0 0 0
Echo-PT-d03r07-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0
Echo-PT-d03r07-CTLCardinality-15: CTL 0 0 0 0 1 0 0 0
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 20 (type EXCL) for 15 Echo-PT-d03r07-CTLCardinality-07
lola: time limit : 254 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for Echo-PT-d03r07-CTLCardinality-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 Echo-PT-d03r07-CTLCardinality-06
lola: time limit : 274 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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Echo-PT-d03r07-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
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Echo-PT-d03r07-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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13 CTL EXCL 2/274 1/32 Echo-PT-d03r07-CTLCardinality-06 41029 m, 8205 m/sec, 189116 t fired, .
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13 CTL EXCL 7/274 2/32 Echo-PT-d03r07-CTLCardinality-06 120521 m, 15898 m/sec, 602267 t fired, .
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Echo-PT-d03r07-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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13 CTL EXCL 12/274 2/32 Echo-PT-d03r07-CTLCardinality-06 194925 m, 14880 m/sec, 1014383 t fired, .
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13 CTL EXCL 17/274 3/32 Echo-PT-d03r07-CTLCardinality-06 262696 m, 13554 m/sec, 1431881 t fired, .
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13 CTL EXCL 27/274 4/32 Echo-PT-d03r07-CTLCardinality-06 396071 m, 13588 m/sec, 2264674 t fired, .
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13 CTL EXCL 4/3288 1/5 Echo-PT-d03r07-CTLCardinality-06 80708 m, -691427 m/sec, 395339 t fired, .
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13 CTL EXCL 9/3288 2/5 Echo-PT-d03r07-CTLCardinality-06 157246 m, 15307 m/sec, 805958 t fired, .
42 CTL EXCL 10/252 2/32 Echo-PT-d03r07-CTLCardinality-15 156985 m, 15360 m/sec, 805328 t fired, .
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13 CTL EXCL 14/3288 2/5 Echo-PT-d03r07-CTLCardinality-06 228943 m, 14339 m/sec, 1217980 t fired, .
42 CTL EXCL 15/252 2/32 Echo-PT-d03r07-CTLCardinality-15 229623 m, 14527 m/sec, 1222516 t fired, .
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13 CTL EXCL 20/3288 3/5 Echo-PT-d03r07-CTLCardinality-06 294663 m, 13144 m/sec, 1627822 t fired, .
42 CTL EXCL 21/252 3/32 Echo-PT-d03r07-CTLCardinality-15 296194 m, 13314 m/sec, 1638751 t fired, .
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13 CTL EXCL 25/3288 3/5 Echo-PT-d03r07-CTLCardinality-06 356307 m, 12328 m/sec, 2036811 t fired, .
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13 CTL EXCL 30/3288 4/5 Echo-PT-d03r07-CTLCardinality-06 425732 m, 13885 m/sec, 2447428 t fired, .
42 CTL EXCL 31/252 4/32 Echo-PT-d03r07-CTLCardinality-15 429988 m, 14061 m/sec, 2473636 t fired, .
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13 CTL EXCL 35/3288 5/5 Echo-PT-d03r07-CTLCardinality-06 490960 m, 13045 m/sec, 2856765 t fired, .
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13 CTL EXCL 40/3288 5/5 Echo-PT-d03r07-CTLCardinality-06 556405 m, 13089 m/sec, 3266424 t fired, .
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42 CTL EXCL 46/252 6/32 Echo-PT-d03r07-CTLCardinality-15 629651 m, 13235 m/sec, 3720775 t fired, .
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42 CTL EXCL 51/274 6/32 Echo-PT-d03r07-CTLCardinality-15 694529 m, 12975 m/sec, 4138589 t fired, .
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42 CTL EXCL 56/274 7/32 Echo-PT-d03r07-CTLCardinality-15 763413 m, 13776 m/sec, 4555477 t fired, .
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42 CTL EXCL 61/274 7/32 Echo-PT-d03r07-CTLCardinality-15 830431 m, 13403 m/sec, 4975017 t fired, .
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42 CTL EXCL 66/274 8/32 Echo-PT-d03r07-CTLCardinality-15 894622 m, 12838 m/sec, 5392424 t fired, .
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42 CTL EXCL 71/274 9/32 Echo-PT-d03r07-CTLCardinality-15 964265 m, 13928 m/sec, 5810635 t fired, .
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42 CTL EXCL 76/274 9/32 Echo-PT-d03r07-CTLCardinality-15 1030530 m, 13253 m/sec, 6230543 t fired, .
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42 CTL EXCL 81/274 10/32 Echo-PT-d03r07-CTLCardinality-15 1098587 m, 13611 m/sec, 6649070 t fired, .
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42 CTL EXCL 91/274 10/32 Echo-PT-d03r07-CTLCardinality-15 1231586 m, 13192 m/sec, 7492580 t fired, .
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42 CTL EXCL 96/274 11/32 Echo-PT-d03r07-CTLCardinality-15 1300904 m, 13863 m/sec, 7913617 t fired, .
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42 CTL EXCL 111/274 13/32 Echo-PT-d03r07-CTLCardinality-15 1503464 m, 13756 m/sec, 9179811 t fired, .
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42 CTL EXCL 116/274 13/32 Echo-PT-d03r07-CTLCardinality-15 1570065 m, 13320 m/sec, 9604374 t fired, .
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42 CTL EXCL 121/274 14/32 Echo-PT-d03r07-CTLCardinality-15 1639218 m, 13830 m/sec, 10027574 t fired, .
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42 CTL EXCL 126/274 14/32 Echo-PT-d03r07-CTLCardinality-15 1707756 m, 13707 m/sec, 10453751 t fired, .
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42 CTL EXCL 131/274 15/32 Echo-PT-d03r07-CTLCardinality-15 1772599 m, 12968 m/sec, 10877704 t fired, .
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42 CTL EXCL 136/274 15/32 Echo-PT-d03r07-CTLCardinality-15 1843571 m, 14194 m/sec, 11301584 t fired, .
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42 CTL EXCL 241/274 26/32 Echo-PT-d03r07-CTLCardinality-15 3173385 m, 11679 m/sec, 20118356 t fired, .
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42 CTL EXCL 246/274 27/32 Echo-PT-d03r07-CTLCardinality-15 3228739 m, 11070 m/sec, 20537330 t fired, .
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42 CTL EXCL 251/274 27/32 Echo-PT-d03r07-CTLCardinality-15 3289240 m, 12100 m/sec, 20956108 t fired, .
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42 CTL EXCL 256/274 28/32 Echo-PT-d03r07-CTLCardinality-15 3346586 m, 11469 m/sec, 21375075 t fired, .
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42 CTL EXCL 261/274 28/32 Echo-PT-d03r07-CTLCardinality-15 3406054 m, 11893 m/sec, 21794366 t fired, .
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42 CTL EXCL 266/274 28/32 Echo-PT-d03r07-CTLCardinality-15 3464145 m, 11618 m/sec, 22215826 t fired, .
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42 CTL EXCL 271/274 29/32 Echo-PT-d03r07-CTLCardinality-15 3519744 m, 11119 m/sec, 22634138 t fired, .
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39 CTL EXCL 5/273 1/32 Echo-PT-d03r07-CTLCardinality-14 80864 m, 16172 m/sec, 396188 t fired, .
42 CTL EXCL 5/3012 1/5 Echo-PT-d03r07-CTLCardinality-15 80381 m, -687872 m/sec, 394125 t fired, .
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39 CTL EXCL 10/273 2/32 Echo-PT-d03r07-CTLCardinality-14 157545 m, 15336 m/sec, 807405 t fired, .
42 CTL EXCL 10/251 2/5 Echo-PT-d03r07-CTLCardinality-15 156021 m, 15128 m/sec, 800968 t fired, .
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39 CTL EXCL 15/273 2/32 Echo-PT-d03r07-CTLCardinality-14 229912 m, 14473 m/sec, 1223580 t fired, .
42 CTL EXCL 15/251 2/5 Echo-PT-d03r07-CTLCardinality-15 223276 m, 13451 m/sec, 1186261 t fired, .
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39 CTL EXCL 20/273 3/32 Echo-PT-d03r07-CTLCardinality-14 294612 m, 12940 m/sec, 1627477 t fired, .
42 CTL EXCL 20/251 3/5 Echo-PT-d03r07-CTLCardinality-15 289202 m, 13185 m/sec, 1596175 t fired, .
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39 CTL EXCL 25/273 4/32 Echo-PT-d03r07-CTLCardinality-14 356962 m, 12470 m/sec, 2041883 t fired, .
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39 CTL EXCL 30/273 4/32 Echo-PT-d03r07-CTLCardinality-14 428200 m, 14247 m/sec, 2461594 t fired, .
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39 CTL EXCL 35/273 5/32 Echo-PT-d03r07-CTLCardinality-14 494729 m, 13305 m/sec, 2882285 t fired, .
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39 CTL EXCL 40/273 5/32 Echo-PT-d03r07-CTLCardinality-14 562665 m, 13587 m/sec, 3301767 t fired, .
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39 CTL EXCL 55/273 7/32 Echo-PT-d03r07-CTLCardinality-14 764514 m, 13859 m/sec, 4562236 t fired, .
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39 CTL EXCL 60/273 7/32 Echo-PT-d03r07-CTLCardinality-14 831829 m, 13463 m/sec, 4983767 t fired, .
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39 CTL EXCL 65/273 8/32 Echo-PT-d03r07-CTLCardinality-14 896867 m, 13007 m/sec, 5402350 t fired, .
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39 CTL EXCL 80/273 10/32 Echo-PT-d03r07-CTLCardinality-14 1101149 m, 13713 m/sec, 6665258 t fired, .
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39 CTL EXCL 10/304 2/5 Echo-PT-d03r07-CTLCardinality-14 159718 m, 15371 m/sec, 819000 t fired, .
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39 CTL EXCL 15/304 2/5 Echo-PT-d03r07-CTLCardinality-14 231531 m, 14362 m/sec, 1234014 t fired, .
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10 CTL EXCL 140/339 16/32 Echo-PT-d03r07-CTLCardinality-05 1915903 m, 13565 m/sec, 11757756 t fired, .
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10 CTL EXCL 145/339 17/32 Echo-PT-d03r07-CTLCardinality-05 1985051 m, 13829 m/sec, 12183075 t fired, .
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10 CTL EXCL 150/339 17/32 Echo-PT-d03r07-CTLCardinality-05 2053265 m, 13642 m/sec, 12610625 t fired, .
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FINAL RESULTS
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Echo-PT-d03r07-CTLCardinality-00: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-03: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-04: CTL false CTL model checker
Echo-PT-d03r07-CTLCardinality-05: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-06: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-07: DISJ false DISJ
Echo-PT-d03r07-CTLCardinality-08: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-10: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-11: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-13: CONJ false CTL model checker
Echo-PT-d03r07-CTLCardinality-14: CTL unknown AGGR
Echo-PT-d03r07-CTLCardinality-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d03r07"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Echo-PT-d03r07, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852500097"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d03r07.tgz
mv Echo-PT-d03r07 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;