Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852500065.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Echo-PT-d02r15, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852500065
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 9.5K Feb 25 14:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 25 14:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 14:08 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 25 14:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 14:12 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 101K Feb 25 14:12 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 14:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 14:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 917K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-00
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-01
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-02
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-03
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-04
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-05
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-06
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-07
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-08
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-09
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-10
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-11
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-12
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-13
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-14
FORMULA_NAME Echo-PT-d02r15-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678435941139

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d02r15
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 08:12:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 08:12:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 08:12:22] [INFO ] Load time of PNML (sax parser for PT used): 137 ms
[2023-03-10 08:12:22] [INFO ] Transformed 2127 places.
[2023-03-10 08:12:22] [INFO ] Transformed 1674 transitions.
[2023-03-10 08:12:22] [INFO ] Found NUPN structural information;
[2023-03-10 08:12:22] [INFO ] Parsed PT model containing 2127 places and 1674 transitions and 9700 arcs in 430 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 19 ms.
FORMULA Echo-PT-d02r15-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 177 out of 2127 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2127/2127 places, 1674/1674 transitions.
Reduce places removed 209 places and 0 transitions.
Iterating post reduction 0 with 209 rules applied. Total rules applied 209 place count 1918 transition count 1674
Applied a total of 209 rules in 213 ms. Remains 1918 /2127 variables (removed 209) and now considering 1674/1674 (removed 0) transitions.
// Phase 1: matrix 1674 rows 1918 cols
[2023-03-10 08:12:24] [INFO ] Computed 856 place invariants in 1137 ms
[2023-03-10 08:12:29] [INFO ] Implicit Places using invariants in 5864 ms returned []
[2023-03-10 08:12:29] [INFO ] Invariant cache hit.
[2023-03-10 08:12:33] [INFO ] Implicit Places using invariants and state equation in 4594 ms returned []
Implicit Place search using SMT with State Equation took 10489 ms to find 0 implicit places.
[2023-03-10 08:12:33] [INFO ] Invariant cache hit.
[2023-03-10 08:12:36] [INFO ] Dead Transitions using invariants and state equation in 2852 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1918/2127 places, 1674/1674 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13558 ms. Remains : 1918/2127 places, 1674/1674 transitions.
Support contains 177 out of 1918 places after structural reductions.
[2023-03-10 08:12:36] [INFO ] Flatten gal took : 203 ms
[2023-03-10 08:12:37] [INFO ] Flatten gal took : 122 ms
[2023-03-10 08:12:37] [INFO ] Input system was already deterministic with 1674 transitions.
Support contains 172 out of 1918 places (down from 177) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 575 ms. (steps per millisecond=17 ) properties (out of 94) seen :87
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-10 08:12:38] [INFO ] Invariant cache hit.
[2023-03-10 08:12:38] [INFO ] [Real]Absence check using 51 positive place invariants in 25 ms returned sat
[2023-03-10 08:12:40] [INFO ] [Real]Absence check using 51 positive and 805 generalized place invariants in 1140 ms returned sat
[2023-03-10 08:12:40] [INFO ] After 1919ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-10 08:12:40] [INFO ] [Nat]Absence check using 51 positive place invariants in 79 ms returned sat
[2023-03-10 08:12:42] [INFO ] [Nat]Absence check using 51 positive and 805 generalized place invariants in 1542 ms returned sat
[2023-03-10 08:12:44] [INFO ] After 1541ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-10 08:12:44] [INFO ] After 2228ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 466 ms.
[2023-03-10 08:12:45] [INFO ] After 5066ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Fused 5 Parikh solutions to 2 different solutions.
Parikh walk visited 2 properties in 27 ms.
Support contains 5 out of 1918 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Graph (complete) has 5805 edges and 1918 vertex of which 1902 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.7 ms
Discarding 16 places :
Also discarding 0 output transitions
Partial Free-agglomeration rule applied 4 times.
Drop transitions removed 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 5 place count 1902 transition count 1674
Applied a total of 5 rules in 341 ms. Remains 1902 /1918 variables (removed 16) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 342 ms. Remains : 1902/1918 places, 1674/1674 transitions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 265 ms. (steps per millisecond=37 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 1674 rows 1902 cols
[2023-03-10 08:12:48] [INFO ] Computed 840 place invariants in 2159 ms
[2023-03-10 08:12:51] [INFO ] [Real]Absence check using 0 positive and 840 generalized place invariants in 2670 ms returned sat
[2023-03-10 08:12:52] [INFO ] After 4653ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 08:12:55] [INFO ] [Nat]Absence check using 0 positive and 840 generalized place invariants in 2549 ms returned sat
[2023-03-10 08:12:57] [INFO ] After 1004ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-10 08:12:57] [INFO ] After 1373ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 297 ms.
[2023-03-10 08:12:57] [INFO ] After 5009ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 23 ms.
Support contains 4 out of 1902 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 121 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 121 ms. Remains : 1902/1902 places, 1674/1674 transitions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 267 ms. (steps per millisecond=37 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 354953 steps, run timeout after 3001 ms. (steps per millisecond=118 ) properties seen :{}
Probabilistic random walk after 354953 steps, saw 81563 distinct states, run finished after 3004 ms. (steps per millisecond=118 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-10 08:13:01] [INFO ] Invariant cache hit.
[2023-03-10 08:13:04] [INFO ] [Real]Absence check using 0 positive and 840 generalized place invariants in 2649 ms returned sat
[2023-03-10 08:13:05] [INFO ] After 4255ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 08:13:09] [INFO ] [Nat]Absence check using 0 positive and 840 generalized place invariants in 3256 ms returned sat
[2023-03-10 08:13:11] [INFO ] After 1379ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-10 08:13:11] [INFO ] After 1757ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 298 ms.
[2023-03-10 08:13:11] [INFO ] After 6003ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 9 ms.
Support contains 4 out of 1902 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 62 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 62 ms. Remains : 1902/1902 places, 1674/1674 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 60 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
[2023-03-10 08:13:11] [INFO ] Invariant cache hit.
[2023-03-10 08:15:51] [INFO ] Performed 1/1902 implicitness test of which 0 returned IMPLICIT in 157 seconds.
[2023-03-10 08:15:51] [INFO ] Timeout of Implicit test with SMT after 157 seconds.
[2023-03-10 08:15:51] [INFO ] Implicit Places using invariants in 160017 ms returned []
[2023-03-10 08:15:51] [INFO ] Invariant cache hit.
[2023-03-10 08:15:58] [INFO ] Implicit Places using invariants and state equation in 6479 ms returned []
Implicit Place search using SMT with State Equation took 166507 ms to find 0 implicit places.
[2023-03-10 08:15:58] [INFO ] Redundant transitions in 82 ms returned []
[2023-03-10 08:15:58] [INFO ] Invariant cache hit.
[2023-03-10 08:16:02] [INFO ] Dead Transitions using invariants and state equation in 4321 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 171015 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:16:03] [INFO ] Flatten gal took : 93 ms
[2023-03-10 08:16:03] [INFO ] Flatten gal took : 161 ms
[2023-03-10 08:16:03] [INFO ] Input system was already deterministic with 1674 transitions.
Computed a total of 1918 stabilizing places and 1674 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1918 transition count 1674
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 1903 transition count 1674
Applied a total of 15 rules in 91 ms. Remains 1903 /1918 variables (removed 15) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 105 ms. Remains : 1903/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:03] [INFO ] Flatten gal took : 139 ms
[2023-03-10 08:16:04] [INFO ] Flatten gal took : 157 ms
[2023-03-10 08:16:04] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 1903 transition count 1674
Applied a total of 15 rules in 48 ms. Remains 1903 /1918 variables (removed 15) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 63 ms. Remains : 1903/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:04] [INFO ] Flatten gal took : 80 ms
[2023-03-10 08:16:04] [INFO ] Flatten gal took : 67 ms
[2023-03-10 08:16:04] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 1902 transition count 1674
Applied a total of 16 rules in 42 ms. Remains 1902 /1918 variables (removed 16) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 1902/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:04] [INFO ] Flatten gal took : 62 ms
[2023-03-10 08:16:04] [INFO ] Flatten gal took : 62 ms
[2023-03-10 08:16:04] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 14 places and 0 transitions.
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 1904 transition count 1674
Applied a total of 14 rules in 75 ms. Remains 1904 /1918 variables (removed 14) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 1904/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:05] [INFO ] Flatten gal took : 62 ms
[2023-03-10 08:16:05] [INFO ] Flatten gal took : 78 ms
[2023-03-10 08:16:05] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 14 places and 0 transitions.
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 1904 transition count 1674
Applied a total of 14 rules in 71 ms. Remains 1904 /1918 variables (removed 14) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 72 ms. Remains : 1904/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:05] [INFO ] Flatten gal took : 125 ms
[2023-03-10 08:16:05] [INFO ] Flatten gal took : 79 ms
[2023-03-10 08:16:05] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 1903 transition count 1674
Applied a total of 15 rules in 47 ms. Remains 1903 /1918 variables (removed 15) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 1903/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:06] [INFO ] Flatten gal took : 77 ms
[2023-03-10 08:16:06] [INFO ] Flatten gal took : 117 ms
[2023-03-10 08:16:06] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Graph (complete) has 5805 edges and 1918 vertex of which 1897 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.23 ms
Discarding 21 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 176 ms. Remains 1896 /1918 variables (removed 22) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 176 ms. Remains : 1896/1918 places, 1672/1674 transitions.
[2023-03-10 08:16:06] [INFO ] Flatten gal took : 126 ms
[2023-03-10 08:16:06] [INFO ] Flatten gal took : 76 ms
[2023-03-10 08:16:06] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Graph (complete) has 5805 edges and 1918 vertex of which 1897 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.4 ms
Discarding 21 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 144 ms. Remains 1896 /1918 variables (removed 22) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 157 ms. Remains : 1896/1918 places, 1672/1674 transitions.
[2023-03-10 08:16:07] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:16:07] [INFO ] Flatten gal took : 63 ms
[2023-03-10 08:16:07] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 1903 transition count 1674
Applied a total of 15 rules in 48 ms. Remains 1903 /1918 variables (removed 15) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 1903/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:07] [INFO ] Flatten gal took : 74 ms
[2023-03-10 08:16:07] [INFO ] Flatten gal took : 84 ms
[2023-03-10 08:16:07] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 1902 transition count 1674
Applied a total of 16 rules in 44 ms. Remains 1902 /1918 variables (removed 16) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 45 ms. Remains : 1902/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:07] [INFO ] Flatten gal took : 57 ms
[2023-03-10 08:16:07] [INFO ] Flatten gal took : 62 ms
[2023-03-10 08:16:07] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 1906 transition count 1674
Applied a total of 12 rules in 43 ms. Remains 1906 /1918 variables (removed 12) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 1906/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:08] [INFO ] Flatten gal took : 56 ms
[2023-03-10 08:16:08] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:16:08] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 1906 transition count 1674
Applied a total of 12 rules in 43 ms. Remains 1906 /1918 variables (removed 12) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 1906/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:08] [INFO ] Flatten gal took : 57 ms
[2023-03-10 08:16:08] [INFO ] Flatten gal took : 78 ms
[2023-03-10 08:16:08] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 1902 transition count 1674
Applied a total of 16 rules in 53 ms. Remains 1902 /1918 variables (removed 16) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 1902/1918 places, 1674/1674 transitions.
[2023-03-10 08:16:08] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:16:08] [INFO ] Flatten gal took : 64 ms
[2023-03-10 08:16:08] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Graph (complete) has 5805 edges and 1918 vertex of which 1897 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.4 ms
Discarding 21 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 64 ms. Remains 1896 /1918 variables (removed 22) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 1896/1918 places, 1672/1674 transitions.
[2023-03-10 08:16:09] [INFO ] Flatten gal took : 74 ms
[2023-03-10 08:16:09] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:16:09] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1918/1918 places, 1674/1674 transitions.
Graph (complete) has 5805 edges and 1918 vertex of which 1903 are kept as prefixes of interest. Removing 15 places using SCC suffix rule.4 ms
Discarding 15 places :
Also discarding 0 output transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 61 ms. Remains 1902 /1918 variables (removed 16) and now considering 1673/1674 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 61 ms. Remains : 1902/1918 places, 1673/1674 transitions.
[2023-03-10 08:16:09] [INFO ] Flatten gal took : 69 ms
[2023-03-10 08:16:09] [INFO ] Flatten gal took : 65 ms
[2023-03-10 08:16:09] [INFO ] Input system was already deterministic with 1673 transitions.
[2023-03-10 08:16:09] [INFO ] Flatten gal took : 65 ms
[2023-03-10 08:16:09] [INFO ] Flatten gal took : 61 ms
[2023-03-10 08:16:09] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-10 08:16:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1918 places, 1674 transitions and 8923 arcs took 11 ms.
Total runtime 227236 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Echo-PT-d02r15
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371

FORMULA Echo-PT-d02r15-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678436724402

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 16 (type EXCL) for 15 Echo-PT-d02r15-CTLCardinality-06
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 46 (type FNDP) for 42 Echo-PT-d02r15-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 47 (type EQUN) for 42 Echo-PT-d02r15-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type SRCH) for 42 Echo-PT-d02r15-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 46 (type FNDP) for Echo-PT-d02r15-CTLCardinality-15
lola: result : true
lola: fired transitions : 13
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 49 (type SRCH) for Echo-PT-d02r15-CTLCardinality-15
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: CANCELED task # 47 (type EQUN) for Echo-PT-d02r15-CTLCardinality-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/371/CTLCardinality-47.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r15-CTLCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-09: AXAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 3/256 2/32 Echo-PT-d02r15-CTLCardinality-06 125525 m, 25105 m/sec, 381539 t fired, .

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Echo-PT-d02r15-CTLCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
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Echo-PT-d02r15-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-09: AXAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 8/256 6/32 Echo-PT-d02r15-CTLCardinality-06 362517 m, 47398 m/sec, 1171797 t fired, .

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Echo-PT-d02r15-CTLCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-09: AXAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 13/256 10/32 Echo-PT-d02r15-CTLCardinality-06 599153 m, 47327 m/sec, 1962281 t fired, .

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Echo-PT-d02r15-CTLCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
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16 CTL EXCL 48/256 32/32 Echo-PT-d02r15-CTLCardinality-06 2083469 m, 43604 m/sec, 7507296 t fired, .

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37 CTL EXCL 5/294 3/32 Echo-PT-d02r15-CTLCardinality-13 148446 m, 29689 m/sec, 809812 t fired, .

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37 CTL EXCL 10/294 6/32 Echo-PT-d02r15-CTLCardinality-13 289298 m, 28170 m/sec, 1607705 t fired, .

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37 CTL EXCL 15/294 8/32 Echo-PT-d02r15-CTLCardinality-13 417367 m, 25613 m/sec, 2398303 t fired, .

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37 CTL EXCL 25/294 13/32 Echo-PT-d02r15-CTLCardinality-13 654714 m, 21986 m/sec, 3973534 t fired, .

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37 CTL EXCL 30/294 15/32 Echo-PT-d02r15-CTLCardinality-13 771597 m, 23376 m/sec, 4757859 t fired, .

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37 CTL EXCL 35/294 17/32 Echo-PT-d02r15-CTLCardinality-13 892790 m, 24238 m/sec, 5540974 t fired, .

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37 CTL EXCL 65/294 30/32 Echo-PT-d02r15-CTLCardinality-13 1610773 m, 22492 m/sec, 10277094 t fired, .

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10 CTL EXCL 25/484 10/32 Echo-PT-d02r15-CTLCardinality-04 517235 m, 19786 m/sec, 4042884 t fired, .

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Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
Echo-PT-d02r15-CTLCardinality-10: CTL false CTL model checker
Echo-PT-d02r15-CTLCardinality-15: EF true findpath

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Echo-PT-d02r15-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r15-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 45/1563 19/32 Echo-PT-d02r15-CTLCardinality-14 1001689 m, 22315 m/sec, 7215020 t fired, .

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Echo-PT-d02r15-CTLCardinality-05: CTL true CTL model checker
Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
Echo-PT-d02r15-CTLCardinality-10: CTL false CTL model checker
Echo-PT-d02r15-CTLCardinality-15: EF true findpath

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40 CTL EXCL 50/1563 21/32 Echo-PT-d02r15-CTLCardinality-14 1104866 m, 20635 m/sec, 8017233 t fired, .

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Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 55/1563 23/32 Echo-PT-d02r15-CTLCardinality-14 1213025 m, 21631 m/sec, 8812169 t fired, .

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Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
Echo-PT-d02r15-CTLCardinality-10: CTL false CTL model checker
Echo-PT-d02r15-CTLCardinality-15: EF true findpath

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Echo-PT-d02r15-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 60/1563 25/32 Echo-PT-d02r15-CTLCardinality-14 1320472 m, 21489 m/sec, 9609033 t fired, .

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Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
Echo-PT-d02r15-CTLCardinality-10: CTL false CTL model checker
Echo-PT-d02r15-CTLCardinality-15: EF true findpath

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40 CTL EXCL 65/1563 27/32 Echo-PT-d02r15-CTLCardinality-14 1425648 m, 21035 m/sec, 10416380 t fired, .

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Echo-PT-d02r15-CTLCardinality-05: CTL true CTL model checker
Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
Echo-PT-d02r15-CTLCardinality-10: CTL false CTL model checker
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40 CTL EXCL 70/1563 29/32 Echo-PT-d02r15-CTLCardinality-14 1529746 m, 20819 m/sec, 11215447 t fired, .

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Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
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40 CTL EXCL 75/1563 31/32 Echo-PT-d02r15-CTLCardinality-14 1628105 m, 19671 m/sec, 12034012 t fired, .

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Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r15-CTLCardinality-00: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-01: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-03: CTL true CTL model checker
Echo-PT-d02r15-CTLCardinality-04: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-05: CTL true CTL model checker
Echo-PT-d02r15-CTLCardinality-06: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-07: CTL true CTL model checker
Echo-PT-d02r15-CTLCardinality-08: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-09: AXAG false state space /EXEF
Echo-PT-d02r15-CTLCardinality-10: CTL false CTL model checker
Echo-PT-d02r15-CTLCardinality-11: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-12: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-13: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-14: CTL unknown AGGR
Echo-PT-d02r15-CTLCardinality-15: EF true findpath


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d02r15"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Echo-PT-d02r15, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852500065"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d02r15.tgz
mv Echo-PT-d02r15 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;