Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852400050.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Echo-PT-d02r09, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852400050
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 772K
-rw-r--r-- 1 mcc users 7.6K Feb 25 14:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 25 14:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 14:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 25 14:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 25 14:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Feb 25 14:09 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Feb 25 14:09 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 303K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d02r09-CTLFireability-00
FORMULA_NAME Echo-PT-d02r09-CTLFireability-01
FORMULA_NAME Echo-PT-d02r09-CTLFireability-02
FORMULA_NAME Echo-PT-d02r09-CTLFireability-03
FORMULA_NAME Echo-PT-d02r09-CTLFireability-04
FORMULA_NAME Echo-PT-d02r09-CTLFireability-05
FORMULA_NAME Echo-PT-d02r09-CTLFireability-06
FORMULA_NAME Echo-PT-d02r09-CTLFireability-07
FORMULA_NAME Echo-PT-d02r09-CTLFireability-08
FORMULA_NAME Echo-PT-d02r09-CTLFireability-09
FORMULA_NAME Echo-PT-d02r09-CTLFireability-10
FORMULA_NAME Echo-PT-d02r09-CTLFireability-11
FORMULA_NAME Echo-PT-d02r09-CTLFireability-12
FORMULA_NAME Echo-PT-d02r09-CTLFireability-13
FORMULA_NAME Echo-PT-d02r09-CTLFireability-14
FORMULA_NAME Echo-PT-d02r09-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678433693889

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d02r09
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 07:34:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 07:34:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 07:34:55] [INFO ] Load time of PNML (sax parser for PT used): 80 ms
[2023-03-10 07:34:55] [INFO ] Transformed 735 places.
[2023-03-10 07:34:55] [INFO ] Transformed 570 transitions.
[2023-03-10 07:34:55] [INFO ] Found NUPN structural information;
[2023-03-10 07:34:55] [INFO ] Parsed PT model containing 735 places and 570 transitions and 3220 arcs in 148 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 300 out of 735 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 735/735 places, 570/570 transitions.
Reduce places removed 81 places and 0 transitions.
Iterating post reduction 0 with 81 rules applied. Total rules applied 81 place count 654 transition count 570
Applied a total of 81 rules in 52 ms. Remains 654 /735 variables (removed 81) and now considering 570/570 (removed 0) transitions.
// Phase 1: matrix 570 rows 654 cols
[2023-03-10 07:34:55] [INFO ] Computed 288 place invariants in 184 ms
[2023-03-10 07:34:56] [INFO ] Implicit Places using invariants in 843 ms returned []
[2023-03-10 07:34:56] [INFO ] Invariant cache hit.
[2023-03-10 07:34:58] [INFO ] Implicit Places using invariants and state equation in 2124 ms returned []
Implicit Place search using SMT with State Equation took 2992 ms to find 0 implicit places.
[2023-03-10 07:34:58] [INFO ] Invariant cache hit.
[2023-03-10 07:34:59] [INFO ] Dead Transitions using invariants and state equation in 1017 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 654/735 places, 570/570 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4064 ms. Remains : 654/735 places, 570/570 transitions.
Support contains 300 out of 654 places after structural reductions.
[2023-03-10 07:34:59] [INFO ] Flatten gal took : 82 ms
[2023-03-10 07:34:59] [INFO ] Flatten gal took : 52 ms
[2023-03-10 07:34:59] [INFO ] Input system was already deterministic with 570 transitions.
Support contains 298 out of 654 places (down from 300) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 61 resets, run finished after 482 ms. (steps per millisecond=20 ) properties (out of 98) seen :89
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 2) seen :1
Finished Best-First random walk after 2764 steps, including 0 resets, run visited all 1 properties in 10 ms. (steps per millisecond=276 )
[2023-03-10 07:35:00] [INFO ] Flatten gal took : 38 ms
[2023-03-10 07:35:00] [INFO ] Flatten gal took : 39 ms
[2023-03-10 07:35:00] [INFO ] Input system was already deterministic with 570 transitions.
Computed a total of 654 stabilizing places and 570 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 654 transition count 570
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 20 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 29 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 27 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Graph (complete) has 1893 edges and 654 vertex of which 649 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.5 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Applied a total of 1 rules in 84 ms. Remains 649 /654 variables (removed 5) and now considering 569/570 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 85 ms. Remains : 649/654 places, 569/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 23 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 24 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 569 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 9 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 24 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 25 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 66 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 67 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 23 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 24 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Graph (complete) has 1893 edges and 654 vertex of which 649 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.4 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 26 ms. Remains 648 /654 variables (removed 6) and now considering 568/570 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 648/654 places, 568/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 23 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 23 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 568 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 7 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 22 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 22 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 7 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 22 ms
[2023-03-10 07:35:01] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Graph (complete) has 1893 edges and 654 vertex of which 649 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.4 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 24 ms. Remains 648 /654 variables (removed 6) and now considering 568/570 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 648/654 places, 568/570 transitions.
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:01] [INFO ] Flatten gal took : 22 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 568 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Graph (complete) has 1893 edges and 654 vertex of which 649 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.4 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 25 ms. Remains 648 /654 variables (removed 6) and now considering 568/570 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 648/654 places, 568/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 20 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 568 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 7 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 19 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 6 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 20 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Graph (complete) has 1893 edges and 654 vertex of which 649 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.3 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Applied a total of 1 rules in 20 ms. Remains 649 /654 variables (removed 5) and now considering 569/570 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 649/654 places, 569/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 20 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 25 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 569 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 6 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 19 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Graph (complete) has 1893 edges and 654 vertex of which 649 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.3 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 20 ms. Remains 648 /654 variables (removed 6) and now considering 568/570 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 648/654 places, 568/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 19 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 25 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 568 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 6 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 20 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 20 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 570 transitions.
Starting structural reductions in LTL mode, iteration 0 : 654/654 places, 570/570 transitions.
Applied a total of 0 rules in 6 ms. Remains 654 /654 variables (removed 0) and now considering 570/570 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 654/654 places, 570/570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 20 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 21 ms
[2023-03-10 07:35:02] [INFO ] Input system was already deterministic with 570 transitions.
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 22 ms
[2023-03-10 07:35:02] [INFO ] Flatten gal took : 22 ms
[2023-03-10 07:35:02] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-10 07:35:02] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 654 places, 570 transitions and 2935 arcs took 4 ms.
Total runtime 7734 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Echo-PT-d02r09
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA Echo-PT-d02r09-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r09-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r09-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r09-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r09-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r09-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r09-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678434451823

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
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lola: rewrite Frontend/Parser/formula_rewrite.k:397
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lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 40 (type EXCL) for 39 Echo-PT-d02r09-CTLFireability-09
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

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Echo-PT-d02r09-CTLFireability-02: DISJ 0 4 0 0 4 0 0 0
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Echo-PT-d02r09-CTLFireability-04: EFAG 0 1 0 0 1 0 0 0
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Echo-PT-d02r09-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r09-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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40 CTL EXCL 5/179 2/32 Echo-PT-d02r09-CTLFireability-09 302915 m, 60583 m/sec, 2007038 t fired, .

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40 CTL EXCL 10/179 4/32 Echo-PT-d02r09-CTLFireability-09 614102 m, 62237 m/sec, 4187690 t fired, .

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40 CTL EXCL 15/179 6/32 Echo-PT-d02r09-CTLFireability-09 896525 m, 56484 m/sec, 6288187 t fired, .

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40 CTL EXCL 20/179 8/32 Echo-PT-d02r09-CTLFireability-09 1171438 m, 54982 m/sec, 8417285 t fired, .

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40 CTL EXCL 25/179 9/32 Echo-PT-d02r09-CTLFireability-09 1451188 m, 55950 m/sec, 10543398 t fired, .

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40 CTL EXCL 30/179 11/32 Echo-PT-d02r09-CTLFireability-09 1722807 m, 54323 m/sec, 12688106 t fired, .

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40 CTL EXCL 35/179 13/32 Echo-PT-d02r09-CTLFireability-09 2003909 m, 56220 m/sec, 14798441 t fired, .

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40 CTL EXCL 40/179 14/32 Echo-PT-d02r09-CTLFireability-09 2268455 m, 52909 m/sec, 16917949 t fired, .

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34 CTL EXCL 10/2962 4/32 Echo-PT-d02r09-CTLFireability-07 601009 m, 58498 m/sec, 4215742 t fired, .

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34 CTL EXCL 15/2962 6/32 Echo-PT-d02r09-CTLFireability-07 875498 m, 54897 m/sec, 6319862 t fired, .

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34 CTL EXCL 20/2962 7/32 Echo-PT-d02r09-CTLFireability-07 1152166 m, 55333 m/sec, 8433147 t fired, .

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Echo-PT-d02r09-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r09-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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34 CTL EXCL 80/2962 25/32 Echo-PT-d02r09-CTLFireability-07 4211532 m, 49088 m/sec, 33609016 t fired, .

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Echo-PT-d02r09-CTLFireability-00: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-02: DISJ true state space /EXEF
Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker

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Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r09-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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34 CTL EXCL 85/2962 27/32 Echo-PT-d02r09-CTLFireability-07 4448900 m, 47473 m/sec, 35689463 t fired, .

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Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker

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Echo-PT-d02r09-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r09-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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34 CTL EXCL 90/2962 28/32 Echo-PT-d02r09-CTLFireability-07 4685924 m, 47404 m/sec, 37772931 t fired, .

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Echo-PT-d02r09-CTLFireability-02: DISJ true state space /EXEF
Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker

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Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r09-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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34 CTL EXCL 95/2962 29/32 Echo-PT-d02r09-CTLFireability-07 4921347 m, 47084 m/sec, 39867688 t fired, .

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Echo-PT-d02r09-CTLFireability-02: DISJ true state space /EXEF
Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker

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Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r09-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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34 CTL EXCL 100/2962 31/32 Echo-PT-d02r09-CTLFireability-07 5168837 m, 49498 m/sec, 41937639 t fired, .

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Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker

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Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
Echo-PT-d02r09-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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34 CTL EXCL 105/2962 32/32 Echo-PT-d02r09-CTLFireability-07 5432997 m, 52832 m/sec, 44028595 t fired, .

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Echo-PT-d02r09-CTLFireability-00: CTL false CTL model checker
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Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker

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Echo-PT-d02r09-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r09-CTLFireability-00: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-01: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-02: DISJ true state space /EXEF
Echo-PT-d02r09-CTLFireability-03: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-04: EFAG true tscc_search
Echo-PT-d02r09-CTLFireability-05: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-06: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-07: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-08: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-09: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-10: DISJ unknown DISJ
Echo-PT-d02r09-CTLFireability-11: CTL false CTL model checker
Echo-PT-d02r09-CTLFireability-12: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-13: CTL true CTL model checker
Echo-PT-d02r09-CTLFireability-14: CTL unknown AGGR
Echo-PT-d02r09-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d02r09"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Echo-PT-d02r09, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852400050"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d02r09.tgz
mv Echo-PT-d02r09 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;