About the Execution of LoLA for FlexibleBarrier-PT-16a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
7931.695 | 265629.00 | 261596.00 | 830.50 | ????TTTTTFFTT?F? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r166-tall-167838851900538.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is FlexibleBarrier-PT-16a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r166-tall-167838851900538
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 656K
-rw-r--r-- 1 mcc users 7.6K Feb 25 13:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 25 13:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 12:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 25 12:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 13:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 25 13:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Feb 25 13:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 25 13:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 214K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-00
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-01
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-02
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-03
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-04
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-05
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-06
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-07
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-08
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-09
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-10
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-11
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-12
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-13
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-14
FORMULA_NAME FlexibleBarrier-PT-16a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678483832058
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FlexibleBarrier-PT-16a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT FlexibleBarrier-PT-16a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA FlexibleBarrier-PT-16a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FlexibleBarrier-PT-16a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678484097687
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 16 (type EXCL) for 15 FlexibleBarrier-PT-16a-CTLFireability-05
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: Created skeleton in 0.000000 secs.
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sara: try reading problem file /home/mcc/execution/CTLFireability-58.sara.
sara: place or transition ordering is non-deterministic
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: markings : 30787
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-14: DISJ 0 1 0 0 6 0 0 2
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ 0 1 0 0 6 0 0 2
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ 0 1 0 0 6 0 0 2
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ 0 1 0 0 6 0 0 2
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ 0 1 0 0 6 0 0 2
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ 0 1 0 0 6 0 0 2
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lola: result : false
lola: markings : 1
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 20/274 14/32 FlexibleBarrier-PT-16a-CTLFireability-13 3308244 m, 158612 m/sec, 19300640 t fired, .
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FlexibleBarrier-PT-16a-CTLFireability-05: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ false DISJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 25/274 18/32 FlexibleBarrier-PT-16a-CTLFireability-13 4033133 m, 144977 m/sec, 23681102 t fired, .
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FlexibleBarrier-PT-16a-CTLFireability-14: DISJ false DISJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 30/274 21/32 FlexibleBarrier-PT-16a-CTLFireability-13 4734788 m, 140331 m/sec, 27985449 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 35/274 23/32 FlexibleBarrier-PT-16a-CTLFireability-13 5415120 m, 136066 m/sec, 32170905 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 40/274 26/32 FlexibleBarrier-PT-16a-CTLFireability-13 6078258 m, 132627 m/sec, 36276917 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 45/274 29/32 FlexibleBarrier-PT-16a-CTLFireability-13 6743019 m, 132952 m/sec, 40389949 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 50/274 32/32 FlexibleBarrier-PT-16a-CTLFireability-13 7378732 m, 127142 m/sec, 44372324 t fired, .
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lola: CANCELED task # 40 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-13 (memory limit exceeded)
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 37 (type EXCL) for 36 FlexibleBarrier-PT-16a-CTLFireability-12
lola: time limit : 292 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-12
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 FlexibleBarrier-PT-16a-CTLFireability-11
lola: time limit : 319 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-11
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 FlexibleBarrier-PT-16a-CTLFireability-09
lola: time limit : 351 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 FlexibleBarrier-PT-16a-CTLFireability-08
lola: time limit : 390 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-08
lola: result : true
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 FlexibleBarrier-PT-16a-CTLFireability-06
lola: time limit : 438 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-06
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 FlexibleBarrier-PT-16a-CTLFireability-04
lola: time limit : 501 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-04
lola: result : true
lola: markings : 30745
lola: fired transitions : 175074
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 FlexibleBarrier-PT-16a-CTLFireability-03
lola: time limit : 585 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16a-CTLFireability-04: CTL true CTL model checker
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FlexibleBarrier-PT-16a-CTLFireability-14: DISJ false DISJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/585 7/32 FlexibleBarrier-PT-16a-CTLFireability-03 1585930 m, 317186 m/sec, 3879212 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FlexibleBarrier-PT-16a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/585 13/32 FlexibleBarrier-PT-16a-CTLFireability-03 3022016 m, 287217 m/sec, 7507081 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/585 18/32 FlexibleBarrier-PT-16a-CTLFireability-03 4253877 m, 246372 m/sec, 10784295 t fired, .
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-07: EG 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/585 28/32 FlexibleBarrier-PT-16a-CTLFireability-03 6540863 m, 223919 m/sec, 16995665 t fired, .
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FlexibleBarrier-PT-16a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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lola: FINISHED task # 22 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-07
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 FlexibleBarrier-PT-16a-CTLFireability-10
lola: time limit : 1707 sec
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lola: FINISHED task # 31 (type EXCL) for FlexibleBarrier-PT-16a-CTLFireability-10
lola: result : false
lola: markings : 54
lola: fired transitions : 146
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 FlexibleBarrier-PT-16a-CTLFireability-00
lola: time limit : 3415 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FlexibleBarrier-PT-16a-CTLFireability-04: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-05: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-06: CTL true CTL model checker
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FlexibleBarrier-PT-16a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FlexibleBarrier-PT-16a-CTLFireability-04: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-05: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-06: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-07: EG true state space / EG
FlexibleBarrier-PT-16a-CTLFireability-08: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-11: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-12: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ false DISJ
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FlexibleBarrier-PT-16a-CTLFireability-04: CTL true CTL model checker
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FlexibleBarrier-PT-16a-CTLFireability-06: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-07: EG true state space / EG
FlexibleBarrier-PT-16a-CTLFireability-08: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-11: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-12: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ false DISJ
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FlexibleBarrier-PT-16a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
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FlexibleBarrier-PT-16a-CTLFireability-00: CTL unknown AGGR
FlexibleBarrier-PT-16a-CTLFireability-01: CTL unknown AGGR
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FlexibleBarrier-PT-16a-CTLFireability-03: CTL unknown AGGR
FlexibleBarrier-PT-16a-CTLFireability-04: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-05: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-06: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-07: EG true state space / EG
FlexibleBarrier-PT-16a-CTLFireability-08: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-09: CTL false CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-10: CTL false CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-11: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-12: CTL true CTL model checker
FlexibleBarrier-PT-16a-CTLFireability-13: CTL unknown AGGR
FlexibleBarrier-PT-16a-CTLFireability-14: DISJ false DISJ
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-16a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is FlexibleBarrier-PT-16a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r166-tall-167838851900538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-16a.tgz
mv FlexibleBarrier-PT-16a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;