About the Execution of LoLA for FMS-PT-00010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1618.655 | 26317.00 | 23431.00 | 173.20 | TTT?FFTTFTFTTFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r166-tall-167838851400202.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is FMS-PT-00010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r166-tall-167838851400202
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 6.3K Feb 25 20:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 20:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 20:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 20:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 20:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 25 20:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 20:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 25 20:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 17K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00010-CTLFireability-00
FORMULA_NAME FMS-PT-00010-CTLFireability-01
FORMULA_NAME FMS-PT-00010-CTLFireability-02
FORMULA_NAME FMS-PT-00010-CTLFireability-03
FORMULA_NAME FMS-PT-00010-CTLFireability-04
FORMULA_NAME FMS-PT-00010-CTLFireability-05
FORMULA_NAME FMS-PT-00010-CTLFireability-06
FORMULA_NAME FMS-PT-00010-CTLFireability-07
FORMULA_NAME FMS-PT-00010-CTLFireability-08
FORMULA_NAME FMS-PT-00010-CTLFireability-09
FORMULA_NAME FMS-PT-00010-CTLFireability-10
FORMULA_NAME FMS-PT-00010-CTLFireability-11
FORMULA_NAME FMS-PT-00010-CTLFireability-12
FORMULA_NAME FMS-PT-00010-CTLFireability-13
FORMULA_NAME FMS-PT-00010-CTLFireability-14
FORMULA_NAME FMS-PT-00010-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678431308989
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FMS-PT-00010
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT FMS-PT-00010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA FMS-PT-00010-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FMS-PT-00010-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678431335306
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 7 (type EXCL) for 6 FMS-PT-00010-CTLFireability-02
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 7 (type EXCL) for FMS-PT-00010-CTLFireability-02
lola: result : true
lola: markings : 103
lola: fired transitions : 105
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 FMS-PT-00010-CTLFireability-03
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:703
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLFireability-02: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-01: SP ACTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-06: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/225 10/32 FMS-PT-00010-CTLFireability-03 2296361 m, 459272 m/sec, 6606567 t fired, .
Time elapsed: 5 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLFireability-02: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-01: SP ACTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-06: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/225 17/32 FMS-PT-00010-CTLFireability-03 4067902 m, 354308 m/sec, 12379382 t fired, .
Time elapsed: 10 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLFireability-02: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-01: SP ACTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-06: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/225 24/32 FMS-PT-00010-CTLFireability-03 5662110 m, 318841 m/sec, 17812914 t fired, .
Time elapsed: 15 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLFireability-02: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-01: SP ACTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-06: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/225 30/32 FMS-PT-00010-CTLFireability-03 7150806 m, 297739 m/sec, 23041761 t fired, .
Time elapsed: 20 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for FMS-PT-00010-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLFireability-02: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-01: SP ACTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-06: AGEF 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-00010-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 25 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 47 (type EXCL) for 46 FMS-PT-00010-CTLFireability-14
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for FMS-PT-00010-CTLFireability-14
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 39 FMS-PT-00010-CTLFireability-13
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for FMS-PT-00010-CTLFireability-13
lola: result : true
lola: markings : 189
lola: fired transitions : 205
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 FMS-PT-00010-CTLFireability-11
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for FMS-PT-00010-CTLFireability-11
lola: result : true
lola: markings : 10
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 FMS-PT-00010-CTLFireability-10
lola: time limit : 297 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for FMS-PT-00010-CTLFireability-10
lola: result : false
lola: markings : 55
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 FMS-PT-00010-CTLFireability-09
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for FMS-PT-00010-CTLFireability-09
lola: result : true
lola: markings : 3087
lola: fired transitions : 6511
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 FMS-PT-00010-CTLFireability-08
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for FMS-PT-00010-CTLFireability-08
lola: result : false
lola: markings : 243
lola: fired transitions : 386
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 FMS-PT-00010-CTLFireability-07
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for FMS-PT-00010-CTLFireability-07
lola: result : true
lola: markings : 9902
lola: fired transitions : 20060
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 FMS-PT-00010-CTLFireability-00
lola: time limit : 446 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for FMS-PT-00010-CTLFireability-00
lola: result : true
lola: markings : 525222
lola: fired transitions : 1688460
lola: time used : 1.000000
lola: memory pages used : 3
lola: LAUNCH task # 53 (type EXCL) for 39 FMS-PT-00010-CTLFireability-13
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for FMS-PT-00010-CTLFireability-13
lola: result : true
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 FMS-PT-00010-CTLFireability-06
lola: time limit : 595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for FMS-PT-00010-CTLFireability-06
lola: result : true
lola: markings : 1331
lola: fired transitions : 6836
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 FMS-PT-00010-CTLFireability-15
lola: time limit : 714 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for FMS-PT-00010-CTLFireability-15
lola: result : true
lola: markings : 3
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 3 FMS-PT-00010-CTLFireability-01
lola: time limit : 893 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for FMS-PT-00010-CTLFireability-01
lola: result : true
lola: markings : 1257
lola: fired transitions : 4282
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 FMS-PT-00010-CTLFireability-12
lola: time limit : 1191 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for FMS-PT-00010-CTLFireability-12
lola: result : true
lola: markings : 282
lola: fired transitions : 538
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 FMS-PT-00010-CTLFireability-04
lola: time limit : 1787 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for FMS-PT-00010-CTLFireability-04
lola: result : false
lola: markings : 1869
lola: fired transitions : 8524
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 FMS-PT-00010-CTLFireability-05
lola: time limit : 3574 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for FMS-PT-00010-CTLFireability-05
lola: result : false
lola: markings : 81
lola: fired transitions : 148
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00010-CTLFireability-00: CTL true CTL model checker
FMS-PT-00010-CTLFireability-01: SP ACTL true LTL model checker
FMS-PT-00010-CTLFireability-02: CTL true CTL model checker
FMS-PT-00010-CTLFireability-03: CTL unknown AGGR
FMS-PT-00010-CTLFireability-04: CTL false CTL model checker
FMS-PT-00010-CTLFireability-05: CTL false CTL model checker
FMS-PT-00010-CTLFireability-06: AGEF true tscc_search
FMS-PT-00010-CTLFireability-07: CTL true CTL model checker
FMS-PT-00010-CTLFireability-08: CTL false CTL model checker
FMS-PT-00010-CTLFireability-09: CTL true CTL model checker
FMS-PT-00010-CTLFireability-10: CTL false CTL model checker
FMS-PT-00010-CTLFireability-11: CTL true CTL model checker
FMS-PT-00010-CTLFireability-12: CTL true CTL model checker
FMS-PT-00010-CTLFireability-13: CONJ false state space / EG
FMS-PT-00010-CTLFireability-14: CTL true CTL model checker
FMS-PT-00010-CTLFireability-15: AGEF true tscc_search
Time elapsed: 26 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is FMS-PT-00010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r166-tall-167838851400202"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00010.tgz
mv FMS-PT-00010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;