MCC'2023- Execution of r166-tall-167838851200082

About the Execution of LoLA for Echo-PT-d03r03

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
4375.027	350619.00	338325.00	894.30	?F?F?TT??T?T?TT?	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input
Waiting for the VM to be
.................................
===========
Generated by BenchKit 2-5348
Executing tool lola
Input is Echo-PT-d03r03,
Time confinement is
Memory confinement is
Number of cores is 4
Run identifier is r166-tall-1
=================================

--------------------
preparation of the directory
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 7.4K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 5.9K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 4.2K
-rw-r--r-- 1 mcc users 5.9K
-rw-r--r-- 1 mcc users 3.3K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 2.1K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 8.3K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 6.7K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 1.6K
-rw-r--r-- 1 mcc users 3.6K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 114K Mar

--------------------
content from stdout:

=== Data for post analysis

The expected result is a
BOOL_VECTOR

here is the order used to
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi
FORMULA_NAME Echo-PT-d03r03-CTLFi

=== Now, execution of the

BK_START 1678412801043

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bi
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d03r03
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Echo-PT-d03r03
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit
current directory: /home/mcc/exec
CTLFireability

FORMULA Echo-PT-d03r03-CTLFireability-05

FORMULA Echo-PT-d03r03-CTLFireability-14

FORMULA Echo-PT-d03r03-CTLFireability-13

FORMULA Echo-PT-d03r03-CTLFireability-09

FORMULA Echo-PT-d03r03-CTLFireability-06

FORMULA Echo-PT-d03r03-CTLFireability-03

FORMULA Echo-PT-d03r03-CTLFireability-01

FORMULA Echo-PT-d03r03-CTLFireability-11

BK_STOP 1678413151662

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: RELEASE
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lola: RELEASE
lola: RELEASE
lola: RELEASE
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lola: RELEASE
lola: RELEASE
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
lola: rewrite Frontend/Parser/f
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 37
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 48
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 49
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 51
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: FINISHED task #
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task #
lola: CANCELED task #
lola: rewrite Frontend/Parser/f
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lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
sara: try reading problem
lola: rewrite Frontend/Parser/f
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
sara: place or transition

lola: rewrite Frontend/Parser/f
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lola: FINISHED task #
lola: result
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
FINISHED FORMULA: CATEGORY
Echo-PT-d03r03-CTLFireability-05:

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Echo-PT-d03r03-CTLFireability-14:

PENDING FORMULAS: CATEGORY
Echo-PT-d03r03-CTLFireability-00:
Echo-PT-d03r03-CTLFireability-02:
Echo-PT-d03r03-CTLFireability-04:
Echo-PT-d03r03-CTLFireability-07:
Echo-PT-d03r03-CTLFireability-08:
Echo-PT-d03r03-CTLFireability-10:
Echo-PT-d03r03-CTLFireability-12:
Echo-PT-d03r03-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 350 secs.
# running tasks: 1 of 4
lola: Portfolio finished:

FINAL RESULTS
FINISHED FORMULA: CATEGORY
Echo-PT-d03r03-CTLFireability-00:
Echo-PT-d03r03-CTLFireability-01:
Echo-PT-d03r03-CTLFireability-02:
Echo-PT-d03r03-CTLFireability-03:
Echo-PT-d03r03-CTLFireability-04:
Echo-PT-d03r03-CTLFireability-05:
Echo-PT-d03r03-CTLFireability-06:
Echo-PT-d03r03-CTLFireability-07:
Echo-PT-d03r03-CTLFireability-08:
Echo-PT-d03r03-CTLFireability-09:
Echo-PT-d03r03-CTLFireability-10:
Echo-PT-d03r03-CTLFireability-11:
Echo-PT-d03r03-CTLFireability-12:
Echo-PT-d03r03-CTLFireability-13:
Echo-PT-d03r03-CTLFireability-14:
Echo-PT-d03r03-CTLFireability-15:

Time elapsed: 350 secs.
.r166-tall-167838851200082.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16 ready (probing ssh) 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.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. ========================================================== examination is CTLFireability 3600 seconds 16384 MBytes 67838851200082 ==================================== to be used: Feb 25 14:04 CTLCardinality.txt 82K Feb 25 14:04 CTLCardinality.xml Feb 25 14:03 CTLFireability.txt 60K Feb 25 14:03 CTLFireability.xml Jan 29 11:40 GenericPropertiesDefinition.xml Jan 29 11:40 GenericPropertiesVerdict.xml Feb 25 16:03 LTLCardinality.txt 23K Feb 25 16:03 LTLCardinality.xml Feb 25 16:03 LTLFireability.txt 18K Feb 25 16:03 LTLFireability.xml Feb 25 14:05 ReachabilityCardinality.txt 85K Feb 25 14:05 ReachabilityCardinality.xml Feb 25 14:04 ReachabilityFireability.txt 55K Feb 25 14:04 ReachabilityFireability.xml Feb 25 16:03 UpperBounds.txt Feb 25 16:03 UpperBounds.xml 6 Mar 5 18:22 equiv_col 7 Mar 5 18:22 instance 6 Mar 5 18:22 iscolored 5 18:22 model.pnml generated by BenchKit (invocation template) vector of booleans build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 tool begins 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N n/ /bin//../lola/bin/ ution TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT (--pnmlnet) /home/mcc/execution/model.pnml place/transition net /home/mcc/execution/model.pnml (--xmlformula) from /home/mcc/execution/CTLFireability.xml ormula_rewrite.k:317 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:472 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:250 ormula_rewrite.k:250 ormula_rewrite.k:250 ormula_rewrite.k:96 ormula_rewrite.k:182 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:299 ormula_rewrite.k:296 ormula_rewrite.k:314 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:325 ormula_rewrite.k:337 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:337 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:314 ormula_rewrite.k:317 ormula_rewrite.k:314 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:340 ormula_rewrite.k:299 ormula_rewrite.k:299 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:322 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:472 ormula_rewrite.k:253 ormula_rewrite.k:253 ormula_rewrite.k:253 ormula_rewrite.k:317 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:314 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:469 ormula_rewrite.k:314 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:322 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:544 ormula_rewrite.k:388 ormula_rewrite.k:314 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:322 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:253 ormula_rewrite.k:317 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:299 ormula_rewrite.k:317 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:325 ormula_rewrite.k:340 ormula_rewrite.k:299 ormula_rewrite.k:299 ormula_rewrite.k:314 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:314 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:96 ormula_rewrite.k:117 ormula_rewrite.k:120 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:314 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:299 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:314 ormula_rewrite.k:299 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:299 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:96 ormula_rewrite.k:162 ormula_rewrite.k:147 ormula_rewrite.k:182 ormula_rewrite.k:454 ormula_rewrite.k:317 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:550 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:299 ormula_rewrite.k:314 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:314 ormula_rewrite.k:296 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:460 ormula_rewrite.k:250 ormula_rewrite.k:325 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:400 ormula_rewrite.k:451 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:812 ormula_rewrite.k:807 ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:812 ormula_rewrite.k:807 ormula_rewrite.k:814 ormula_rewrite.k:806 ormula_rewrite.k:808 ormula_rewrite.k:808 ormula_rewrite.k:809 ormula_rewrite.k:806 ormula_rewrite.k:806 (type EXCL) for 36 Echo-PT-d03r03-CTLFireability-12 ormula_rewrite.k:808 ormula_rewrite.k:815 ormula_rewrite.k:806 ormula_rewrite.k:813 ormula_rewrite.k:711 ormula_rewrite.k:813 ormula_rewrite.k:813 ormula_rewrite.k:811 ormula_rewrite.k:811 ormula_rewrite.k:814 ormula_rewrite.k:809 ormula_rewrite.k:812 ormula_rewrite.k:814 ormula_rewrite.k:807 ormula_rewrite.k:811 ormula_rewrite.k:814 ormula_rewrite.k:812 ormula_rewrite.k:711 ormula_rewrite.k:807 ormula_rewrite.k:808 ormula_rewrite.k:809 ormula_rewrite.k:810 ormula_rewrite.k:811 ormula_rewrite.k:815 ormula_rewrite.k:813 ormula_rewrite.k:812 ormula_rewrite.k:808 ormula_rewrite.k:806 ormula_rewrite.k:807 ormula_rewrite.k:810 ormula_rewrite.k:814 ormula_rewrite.k:711 (type FNDP) for 15 Echo-PT-d03r03-CTLFireability-05 32000000 sec (type EQUN) for 15 Echo-PT-d03r03-CTLFireability-05 32000000 sec (type SRCH) for 15 Echo-PT-d03r03-CTLFireability-05 32000000 sec ormula_rewrite.k:711 ormula_rewrite.k:806 ormula_rewrite.k:808 ormula_rewrite.k:807 ormula_rewrite.k:814 ormula_rewrite.k:808 48 (type FNDP) for Echo-PT-d03r03-CTLFireability-05 : true 5 1 0.000000 0 49 (type EQUN) for Echo-PT-d03r03-CTLFireability-05 (obsolete) 51 (type SRCH) for Echo-PT-d03r03-CTLFireability-05 (obsolete) ormula_rewrite.k:730 ormula_rewrite.k:808 ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:811 ormula_rewrite.k:808 ormula_rewrite.k:807 ormula_rewrite.k:807 ormula_rewrite.k:814 ormula_rewrite.k:813 ormula_rewrite.k:814 ormula_rewrite.k:808 ormula_rewrite.k:807 ormula_rewrite.k:808 ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:808 ormula_rewrite.k:811 ormula_rewrite.k:806 ormula_rewrite.k:813 ormula_rewrite.k:814 51 (type SRCH) for Echo-PT-d03r03-CTLFireability-05 : unknown 0.000000 1 file /home/mcc/execution/CTLFireability-49.sara. ormula_rewrite.k:806 ormula_rewrite.k:806 ormula_rewrite.k:812 ormula_rewrite.k:814 ormula_rewrite.k:806 ormula_rewrite.k:808 ormula_rewrite.k:807 ormula_rewrite.k:807 ormula_rewrite.k:808 ormula_rewrite.k:815 ormula_rewrite.k:810 ormula_rewrite.k:811 ormula_rewrite.k:813 ormula_rewrite.k:814 ormula_rewrite.k:813 ormula_rewrite.k:806 ormula_rewrite.k:812 ormula_rewrite.k:806 ormula_rewrite.k:814 ordering is non-deterministic ormula_rewrite.k:812 ormula_rewrite.k:809 ormula_rewrite.k:806 ormula_rewrite.k:806 ormula_rewrite.k:814 ormula_rewrite.k:812 ormula_rewrite.k:808 ormula_rewrite.k:806 ormula_rewrite.k:812 49 (type EQUN) for Echo-PT-d03r03-CTLFireability-05 : true ormula_rewrite.k:807 ormula_rewrite.k:811 ormula_rewrite.k:807 ormula_rewrite.k:809 ormula_rewrite.k:814 ormula_rewrite.k:811 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Echo-PT-d03r03-CTLFireability-12 1171851 m, 234370 m/sec, 4868293 t fired, . Pages in use: 6 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d03r03-CTLFireability-12 2280226 m, 221675 m/sec, 9671429 t fired, . Pages in use: 11 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Echo-PT-d03r03-CTLFireability-12 3347599 m, 213474 m/sec, 14533417 t fired, . Pages in use: 15 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d03r03-CTLFireability-12 4387919 m, 208064 m/sec, 19400480 t fired, . Pages in use: 20 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d03r03-CTLFireability-12 5471824 m, 216781 m/sec, 24039056 t fired, . Pages in use: 25 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d03r03-CTLFireability-12 6439406 m, 193516 m/sec, 28714604 t fired, . Pages in use: 29 Visible: 16 37 (type EXCL) for Echo-PT-d03r03-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 45 Echo-PT-d03r03-CTLFireability-15 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Echo-PT-d03r03-CTLFireability-15 1006573 m, 201314 m/sec, 2372695 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Echo-PT-d03r03-CTLFireability-15 1959077 m, 190500 m/sec, 4823977 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d03r03-CTLFireability-15 2857254 m, 179635 m/sec, 7110245 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Echo-PT-d03r03-CTLFireability-15 3732141 m, 174977 m/sec, 9518011 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Echo-PT-d03r03-CTLFireability-15 4554566 m, 164485 m/sec, 11817750 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d03r03-CTLFireability-15 5422645 m, 173615 m/sec, 14317970 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d03r03-CTLFireability-15 6292087 m, 173888 m/sec, 16650961 t fired, . Pages in use: 32 Visible: 16 46 (type EXCL) for Echo-PT-d03r03-CTLFireability-15 (memory limit exceeded) VALUE PRODUCED BY EF true findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 42 Echo-PT-d03r03-CTLFireability-14 43 (type EXCL) for Echo-PT-d03r03-CTLFireability-14 : true 35 35 0.000000 1 (type EXCL) for 39 Echo-PT-d03r03-CTLFireability-13 40 (type EXCL) for Echo-PT-d03r03-CTLFireability-13 : true 55 163 0.000000 1 (type EXCL) for 30 Echo-PT-d03r03-CTLFireability-10 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Echo-PT-d03r03-CTLFireability-10 899608 m, 179921 m/sec, 6245084 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Echo-PT-d03r03-CTLFireability-10 1780416 m, 176161 m/sec, 12193242 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Echo-PT-d03r03-CTLFireability-10 2556011 m, 155119 m/sec, 18199958 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Echo-PT-d03r03-CTLFireability-10 3371359 m, 163069 m/sec, 24225626 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d03r03-CTLFireability-10 4135321 m, 152792 m/sec, 30290323 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d03r03-CTLFireability-10 4895223 m, 151980 m/sec, 36106449 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d03r03-CTLFireability-10 5655669 m, 152089 m/sec, 41715652 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d03r03-CTLFireability-10 6421482 m, 153162 m/sec, 47367986 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Echo-PT-d03r03-CTLFireability-10 7202071 m, 156117 m/sec, 52950532 t fired, . Pages in use: 32 Visible: 16 31 (type EXCL) for Echo-PT-d03r03-CTLFireability-10 (memory limit exceeded) VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 27 Echo-PT-d03r03-CTLFireability-09 28 (type EXCL) for Echo-PT-d03r03-CTLFireability-09 : true 12390 65518 0.000000 1 (type EXCL) for 24 Echo-PT-d03r03-CTLFireability-08 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Echo-PT-d03r03-CTLFireability-08 896572 m, 179314 m/sec, 6228202 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Echo-PT-d03r03-CTLFireability-08 1782111 m, 177107 m/sec, 12204606 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Echo-PT-d03r03-CTLFireability-08 2562094 m, 155996 m/sec, 18258203 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Echo-PT-d03r03-CTLFireability-08 3385228 m, 164626 m/sec, 24333468 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d03r03-CTLFireability-08 4155152 m, 153984 m/sec, 30449397 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d03r03-CTLFireability-08 4924462 m, 153862 m/sec, 36296864 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d03r03-CTLFireability-08 5685882 m, 152284 m/sec, 41948227 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d03r03-CTLFireability-08 6459118 m, 154647 m/sec, 47636342 t fired, . Pages in use: 32 Visible: 16 25 (type EXCL) for Echo-PT-d03r03-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 21 Echo-PT-d03r03-CTLFireability-07 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d03r03-CTLFireability-07 1511417 m, 302283 m/sec, 6436523 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d03r03-CTLFireability-07 2893139 m, 276344 m/sec, 12530365 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d03r03-CTLFireability-07 4112826 m, 243937 m/sec, 18800443 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Echo-PT-d03r03-CTLFireability-07 5232175 m, 223869 m/sec, 24797642 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d03r03-CTLFireability-07 6297644 m, 213093 m/sec, 30886702 t fired, . Pages in use: 32 Visible: 16 22 (type EXCL) for Echo-PT-d03r03-CTLFireability-07 (memory limit exceeded) VALUE PRODUCED BY EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 18 Echo-PT-d03r03-CTLFireability-06 19 (type EXCL) for Echo-PT-d03r03-CTLFireability-06 : true 54 116 0.000000 1 (type EXCL) for 9 Echo-PT-d03r03-CTLFireability-03 10 (type EXCL) for Echo-PT-d03r03-CTLFireability-03 : false 55 219 0.000000 1 (type EXCL) for 6 Echo-PT-d03r03-CTLFireability-02 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Echo-PT-d03r03-CTLFireability-02 1010290 m, 202058 m/sec, 6906855 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Echo-PT-d03r03-CTLFireability-02 1955984 m, 189138 m/sec, 13428690 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d03r03-CTLFireability-02 2783396 m, 165482 m/sec, 19946984 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Echo-PT-d03r03-CTLFireability-02 3668887 m, 177098 m/sec, 26658602 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d03r03-CTLFireability-02 4494970 m, 165216 m/sec, 33216209 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Echo-PT-d03r03-CTLFireability-02 5380062 m, 177018 m/sec, 39558496 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Echo-PT-d03r03-CTLFireability-02 6180256 m, 160038 m/sec, 45631214 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Echo-PT-d03r03-CTLFireability-02 7047023 m, 173353 m/sec, 51834822 t fired, . Pages in use: 32 Visible: 16 7 (type EXCL) for Echo-PT-d03r03-CTLFireability-02 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EFEG 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 3 Echo-PT-d03r03-CTLFireability-01 4 (type EXCL) for Echo-PT-d03r03-CTLFireability-01 : false 55 220 0.000000 1 (type EXCL) for 33 Echo-PT-d03r03-CTLFireability-11 34 (type EXCL) for Echo-PT-d03r03-CTLFireability-11 : true 54 53 0.000000 1 (type EXCL) for 12 Echo-PT-d03r03-CTLFireability-04 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Echo-PT-d03r03-CTLFireability-04 834595 m, 166919 m/sec, 7179793 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Echo-PT-d03r03-CTLFireability-04 1638146 m, 160710 m/sec, 14016703 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d03r03-CTLFireability-04 2360659 m, 144502 m/sec, 20847265 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d03r03-CTLFireability-04 3065111 m, 140890 m/sec, 27597673 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Echo-PT-d03r03-CTLFireability-04 3789629 m, 144903 m/sec, 34528236 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d03r03-CTLFireability-04 4475499 m, 137174 m/sec, 41282067 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Echo-PT-d03r03-CTLFireability-04 5218128 m, 148525 m/sec, 47946285 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d03r03-CTLFireability-04 5843842 m, 125142 m/sec, 54325821 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Echo-PT-d03r03-CTLFireability-04 6636363 m, 158504 m/sec, 60839718 t fired, . Pages in use: 32 Visible: 16 13 (type EXCL) for Echo-PT-d03r03-CTLFireability-04 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 0 Echo-PT-d03r03-CTLFireability-00 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Echo-PT-d03r03-CTLFireability-00 758921 m, 151784 m/sec, 6653707 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d03r03-CTLFireability-00 1462260 m, 140667 m/sec, 12919065 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Echo-PT-d03r03-CTLFireability-00 2158081 m, 139164 m/sec, 19306714 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d03r03-CTLFireability-00 2809060 m, 130195 m/sec, 25784202 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Echo-PT-d03r03-CTLFireability-00 3503636 m, 138915 m/sec, 32303092 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d03r03-CTLFireability-00 4155572 m, 130387 m/sec, 38780358 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d03r03-CTLFireability-00 4787323 m, 126350 m/sec, 44980005 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d03r03-CTLFireability-00 5451542 m, 132843 m/sec, 51025294 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Echo-PT-d03r03-CTLFireability-00 6058285 m, 121348 m/sec, 56962906 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Echo-PT-d03r03-CTLFireability-00 6725443 m, 133431 m/sec, 63022450 t fired, . Pages in use: 32 Visible: 16 1 (type EXCL) for Echo-PT-d03r03-CTLFireability-00 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker EF true findpath CTL true CTL model checker CTL true CTL model checker EFEG true state space /EFEG CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 no open tasks 16 VALUE PRODUCED BY CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR EF true findpath CTL true CTL model checker CTL unknown AGGR CTL unknown AGGR CTL true CTL model checker CTL unknown AGGR EFEG true state space /EFEG CTL unknown AGGR CTL true CTL model checker CTL true CTL model checker CTL unknown AGGR Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d03r03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Echo-PT-d03r03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r166-tall-167838851200082"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d03r03.tgz
mv Echo-PT-d03r03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;