About the Execution of LTSMin+red for DoubleLock-PT-p1s1
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
7248.075 | 858021.00 | 3415737.00 | 535.80 | T????T??F??????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r137-smll-167819418600506.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is DoubleLock-PT-p1s1, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-smll-167819418600506
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 5.5K Feb 25 14:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 14:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 14:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 14:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 113K Feb 25 14:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Feb 25 14:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 25 14:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 93K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-00
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-01
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-02
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-03
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-04
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-05
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-06
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-07
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-08
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-09
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-10
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-11
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-12
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-13
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-14
FORMULA_NAME DoubleLock-PT-p1s1-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678901983357
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p1s1
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-15 17:39:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 17:39:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 17:39:46] [INFO ] Load time of PNML (sax parser for PT used): 94 ms
[2023-03-15 17:39:46] [INFO ] Transformed 64 places.
[2023-03-15 17:39:46] [INFO ] Transformed 204 transitions.
[2023-03-15 17:39:46] [INFO ] Parsed PT model containing 64 places and 204 transitions and 828 arcs in 201 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
Deduced a syphon composed of 8 places in 2 ms
Reduce places removed 8 places and 8 transitions.
FORMULA DoubleLock-PT-p1s1-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 45 out of 56 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 196/196 transitions.
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 52 transition count 196
Applied a total of 4 rules in 22 ms. Remains 52 /56 variables (removed 4) and now considering 196/196 (removed 0) transitions.
[2023-03-15 17:39:46] [INFO ] Flow matrix only has 148 transitions (discarded 48 similar events)
// Phase 1: matrix 148 rows 52 cols
[2023-03-15 17:39:46] [INFO ] Computed 2 place invariants in 10 ms
[2023-03-15 17:39:46] [INFO ] Implicit Places using invariants in 233 ms returned []
[2023-03-15 17:39:46] [INFO ] Flow matrix only has 148 transitions (discarded 48 similar events)
[2023-03-15 17:39:46] [INFO ] Invariant cache hit.
[2023-03-15 17:39:46] [INFO ] State equation strengthened by 23 read => feed constraints.
[2023-03-15 17:39:46] [INFO ] Implicit Places using invariants and state equation in 142 ms returned []
Implicit Place search using SMT with State Equation took 423 ms to find 0 implicit places.
[2023-03-15 17:39:46] [INFO ] Flow matrix only has 148 transitions (discarded 48 similar events)
[2023-03-15 17:39:46] [INFO ] Invariant cache hit.
[2023-03-15 17:39:47] [INFO ] Dead Transitions using invariants and state equation in 180 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 52/56 places, 196/196 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 629 ms. Remains : 52/56 places, 196/196 transitions.
Support contains 45 out of 52 places after structural reductions.
[2023-03-15 17:39:47] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 17:39:47] [INFO ] Flatten gal took : 60 ms
FORMULA DoubleLock-PT-p1s1-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 17:39:47] [INFO ] Flatten gal took : 27 ms
[2023-03-15 17:39:47] [INFO ] Input system was already deterministic with 196 transitions.
Incomplete random walk after 10000 steps, including 75 resets, run finished after 594 ms. (steps per millisecond=16 ) properties (out of 61) seen :54
Incomplete Best-First random walk after 10000 steps, including 17 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 167 ms. (steps per millisecond=59 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 10 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-15 17:39:48] [INFO ] Flow matrix only has 148 transitions (discarded 48 similar events)
[2023-03-15 17:39:48] [INFO ] Invariant cache hit.
[2023-03-15 17:39:48] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-15 17:39:48] [INFO ] [Real]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-15 17:39:48] [INFO ] After 192ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 7 atomic propositions for a total of 14 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA DoubleLock-PT-p1s1-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 17:39:48] [INFO ] Flatten gal took : 18 ms
[2023-03-15 17:39:48] [INFO ] Flatten gal took : 21 ms
[2023-03-15 17:39:48] [INFO ] Input system was already deterministic with 196 transitions.
Computed a total of 4 stabilizing places and 24 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 48 transition count 176
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 48 transition count 176
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 9 place count 47 transition count 168
Iterating global reduction 0 with 1 rules applied. Total rules applied 10 place count 47 transition count 168
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 46 transition count 164
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 46 transition count 164
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 45 transition count 160
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 45 transition count 160
Applied a total of 14 rules in 28 ms. Remains 45 /52 variables (removed 7) and now considering 160/196 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 45/52 places, 160/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 13 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 17 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 160 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 48 transition count 176
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 48 transition count 176
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 9 place count 47 transition count 168
Iterating global reduction 0 with 1 rules applied. Total rules applied 10 place count 47 transition count 168
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 46 transition count 164
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 46 transition count 164
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 45 transition count 160
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 45 transition count 160
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 44 transition count 156
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 44 transition count 156
Applied a total of 16 rules in 22 ms. Remains 44 /52 variables (removed 8) and now considering 156/196 (removed 40) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 44/52 places, 156/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 13 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 16 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 156 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Applied a total of 0 rules in 2 ms. Remains 52 /52 variables (removed 0) and now considering 196/196 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 52/52 places, 196/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 15 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 20 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 48 transition count 176
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 48 transition count 176
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 9 place count 47 transition count 168
Iterating global reduction 0 with 1 rules applied. Total rules applied 10 place count 47 transition count 168
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 46 transition count 164
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 46 transition count 164
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 45 transition count 160
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 45 transition count 160
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 44 transition count 156
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 44 transition count 156
Applied a total of 16 rules in 40 ms. Remains 44 /52 variables (removed 8) and now considering 156/196 (removed 40) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 44/52 places, 156/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 12 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 15 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 156 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 48 transition count 176
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 48 transition count 176
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 9 place count 47 transition count 168
Iterating global reduction 0 with 1 rules applied. Total rules applied 10 place count 47 transition count 168
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 46 transition count 164
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 46 transition count 164
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 45 transition count 160
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 45 transition count 160
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 44 transition count 156
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 44 transition count 156
Applied a total of 16 rules in 37 ms. Remains 44 /52 variables (removed 8) and now considering 156/196 (removed 40) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 44/52 places, 156/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 11 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 13 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 156 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Applied a total of 6 rules in 18 ms. Remains 49 /52 variables (removed 3) and now considering 184/196 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 49/52 places, 184/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 13 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 16 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Applied a total of 4 rules in 3 ms. Remains 50 /52 variables (removed 2) and now considering 188/196 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 50/52 places, 188/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 12 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 14 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Applied a total of 2 rules in 3 ms. Remains 51 /52 variables (removed 1) and now considering 192/196 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 51/52 places, 192/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 11 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 12 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Applied a total of 4 rules in 12 ms. Remains 50 /52 variables (removed 2) and now considering 188/196 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 50/52 places, 188/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 11 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 12 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Applied a total of 6 rules in 4 ms. Remains 49 /52 variables (removed 3) and now considering 184/196 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 49/52 places, 184/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 10 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 11 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Applied a total of 2 rules in 9 ms. Remains 51 /52 variables (removed 1) and now considering 192/196 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 51/52 places, 192/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 9 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 10 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 50 transition count 188
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 50 transition count 188
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 49 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 49 transition count 184
Applied a total of 6 rules in 4 ms. Remains 49 /52 variables (removed 3) and now considering 184/196 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 49/52 places, 184/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 8 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 10 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 196/196 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 51 transition count 192
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 51 transition count 192
Applied a total of 2 rules in 2 ms. Remains 51 /52 variables (removed 1) and now considering 192/196 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 51/52 places, 192/196 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 9 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 10 ms
[2023-03-15 17:39:49] [INFO ] Input system was already deterministic with 192 transitions.
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 10 ms
[2023-03-15 17:39:49] [INFO ] Flatten gal took : 10 ms
[2023-03-15 17:39:49] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-15 17:39:49] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 52 places, 196 transitions and 780 arcs took 2 ms.
Total runtime 3848 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/469/ctl_0_ --ctl=/tmp/469/ctl_1_ --ctl=/tmp/469/ctl_2_ --ctl=/tmp/469/ctl_3_ --ctl=/tmp/469/ctl_4_ --ctl=/tmp/469/ctl_5_ --ctl=/tmp/469/ctl_6_ --ctl=/tmp/469/ctl_7_ --ctl=/tmp/469/ctl_8_ --ctl=/tmp/469/ctl_9_ --ctl=/tmp/469/ctl_10_ --ctl=/tmp/469/ctl_11_ --ctl=/tmp/469/ctl_12_ --mu-par --mu-opt
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-01
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-02
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-03
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-04
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-06
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-07
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-09
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-10
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-11
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-12
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-13
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-14
Could not compute solution for formula : DoubleLock-PT-p1s1-CTLFireability-15
BK_STOP 1678902841378
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name DoubleLock-PT-p1s1-CTLFireability-01
ctl formula formula --ctl=/tmp/469/ctl_0_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-02
ctl formula formula --ctl=/tmp/469/ctl_1_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-03
ctl formula formula --ctl=/tmp/469/ctl_2_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-04
ctl formula formula --ctl=/tmp/469/ctl_3_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-06
ctl formula formula --ctl=/tmp/469/ctl_4_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-07
ctl formula formula --ctl=/tmp/469/ctl_5_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-09
ctl formula formula --ctl=/tmp/469/ctl_6_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-10
ctl formula formula --ctl=/tmp/469/ctl_7_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-11
ctl formula formula --ctl=/tmp/469/ctl_8_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-12
ctl formula formula --ctl=/tmp/469/ctl_9_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-13
ctl formula formula --ctl=/tmp/469/ctl_10_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-14
ctl formula formula --ctl=/tmp/469/ctl_11_
ctl formula name DoubleLock-PT-p1s1-CTLFireability-15
ctl formula formula --ctl=/tmp/469/ctl_12_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 52 places, 196 transitions and 780 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.010 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 196->159 groups
pnml2lts-sym: Regrouping took 0.030 real 0.030 user 0.000 sys
pnml2lts-sym: state vector length is 52; there are 159 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p1s1"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is DoubleLock-PT-p1s1, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-smll-167819418600506"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p1s1.tgz
mv DoubleLock-PT-p1s1 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;